JPH08330414A - Manufacture of soi substrate - Google Patents

Abstract

PURPOSE: To form an Si active layer on several tens nm order in depth of uniform thickness with a high reproducibility in the manufacture of a SOI substrate. CONSTITUTION: The etching treatment for formation of a groove part 1b on an Si substrate 1 is normally conducted under the condition in which a SiOx film is anisotropically etched, namely, under the condition where ion sputtering action is intensified using a deposition gas such as c-C4 F8 or CHF3 . As a result, in either case where a SiOx base film 2 is provided for prevention of diffusion of contamination to the Si substrate 1 from a resist mask 3 or where a natural oxide film is grown on the Si substrate 1, the rate of etching suddenly declines at the point of time when the Si substrate 1 is exposed, and the depth of the objective groove part 1b can be accomplished with a high precision. Consequently, as the depth of the groove part 1b can be reflected to the thickness of an Si layer, the irregularity in efficiency of the device formed on the active layer can be suppressed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing an SOI substrate used for manufacturing a semiconductor device, for example, by performing dry etching which eliminates the influence of a natural oxide film when forming a groove in a silicon substrate. The present invention relates to a method for accurately and precisely defining the thickness of a silicon active layer.

[0002]

2. Description of the Related Art With the progress of miniaturization of semiconductor devices to a high degree, there are great expectations for SOI technology.
SOI is a concept that counters bulk silicon, which has been the mainstream in the past, and a technology using thin film single crystal silicon (Silicon On Insulator) formed on an insulating substrate as an active layer or this structure was used. It is a general term for devices.

Already in bulk silicon technology,
(1) There is a limit to miniaturization of the separation width by the LOCOS method, and a complicated p inside the substrate including well formation is formed.
N-junction isolation requires a large number of steps and costs,
(2) It is difficult to form a shallow junction that is indispensable for suppressing the short channel effect and speeding up the operation in a MOS transistor. (3) Channel impurity concentration that has been used to suppress the short channel effect. Increase in parasitic capacitance and the resulting decrease in operating speed. (4) Under low voltage driving in the future, the width of the depletion layer near the drain decreases and the parasitic capacitance further increases.
(5) If an attempt is made to increase the cell capacity in consideration of the soft error resistance and data retention characteristics of the DRAM, the cell structure becomes extremely complicated and the cost becomes high.

On the other hand, in SOI, (1) conventional L
Fine complete element isolation is possible even with the OCOS method,
(2) Since the thickness of the diffusion layer is determined by the thickness of the SOI active layer, the degree of freedom in selecting the ion implantation technique is large.
(3) Electron-hole pairs due to α rays are generated only in the thin Si active layer, so that soft error can be virtually avoided. (4) Junction leakage current can be reduced, so that the cell capacity is not so large. Even so, advantages such as that a low power consumption type DRAM excellent in reliability and data retention characteristics can be configured can be obtained.

Regarding this SOI, from the relatively early stage of development, a high-speed and high-reliability CMOS transistor in which latch-up is suppressed by using a Si active layer having a thickness of about 500 nm has been demonstrated. In recent years, by using a thinner Si active layer of about 100 nm and controlling the channel impurity concentration to a relatively low range to set conditions such that the entire Si active layer is depleted, the short channel effect can be improved. It has been clarified that there is a further effect on the suppression and the improvement of the current drive capability of the MOS transistor. A typical and most practical manufacturing method for SOI substrates is the SIMOX method (Separation by IMplanted OXygen).
And the bonding method are known. In the former SIMOX method, a high-concentration oxygen is ion-implanted into a Si substrate with a predetermined range to form a buried oxide film in a region of a certain depth from the substrate surface, and a portion above the oxide film is formed. Si
This is a method of forming an active layer. One of the bonding methods is to bond a first Si substrate having an insulating film (oxide film) formed on its surface and a second Si substrate having nothing formed on the insulating film side to form a first Si substrate. Is ground or polished from the back side to reduce its thickness, thereby leaving a thin Si active layer on the insulating film.

[0006]

At the present time, there are advantages and disadvantages in both the SIMOX method and the bonding method.

First of all, the SIMOX method has an advantage that the substrate manufacturing process is excellent in controllability and reproducibility, and in particular, a thin Si active layer can be formed with high uniformity, but on the other hand, a buried oxide film and a Si active layer are formed. Inferior in flatness between them, high-density crystal defects occur in the Si active layer,
There is a drawback that the throughput of manufacturing the substrate is low.

On the other hand, the bonding method uses Si having good crystallinity.
SI is advantageous in that an active layer can be obtained, that the thickness of the active layer and the buried insulating film can be set to some extent, and that the interface characteristics between the buried insulating film and the Si active layer are excellent.
Although superior to MOX method, it is inferior in forming a thin Si active layer with high uniformity. In the future, if the design rule of the semiconductor device is reduced to 0.18 μm, and if the thickness of the Si active layer is reduced to about 30 nm according to the scaling rule, such deterioration of uniformity is a serious problem. Become. This deterioration is mainly due to the natural oxide film existing on the surface of the Si substrate. Hereinafter, this problem will be described with reference to FIGS.
Will be described with reference to.

FIG. 11 shows a thin SiOx film having a thickness of about 10 nm formed on a Si substrate 21 by, for example, pyrogenic oxidation.
It shows a state in which the base film 22 is formed and the resist mask 23 is further formed. Here, the resist mask 23 is formed so as to cover a region in the Si substrate 21 that will become a future island-shaped Si region (reference numeral 21ai in FIG. 19) and expose the other region in the opening 24. . The SiOx base film 22 is formed of a resist mask 23.
It is usually provided as a pollution prevention film for preventing the impurities therein from diffusing into the Si substrate 21.

Next, in the opening 24, first, Si
Etching is performed to selectively remove the Ox base film 22. This etching is performed by wet etching using a dilute hydrofluoric acid solution (light etching) or dry etching using chlorine-based gas (breakthrough). Here, in the breakthrough, the fluorocarbon-based gas such as CHF ₃ which is an etching gas for a normal SiOx-based material is not used in the Si substrate 2.
This is to prevent the carbon-based polymer from being deposited on the exposed surface of No. 1. By this etching, as shown in FIG. 12, the Si substrate 21 is exposed in the opening 24.
However, as shown in FIG. 13, the exposed surface of the Si substrate 21 will soon have a non-uniform thickness of the native oxide film 25.
Grows. The natural oxide film 25 inevitably grows during the washing / drying process after the completion of wet etching or during the waiting time from the completion of breakthrough to the start of etching of the Si substrate 21. Therefore, this natural oxide film 2
In order to remove 5, it is necessary to perform the breakthrough with the chlorine-based gas described above again. However, this time, the natural oxide film 25 to be removed is not formed while being controlled like the above-mentioned SiOx underlayer film 22, and is extremely uneven within the same substrate or between different substrates. Moreover, the etching rate of the chlorine-based gas is higher in the Si substrate 21 than in the natural oxide film 25. Therefore, the region where the natural oxide film 25 is thin and the Si substrate 21 is exposed earlier is more rapidly eroded, and the Si substrate 21 after the natural oxide film 25 is removed is not roughened. appear.

After that, when the Si substrate 21 is etched under a highly anisotropic Si etching condition using, for example, a HBr / O ₂ mixed gas, as shown in FIG. 14, the above surface roughness remains almost unchanged. The groove portion 21b transferred to the bottom surface is formed.

Further, the depth of the groove portion 21b itself is within the same substrate due to the thickness of the natural oxide film 25, the influence of the loading effect, the large exhaust rate of the etching reaction products in the peripheral portion of the substrate, and the like. But it varies depending on the place. Further, the fluctuation range of the surface step is larger when the groove portion 21b is formed than when the SiOx base film 22 is removed,
It is clear that the later steps tend to emphasize the initial surface step.

Here, the convex portion 2 between the adjacent groove portions 21b.
Since 1a is a region which will be an island-shaped Si active layer (reference numeral 21ai in FIG. 19) in a later step, the groove 2 as described above is formed.
The variation in the depth of 1b is directly reflected in the variation in the thickness of the island-shaped Si active layer 21ai. Therefore, in order to suppress this variation and bottom surface roughness, the natural oxide film 25 and S
It is also possible to remove the iOx base film 22 in-situ by gas etching using HF vapor. However, the in-situ removal of the natural oxide film 25 and the SiOx base film 22 and the S
If the i-substrate 21 is to be etched in the same chamber, it is necessary to take a countermeasure against HF gas in the exhaust system of this chamber. Further, if it is attempted to perform both of these steps in separate chambers and continuously, a multi-chamber type apparatus in which a gas etching chamber and a Si substrate 21 etching chamber are connected by a vacuum transfer system is required. Become. In any case, it causes the cost and size of the device to increase.

As another problem, under the highly anisotropic etching condition as described above, although not shown in FIG. 14, a notch-like shape abnormality called trenching is formed in the bottom corner of the groove 21b. May occur. Normal,
Under highly anisotropic etching conditions, the gas pressure is lowered to extend the mean free path of ions, and the ion incident energy is increased by using a substrate bias together. Therefore, the presence of oblique ion incident components scattered at the end of the mask receded by the ion-sputtering action, and that the deposition of etching by-products is small at the corners of the groove 21b, the etching rate at the corners is relatively large. It is believed that this may be the cause of causing trenching.

Thereafter, ashing and wet etching are sequentially performed to remove the resist mask 23 and the SiOx base film 22 as shown in FIG.

Then, as shown in FIG. 16, a SiOx film 26 for embedding is deposited on the entire surface of the Si substrate 21 and is flattened to obtain a flattened SiOx film 26p as shown in FIG. This planarization can be performed by, for example, chemical mechanical polishing (CMP).

Next, as shown in FIG. 18, a laminated body is produced in which another Si substrate 27 is bonded onto the flattened SiOx film 26p.

Further, in the laminated body in this state, mechanical grinding and / or chemical mechanical polishing is performed from the back surface side of the Si substrate 21. If this polishing is stopped when the flattened SiOx film 26p is exposed, the Si substrate 21 can be left as the island-shaped Si active layer 21ai. However, this island S
The i-active layer 21ai has a non-uniform thickness, which reflects variations in the depth of the groove 21b. Moreover, the non-uniformity of the groove portion 21b caused by the natural oxide film 25 becomes relatively larger as the depth thereof becomes shallower, that is, as the target island-shaped Si active layer becomes thinner. . This non-uniformity is caused by the island-shaped Si active layer 21ai in the subsequent process.
Since it causes a variation in the performance of the devices manufactured in the inside, it is a major problem for the next-generation and subsequent SOI devices to eliminate this.

Further, when trenching has occurred in the groove portion 21b, the S for filling is also embedded in this trenching portion.
Since the iOx film 26 enters, when the Si substrate 21 is ground or polished from the back surface side, there is a great possibility that the flatness and the particle level are significantly deteriorated.

Therefore, the present invention provides a method capable of forming an extremely shallow Si active layer having a uniform thickness and good reproducibility in the manufacture of an SOI substrate, which is particularly required in semiconductor devices of the next and subsequent generations. The purpose is to provide.

[0021]

The method of manufacturing an SOI substrate of the present invention is proposed to achieve the above-mentioned object, and includes a first step of forming an etching mask on a silicon substrate, and a silicon oxide. A second step of forming a groove having a predetermined depth in the silicon substrate by performing dry etching according to anisotropic etching conditions for the system material film, and a third step of removing the etching mask.
A step, a fourth step of filling the groove with a dielectric film, a fifth step of flattening the surface of the dielectric film, and a sixth step of bonding another substrate on the flattened surface of the dielectric film. When,
A seventh step of leaving the silicon substrate in an island shape by reducing the thickness of the silicon substrate from the back surface side thereof until the dielectric film is exposed at a position corresponding to the bottom surface of the groove portion.

Alternatively, in the first step, a base film made of a silicon oxide based material film is previously formed on a silicon substrate before forming an etching mask, and in the second step, an anisotropic film for the silicon oxide based material film is formed. The underlying film may be dry-etched according to the specific etching condition, and the groove having a predetermined depth may be formed in the silicon substrate by continuously using the etching condition in the third step. The base film is
Conventionally, a thickness of 10 nm formed to prevent contamination from an etching mask (typically a resist mask)
The thickness may be thin, or the thickness may be intentionally increased to a thickness of several hundreds nm. When the underlying film is provided in this way, the etching of the underlying film performed in the second step can be regarded as just etching of the underlying film, and the etching of the Si substrate performed in the third step can be regarded as overetching.

The underlying film may be formed by either thermal oxidation or CVD, but when it is formed as thin as about 10 nm, thermal oxidation is preferable from the viewpoint of controllability. Further, even when formed thick on the order of several hundreds nm, thermal oxidation is still excellent from the viewpoint of reducing the interface state density.

In any case, as the etching conditions for the oxide, the conditions conventionally used for etching a SiOx film, such as contact hole processing and LDD sidewall formation, can be applied as they are. That is, the etching gas used first contains at least a fluorocarbon (FC) -based compound or a hydrofluorocarbon (HFC) -based compound, and if necessary, an O ₂ or SiOx film for promoting dissociation of FC or HFC. COx, NOx, SO that contributes to the improvement of the etching rate by the O atom abstraction effect from the
In order to obtain a reducing gas such as x, H ₂ for capturing an excessive F ^* and increasing the C / F ratio (ratio of the number of carbon atoms and the number of fluorine atoms) of the etching reaction system, a dilution effect or a cooling effect A gas to which a rare gas or the like is appropriately added can be used. The etching device used is preferably one that can dissociate the etching gas with high efficiency even under a low gas pressure.
An IE device, a magnetic field microwave plasma device, an inductively coupled plasma device, a helicon wave plasma device, etc. can be exemplified. Of the above examples, devices other than the magnetron RIE device are so-called remote plasma type devices, and high ion incident energy can be obtained by controlling the substrate bias independently of plasma generation.

[0025]

In the present invention, the etching for forming the groove portion on the Si substrate is performed under the conditions usually used for anisotropic etching of the SiOx film. That is, the Si substrate is etched under the condition that the deposition gas system is used and the ion / sputtering action is strengthened. Therefore, even if the natural oxide film grows on the surface of the Si substrate, the Si substrate is exposed because the etching rate of the Si substrate is slower than that of the natural oxide film unlike the breakthrough using the conventional chlorine-based gas. At that time, the etching rate drops sharply. Also, Si
When a base film made of a silicon oxide-based material film is previously formed on the substrate, the Si substrate is etched while maintaining the conditions for etching the base film. The etching rate drops sharply.

By making the etching of the Si substrate proceed at a low speed in this manner, it becomes possible to form a shallow groove with good controllability. In the case of an SOI substrate, the depth of the groove finally becomes an important parameter that defines the thickness of the Si active layer. Therefore, through the improvement of such controllability, the device formed in this Si active layer in a later step can be processed. It is possible to suppress variations in performance. When the present invention is applied to the formation of an extremely shallow groove portion in the next generation or later, the above-mentioned decrease in etching rate does not lead to any serious decrease in throughput.

Also, instead of chlorine-based gas or bromine-based gas,
By using a fluorocarbon-based compound or hydrofluorocarbon-based gas, etching is performed under the condition that physical ion / sputtering action has priority over chemical reaction by radicals, so that the surface orientation dependence of Si substrate, trenching, and loading effect. Both can be suppressed.

[0028]

EXAMPLES Specific examples of the present invention will be described below.

Example 1 In this example, a groove was formed by etching a Si substrate on which a thin SiOx underlayer film for preventing contamination was laminated using a c-C ₄ F ₈ / O ₂ / Ar mixed gas. The process of this embodiment will be described with reference to FIGS.

FIG. 1 shows a state in which a thin SiOx base film 2 having a film thickness of about 10 nm is formed on a Si substrate 1 by, for example, pyrogenic oxidation, and a resist mask 3 is further formed. Here, the resist mask 3 is
In the Si substrate 21, future island-shaped Si regions (reference numeral 1 in FIG. 7)
It is formed so as to cover the area to be ai) and expose the other area in the opening 4. Further, in the SiOx base film 2, impurities in the resist mask 3 are contained in the Si substrate 1.
It is provided as a contamination prevention film for preventing diffusion into the inside.

Next, as an example, the following conditions are used: etching device magnetron RIE device c-C ₄ F ₈ flow rate 5 SCCM O ₂ flow rate 4 SCCM Ar flow rate 100 SCCM gas pressure 2.7 Pa RF power 400 W (13.56 MHz) substrate Dry etching was performed at a temperature of 25 ° C.

This etching condition gives priority to the ion mode. At this time, the etching rate of the SiOx underlayer film 2 is about 124 nm / min, and the etching rate of the Si substrate 1 is about 22.1 nm / min. Here, 86
By performing etching for 2 seconds, a groove portion 1b having a depth of about 30 nm was formed as shown in FIG. Since the etching of the Si substrate 1 proceeds at a relatively slow rate as described above, the in-plane uniformity of the depth of the shallow groove portion 1b was 30 ± 3 nm, which was extremely good. This uniformity is a parameter that directly affects the thickness of the island-shaped Si active layer, because the convex portion 1a between the adjacent groove portions 1b is a portion that will later become the island-shaped Si active layer.

Further, since the natural oxide film was not formed on the surface of the Si substrate 1 on the way, unevenness did not remain on the bottom surface of the groove 1b.

By adopting the etching conditions that strengthen the ion sputtering action as described above, ion irradiation damage occurs in the region along the bottom surface of the groove portion 1b in the Si substrate 1, but this region is As will be described later, it is removed in the process of grinding and polishing the Si substrate 1 from the back surface side, so that it does not affect the final device characteristics.

Thereafter, ashing and wet etching are sequentially performed to remove the resist mask 3 and the SiOx base film 2 as shown in FIG.

Subsequently, as shown in FIG. 4, the Si substrate 2
A burying SiOx film 5 was formed on the entire surface of 1. This film formation is performed by, for example, O ₃ -TEOS atmospheric pressure CVD, O ₂ -TEO.
It was performed by a known CVD method such as S plasma CVD or H ₂ O-TEOS plasma CVD.

Next, this is flattened by, for example, CMP to obtain a flattened SiOx film 5p as shown in FIG.

Next, as shown in FIG. 6, a laminated body was produced in which another Si substrate 6 was bonded onto the flattened SiOx film 5p.

Further, the laminated body in this state was turned upside down, and mechanical grinding and chemical mechanical polishing were sequentially performed from the back surface side of the Si substrate 1. This chemical mechanical polishing flattens Si
The process was stopped when the Ox film 5p was exposed, and the Si substrate 1 was left as the island-shaped Si active layer 1ai as shown in FIG.

The thickness of the island-shaped Si active layer 1ai thus formed is substantially uniform in the same substrate and between different substrates, and unlike the one on the SIMOX substrate, the single crystal Si substrate is originally good. The crystallinity is maintained. When a thin film MOS transistor was formed in the island-shaped Si active layer 1ai, it was proved that excellent current driving capability and high speed operability could be achieved with good reproducibility.

Example 2 In this example, a SiOx underlayer film which is significantly thicker than that in Example 1 was used, and the groove was formed by etching using a CHF ₃ / O ₂ mixed gas. The process of this embodiment will be described with reference to FIGS.

FIG. 8 shows a thick SiOx film having a thickness of about 200 nm formed on the Si substrate 11 by, for example, pyrogenic oxidation.
The state in which the base film 12 is formed and the resist mask 13 is further formed is shown.

Next, just etching of the SiOx base film 12 was performed. The etching conditions at this time were, for example, an etching apparatus magnetron RIE apparatus CHF ₃ flow rate 75 SCCM O ₂ flow rate 8 SCCM gas pressure 6.6 Pa RF power 1200 W (13.56 MHz) substrate temperature 25 ° C.

In this embodiment, since the SiOx underlayer film 12 that is 20 times thicker than that in the first embodiment is used, the above etching conditions are made faster in order to prevent a decrease in throughput. Therefore, the etching rate of the SiOx base film 12 is about 350 nm / min. The just etching was completed in about 35 seconds, and the Si substrate 11 was exposed as shown in FIG.

Next, by etching the Si substrate 11 while maintaining the above etching conditions, a groove portion 11b as shown in FIG. 10 was formed. Si at this time
The etching rate of the substrate 11 was about 40 nm / min, and the grooves 11b could be formed with a very good uniformity of depth of about 30 ± 1 nm by etching for about 45 seconds. The subsequent steps, that is, the removal of the resist mask and the underlying SiOx film, the deposition and planarization of the burying SiOx film, the bonding with another Si substrate, and the formation of the island-shaped Si active layer by grinding / polishing are all performed. The same procedure as in Example 1 was performed.

In the present embodiment, when the single-wafer etching is premised, the etching end point of the SiOx underlayer film 12 is monitored for each substrate, and the etching time of the groove portion 11b is set as overetching against just etching until then. As a result, etching with higher controllability was made possible, and as a result, an island-shaped Si active layer having extremely excellent thickness uniformity could be formed.

By the way, in the etching of this embodiment, since the SiOx underlayer film 12 is formed to be thick to some extent, the resist mask 13 is removed once at or just before the end of the just etching, and thereafter, the SiOx base film 12 is removed. The Si substrate 11 may be etched using the almost completed pattern of the base film 12 as a mask. According to this method, particles derived from the resist mask can be reduced, and at the same time when the groove 11b is formed, SiO 2 is formed.
The thickness of the pattern of the x base film 12 can also be reduced. Therefore, it becomes possible to omit or reduce the wet etching for removing the SiOx base film 12.

SiOx / S under the above etching conditions
Since the i etching selectivity is about 8.75, SiOx
The thickness of the base film 12 is set to about 8.7 of the desired depth of the groove 11b.
If it is set to 5 times, ideally, the SiOx underlayer film 12 is almost removed at the same time when the groove 11b is completed. However, in reality, since the area to be etched is increased by removing the resist mask 13, it is necessary to remeasure the etching rate in advance.

The present invention has been described above based on the two embodiments, but the present invention is not limited to these embodiments.

For example, in each of the above-mentioned embodiments, the case where the SiOx underlayer film is provided on the lower layer side of the resist mask has been described. However, the present invention does not provide this.
That is, of course, it is also effective when the resist mask is directly formed on the Si substrate. If the SiOx base film is not provided, a natural oxide film having an irregular thickness grows on the surface of the Si substrate exposed at the bottom of the opening when the resist mask is formed. However, if the removal of the natural oxide film and the formation of the groove are continuously performed using the etching conditions for the SiOx film as described in each example, the Si substrate is rapidly etched even when the native oxide film is removed. Therefore, it is possible to form a groove portion having a uniform depth. Further, there is no fear that the Si surface step difference is emphasized and transferred to the bottom surface of the groove.

Besides, details such as the structure of the substrate and etching conditions can be changed as appropriate.

[0052]

As is apparent from the above description, according to the present invention, the depth of the groove, which is a parameter for determining the thickness of the Si active layer in the SOI substrate, is not affected by the natural oxide film. It is possible to control precisely. As a result, dozens of nanometers required for semiconductor devices of the next generation and beyond
It is possible to form a shallow groove portion of m order with good reproducibility. The present invention is also extremely economical because it does not require the development or purchase of special equipment, or the substantial modification of existing equipment when carrying out the invention.

[Brief description of drawings]

FIG. 1 is a schematic cross-sectional view showing a state in which a resist mask is formed on a Si substrate via a thin SiOx underlayer film in one embodiment of the method for manufacturing an SOI substrate of the present invention.

FIG. 2 shows SiOx according to etching conditions for SiOx film.
FIG. 3 is a schematic cross-sectional view showing a state in which the underlying film is removed and the groove portion is formed by etching the Si substrate continuously.

FIG. 3 is a schematic cross-sectional view showing a state where the resist mask and the SiOx base film of FIG. 2 are sequentially removed.

4 is a schematic cross-sectional view showing a state in which a burying SiOx film is deposited on the entire surface of the substrate of FIG.

5 is a schematic cross-sectional view showing a state in which the embedded SiOx film in FIG. 4 is flattened.

6 is a schematic cross-sectional view showing a state in which another Si substrate is bonded onto the flattened SiOx film of FIG. 5 to form a laminated body.

7 is a plan view of the laminated body of FIG. 6 in which a groove portion is formed on the Si substrate by grinding and polishing from the back surface side.
FIG. 3 is a schematic cross-sectional view showing a state in which an island-shaped Si active layer is formed.

FIG. 8 is a schematic cross-sectional view showing a state in which a resist mask is formed on a substrate via a thick SiOx underlayer film in another embodiment of the method for manufacturing an SOI substrate of the present invention.

FIG. 9 shows the Si of FIG. 8 under the etching conditions for the SiOx film.
FIG. 3 is a schematic cross-sectional view showing a state in which an Ox underlayer film is just etched.

FIG. 10 is a schematic cross-sectional view showing a state where a groove is formed by subsequently etching the Si substrate.

FIG. 11 is a schematic cross-sectional view showing a state in which a resist mask is formed on a substrate via a thin SiOx underlayer film in the conventional method for manufacturing an SOI substrate.

12 is a schematic cross-sectional view showing a state where the SiOx underlayer film of FIG. 11 is removed by breakthrough.

13 is a schematic cross-sectional view showing a state where a natural oxide film has grown on the exposed surface of the Si substrate of FIG.

FIG. 14 is a schematic cross-sectional view showing a state in which a natural oxide film is removed by breakthrough and then a groove portion having a bottom surface roughness and having a non-uniform depth is formed under etching conditions for Si.

FIG. 15 is a schematic cross-sectional view showing a state where the resist mask and the SiOx base film of FIG. 14 are sequentially removed.

16 is a schematic cross-sectional view showing a state in which a burying SiOx film is deposited on the entire surface of the substrate of FIG.

17 is a schematic cross-sectional view showing a state in which the embedded SiOx film in FIG. 16 is flattened.

FIG. 18 is a schematic cross-sectional view showing a state in which another Si substrate is bonded onto the flattened SiOx film in FIG. 17 to form a laminated body.

FIG. 19 is the Si of the laminated body of FIG. 18 in which the groove is formed.
FIG. 3 is a schematic cross-sectional view showing a state in which an island-shaped Si active layer is formed by grinding and polishing the substrate from the back surface side.

[Explanation of symbols]

 1, 11 Si substrate 1a, 11a Convex portion 1ai, 11ai Island-shaped Si active layer 1b, 11b Groove portion 2 (thin) SiOx underlayer film 3,13 Resist mask 5 Embedding SiOx film 5p Flattening SiOx film 6 (other) Si substrate 12 (thick) SiOx base film

Claims (5)

[Claims] 1. A first step of forming an etching mask on a silicon substrate, and dry etching according to anisotropic etching conditions for a silicon oxide-based material film to form a predetermined depth on the silicon substrate. A second step of forming a groove portion, a third step of removing the etching mask, a fourth step of filling the groove portion with a dielectric film, and a fifth step of flattening the surface of the dielectric film, A sixth step of adhering another substrate on the flattened surface of the dielectric film, and reducing the thickness of the silicon substrate from the back surface side thereof until the dielectric film is exposed at a position corresponding to the bottom surface of the groove portion. Thus, the method for manufacturing an SOI substrate, including the seventh step of leaving the silicon substrate in an island shape. 2. The method for manufacturing an SOI substrate according to claim 1, wherein the dry etching is performed under anisotropic etching conditions mainly of an ion mode using a gas containing at least a fluorocarbon compound or a hydrofluorocarbon compound. 3. A first step of forming a base film made of a silicon oxide based material film on a silicon substrate and further forming an etching mask on the base film, and anisotropic etching for the silicon oxide based material film. A second step of dry-etching the base film according to the conditions; a third step of continuously using the etching conditions to form a groove having a predetermined depth in the silicon substrate; and a step of filling the groove with a dielectric film. 4 steps, 5th step of flattening the surface of the dielectric film, 6th step of bonding another substrate on the flattened surface of the dielectric film, and 6th step at a position corresponding to the bottom surface of the groove part. A seventh step of leaving the silicon substrate in an island shape by reducing the thickness of the silicon substrate from the back surface side until the dielectric film is exposed. 4. The S according to claim 3, wherein the dry etching is performed under an anisotropic etching condition mainly based on an ion mode using a gas containing at least a fluorocarbon compound or a hydrofluorocarbon compound.
Manufacturing method of OI substrate. 5. The method for manufacturing an SOI substrate according to claim 3, wherein the base film is formed by thermal oxidation of the silicon substrate.