JPH08327721A - De-convolution circuit - Google Patents

Abstract

PURPOSE: To make the restoring property and the resolution excellent when distribution of target is observed in a radar equipment or the like. CONSTITUTION: The reflected wave of a transmitted pulse wave from a target is received 11 and 12, and the digital observed data are obtained in accordance with the reflected wave. The target distribution is obtained from the digital observed data and a predetermined equipment function. At this time, inverted filter processing is performed from the digital observed data (y (t)) and the equipment function h (t) in an inverted filter processing circuit 21, and the result of the inverted filter processing is obtained. In a signal surface processing circuit 22, the result of the inverted filter processing is used as the initial value, the signal-surface processing is performed by using, e.g. a Jacobi method or a Gauss-Seidel repeating method and the target distribution data are obtained.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a deconvolution circuit used when a pulse signal is transmitted in a radar device or the like to deconvolve the reflected wave, and more particularly to a target distribution (original signal source). The present invention relates to a deconvolution circuit for improving resilience to a waveform).

[0002]

2. Description of the Related Art Generally, in a pulse radar device, after transmitting pulsed electromagnetic waves, a receiving device observes a reflected wave from a predetermined target distribution waveform (true signal source waveform, here x (i)). To get the waveform. However, the influence of the pulse width of the electromagnetic wave transmitted from the radar device (transmission circuit), the antenna beam width, the bandwidth of the reception circuit (generally set to 1.2 / transmission pulse width (sec)) As a result, the waveform obtained as described above becomes a waveform different from the original target distribution function waveform.

Therefore, in general, a device function is calculated in advance based on a pulse width, an antenna beam width, etc., and a target distribution waveform is obtained from this device function and waveform data (waveform data obtained by observation by a receiving device). Calculation is performed, and as such a processing calculation method, a processing calculation method called a so-called deconvolution method is known.
A circuit using this deconvolution method is called a deconvolution circuit here. The Ticonvolution method is roughly classified into a Fourier surface processing method and a signal surface processing method.

Here, FIG. 8 outlines a conventional radar apparatus using a deconvolution circuit. The illustrated radar device includes an antenna 11, a receiving circuit 12, a radar indicator 13, a deconvolution processing circuit 14, and a display circuit 15 (note that the transmitting side circuit is not shown in this radar device). .

As described above, it is assumed that the reflected wave is received by the antenna 11, amplified by the receiving circuit 12 and sent to the radar indicator 13, and the reflected wave displayed in PPI in real time is observed by the operator. Now, as the range direction range including the specific echo display position by the operator, for example, the range bin of 256 to 512, and the azimuth direction specified range, for example, from 0.0 [°] to 30.0
It is assumed that a range of [°] is specified (assuming that 256 transmission and reception waves are observed in this range), the observation waves in this range are given to the radar indicator and the signal surface processing circuit. 14 shall also be transferred. When the A / D circuit is incorporated in the output stage of the receiving circuit 12, the observation data is transferred to the signal surface processing circuit 14 in the form of a digital signal, and the A / D circuit is incorporated in the output stage of the receiving circuit 12. If not, the signal surface processing circuit 14
It is assumed that the observation data (y (i)) is created by D conversion.

The deconvolution processing circuit 14 calculates the target distribution waveform by the deconvolution method. The data required for this calculation is the observation data (y
(I)) and the device function (h (i)) calculated in advance
, And y (i) (i = 0, 1, 2, ..., N) is 1 when performing the processing calculation in the radar range direction.
It means a received data waveform continuous in the range direction obtained by A / D converting the received waveform in a predetermined range during the sweep period. Similarly, when performing the calculation related to the azimuth direction,
y (i) means received waveform data that is continuous in the azimuth direction.

The deconvolution processing circuit 1 of FIG.
When the Fourier surface processing method is used as 4, the y (i) and h (i) are respectively Fourier-transformed and then processed in the frequency domain, and the result is further inversely Fourier-transformed. x
It is based on the idea that as a result of (i) passing through the waveform transformation element (transfer function: H (s)), the waveform is transformed into the waveform of y (i). Where H (s) is the device function (h (i))
Is obtained by Fourier transform of. The main processing in the frequency domain is only Y (s) / H (s).

This Fourier surface processing method requires a shorter processing time than the signal surface processing method, but on the other hand, it has a drawback that it is vulnerable to noise because it performs division as described above.

Next, the processing operation when the signal surface processing method is used as the deconvolution processing circuit 14 of FIG. 8 will be described.

In general, the observation data (y (i)) is expressed by the convolutional relationship between x (i) and h (i) as shown in equation 1.

[0011]

[Equation 1]

In the signal surface processing, the signal source waveform (x (i)) and the observed waveform (y (i)) are expressed by simultaneous linear equations shown in equation 2.

[0013]

[Equation 2]

Here, a vector having x _i as an element is x, a vector having y _i as an element is y, and h _ij
Letting H be a matrix having as an element, the relationship between the matrix H and the vectors x and y can be expressed by Equation 3.

[0015]

(Equation 3)

In Equation 3, y is composed of N consecutive reception data obtained by A / D converting the signal waveform of the specific section within the radar reception signal waveform in one sweep or one scan period. When y is observation data continuous in the range direction, H is obtained by arranging the response functions in the range direction laterally offset by one step in the vertical direction. When solving Equation 3 with x as an unknown number,
Various numerical calculation methods are used. At this time, since there is a value only in the parietal region of the diagonal element of H, the Jacobi iteration method or the Gauss-Seidel iteration method is used.

If there is additive noise, it is added to the vector n
When expressed by, the expression 3 is expressed by the expression 4.

[0018]

[Equation 4]

Focusing on the observation data y (i) and Hx (i), y (i) and Hx (i) are obtained from independent systems, and the matrix operation of H and x (i) is It is nothing but the convolution operation of the signal source waveform and the device function. Therefore, when h is an appropriate device function and the additive noise included in the observation data y (i) is sufficiently small, y (i) and Hx (i) should be equal. In fact, since y (i) contains additive noise that cannot be ignored, the conditional expression of the least-squares method that minimizes the absolute value of the difference between the two (the first derivative of the absolute value of the difference between the two is set to zero). The optimal x from
(I) can be calculated. This result is shown in Equation 5.

[0020]

(Equation 5)

When the equation 5 is transformed, the equation 6 is obtained.

[0022]

(Equation 6)

[0023] In other words, than solving a system of linear equations represented by the number 3 for x, replace the H in (H ^T H), y
The When solving the simultaneous linear equations is replaced by H ^T y in Jacobi method or Gauss-Seidel iteration method obtains the x, so that the effective solution vector x is calculated. Then, (H ^T H) obtained in advance ^-1, be stored in a memory circuit, etc., seeking H ^T y each time to obtain a new observation data, applying this to (H ^T H) ^-1 X can be obtained by As a result, processing can be performed in a shorter time than solving simultaneous linear equations of N rows.

[0024]

By the way, (H ^T H)
^The inverse matrix operation represented by ^-1 becomes more difficult as the order N of the matrix increases, and a solution may not be obtained.
Therefore, every time new observation data is obtained, the simultaneous linear equations of the Nth order shown in the equation 6 are solved for x using the iterative method.

The convergence conditions of the Jacobian method and the Gauss-Seidel method are written by Ichiro Kawakami. Numerical calculation for mathematics of science and engineering. According to page 101 published by Iwanami Shoten, matrix element h of matrix H
_{If ij} is used, it is said that the _equation 7 is obtained.

[0026]

(Equation 7)

According to page 95 of the same book, a solution vector can be obtained only after convergence. However, in practice, as the value of the H matrix, h _ij = h
_In some cases, the norm calculated by Equation 7 is close to 1.0. Furthermore, if a poorly suited H-matrix is used and the additive noise can suddenly grow, it is likely that no convergent solution will be obtained or a very large number of iterations will be required. In the above cases, iterative calculation is often performed by giving an initial value closer to the signal source waveform. Generally, when setting the initial value, the observation data y multiplied by a coefficient is used as the initial value. However, with such initial value settings, when two targets placed close to each other are set, the original signal source waveform often cannot be restored.

An object of the present invention is to provide a deconvolution circuit capable of accurately restoring the original signal source waveform.

[0029]

According to the present invention, the reflected waves from several targets placed in advance close to each other are received, and the observed data are obtained according to the reflected waves, and the observed data are calculated in advance. Used when obtaining a target distribution based on the device function, inverse filter processing means for performing inverse filter processing based on the observation data and the device function to obtain an inverse filter processing result, and the inverse filter processing result The deconvolution circuit is characterized by having a signal surface processing means for performing the signal surface processing processing by using as an initial value to obtain the target distribution, and the signal surface processing means, For example, the signal surface processing is performed by the iterative calculation method based on the Jacobi method or the Gauss-Seidel method.

[0030]

In the present invention, since the signal surface processing is performed by using the result of the inverse filter processing as the initial value data, it is possible to improve the resilience and resolution when observing the target distribution.

A conditional expression that minimizes the square of the difference between the calculated values of the observation data y (i) and Hx (i) (this is equivalent to the convolution of the device function and the source waveform) (differential expression The additive noise level can be reduced by calculating the source waveform x (i) from zero.

[0032]

EXAMPLES The present invention will be described below with reference to examples.

Referring to FIG. 1, in the illustrated radar device, the same components as those of the radar device shown in FIG. 8 are designated by the same reference numerals and the description thereof will be omitted. The illustrated radar device includes an inverse filter processing circuit 21, and the inverse filter processing circuit 21 receives observation data (y (i)). The output of the inverse filter processing circuit 21 is the signal surface processing circuit 2
Given to 2.

The inverse filter circuit 21 includes a received signal symmetry circuit, an FFT circuit, a division circuit, an IFFT circuit, and a storage circuit (neither is shown), and the storage circuit has a transfer function (H (s)). Is remembered. Like above-mentioned,
If x (t) changes to observation data y (t) by passing through the transfer function H (s), Y (s) = H
(S) · X (s) holds. Y (s) is y (t) F
It is a frequency function obtained by FT, and X (s) is x
It is a frequency function obtained by FFT of (t). In principle, X (s) = Y (s) / H (s) is used to obtain X (s), and this X (s) is IFFTed to obtain x
(T) can be obtained (Note that the inverse filter processing circuit 21 is described in detail in Japanese Patent Application No. 6-147 and Japanese Patent Application No. 6-198930. Is omitted). The output of the inverse filter circuit 21 is given to the signal surface processing circuit 22.

In general, when a video signal of the radar reception signal is processed, it is not necessary to consider a value of zero or less. Therefore, when a calculation result of zero or less is obtained during the iterative calculation by the Gauss-Seidel method, In general, it is common to replace this with a value that has been multiplied by a coefficient and is close to zero. FIG. 2 shows an example of a calculation circuit based on the Gauss-Seidel method calculation program example, omitting the process of changing the value close to zero. The supplementary explanation of FIG. 2 will be described below.

First, of the received signals of one sweep of the conventional pulse radar, N consecutive signals in a specific distance direction or range direction are selected.
When the individual data is transferred from the conventional radar receiving circuit and the signal processing is performed by the circuit shown in the figure, it functions as follows.

The initial value data transferred from the inverse filter processing circuit is stored in the initial value storage circuit 41 (having N array memories).

The variable i means the number of clocks of i clocks. When written as a subscript of a matrix or a vector, it represents a memory array number, j clocks are output N times during one i clock period, and one value of a vector having N data elements is represented. J clocks are required N times to calculate. When the i clock is output N times, one iterative calculation by the Gauss-Seidel method ends. The solution vector x [i] (i = 0, 1, 2, ..., N-1) is corrected to a value close to the true signal source vector at each iterative calculation. The solution vector x [i] is composed of N elements,
The configuration is such that only the newest value that is stored in the memory array at address N and is modified is stored in this array memory.
With respect to the calculation for the second time, an initially set value (here, the output value of the inverse filter processing circuit) is stored in this memory.

Next, a solution vector consisting of N elements, N
Observation data consisting of individual elements are prepared, of which ii
The calculation regarding the th vector element will be described using mathematical expressions. Regarding the calculation for i = ii, the following (1) and (2) are performed.

(1) The error of the observed data estimated by the convolution operation of the vector obtained by converting the observed data into H ^T y [ii], the device function converted into H ^T H, and the solution vector is calculated by the equation (8). Ask for.

[0041]

(Equation 8)

(2) The solution vector x [ii] is corrected by adding the error calculated in (1) to the ii-th element x [ii] of the previous solution vector (x [ii] = x [I
i] + d).

This equation is for i = ii, where i =
From 0 to i = N−1, the same operation as in the case of i = ii is performed, and the operation for the first iteration number is performed for one observation data that is continuous in the azimuth direction or the distance direction composed of N pieces of data. To finish. The same calculation is performed for the second iteration. The solution vector having N elements is corrected once for each iteration.

The circuit shown in the figure operates in synchronization with the i clock and the j clock, and when the i clock is output N times, the arithmetic processing for one iteration is completed. It is assumed that the i clock is output once when the j clock is N times. Here, one rise or fall of the clock is called one clock.

In synchronization with the i clock, x [0], x
The elements of the solution vector are taken out to the output of the latch circuit 34 in the order of [1], ..., X [N−1], and are prepared at the B input terminal of the multiplication circuit 32.

Here, the solution data x (i) (i = 0, 1,
, N-1) is represented by a vector x [i], and i of [i]
The value represents the element number. Here, in the iterative method, the first solution vector x [ii] (ii = 0, 1, 2, ..., N-1) is not defined and must be initialized. The first x (i) (i = 0, 1, ..., N-1) (: x [i]) is transferred from the inverse filter processing circuit, and this is the input data of the illustrated circuit.

Observation data y (i) (i = 0, 1, ..., N
-1) represents N pieces of observation data continuous in the range direction or the azimuth direction of the vector y [i], and is represented by the vector y. Y is converted into H ^T y according to the conditional expression of the least squares method, and H ^T
The calculation result of y is stored in the storage circuit 38 in advance, and H ^T y [0] is used for the 0th i clock, H ^T y [1] is used for the first i clock, and is used for the second i clock. H ^T y
It is assumed that [2], ..., H ^T y [N−1] are read from the storage circuit 38 and prepared on the input side of the adder circuit 39.
Here, the storage circuit 38 in which the vector H ^T y is stored
Shall be addressed by the number of i clocks that output N clock pulses. However, both the i clock and the j clock have N clock pulses, but the i clock is output once every j clocks output N times. Further, the matrix H is converted into H ^T H as described above, H ^T H have been previously stored in the storage circuit 31, at the 0-th j clock H ^T H [0]
^{[0], H T H [} 0] in the first round of the j clock [1],
H ^T H [0] in the second round of j clock [2], ... it is read out from the memory circuit 31, and is provided to the input side of the terminal A of the multiplier circuit 32.

[0048] H ^T H [i] is the addressing circuit of the memory circuit 31 [j] is stored are inputted j clock and i clock, further jb times from the time of i _a single i clock is input H ^T at the time when the j clock of
It is assumed that the value of H [ia] [jb] is read from the storage circuit 31 and is prepared at the input side terminal A (upper side terminal) of the multiplication circuit 32.

The j clock is used for each circuit 31, 32, 36, 4
It is commonly input to 1. i clock is used for each circuit 33,
It is commonly input to 38, 31, 41, 43 and 34. However, the multiplication circuit 32 needs a predetermined clock which is required for the multiplication operation having a cycle shorter than the i clock, and the division circuit 33 has a predetermined clock which is required for the division operation having a cycle shorter than the i clock. Needless to say, the clock of is necessary. After the above initialization, the following calculation is performed.

(1). Computing j clock = 0 number of iterations first time, i H ^T H [0] to the A input terminal of the adding circuit 35 at the time of the rising edge of the clock = 0 [0] · x
[0], 0 is prepared for the B input terminal of the adder circuit 35.
j clock = 0, i clock = These addition results at the time of the fall of 0 is latched in the latch circuit 10, at the output side of the latch circuit 10, H ^T H [0] to the B input terminal of the adding circuit 35 [0] and x [0] are prepared.

[0051] j clock ^{= 1, i H T H [} 0] on the rising time of the clock = 0 [1] · x [ 1] of the operation result is provided to the A input terminal of the adding circuit 35, the adder circuit 35 addition of the H ^T H [0] of the B input terminal [0] · x [0] is performed. At the falling edge of j clock = 1 and i clock = 0, these additions are completed, the result is latched by the latch circuit 10, appears on the output side of the latch circuit 10, and is added to the B input terminal of the addition circuit 35. the ^{H T H [0] [0} ]
X [0] + H ^TH H [0] [1] .x [1] are prepared.

[0052] j clock = 2, i clocks = at the time of the rise of the ^{0 H T H [0] [} 2] · x [2] of the calculation result is provided to the A input terminal of the adding circuit 35, the adder circuit 35 H ^T H of the input terminal B [0] [0] · x [0] + H T H
Addition with [0] [1] · x [1] is performed. At the falling edge of j clock = 2 and i clock = 0, these additions are completed, the result is latched by the latch circuit 10, appears on the output side of the latch circuit 10, and the addition circuit 35
The B input terminal ^{H T H [0] [0} ] · x [0] + H T H
[0] [1] · x [1] + H ^T H [0] [2] · x
[2] is prepared. As described above, j clock =
At the time of the fall of N−1, i clock = 0, the value shown in Formula 9 is prepared on the output side of the latch circuit 10.

[0053]

[Equation 9]

Since the i clock is in the state of i = 0, the output of the memory circuit 38 is H ^T y [0] at the time of i = 0.
Has become, H ^T H [0] is the A input terminal of the divider circuit
Since [0] is prepared, the value shown in Expression 10 appears on the output side of the division circuit 33.

[0055]

[Equation 10]

The value of d is input to the A input terminal of the adder circuit 40. In addition, the B input terminal of the adder circuit 40 is provided with the first element x [0] of the initialization value solution vector obtained from the inverse filter processing circuit, and is modified as x [0] + d. This is stored in [0] of the memory circuit 43.
The storage of x [0] is performed in synchronization with the rise of the i clock. At this point, the calculation for i = 0 ends, and the correction calculation of the second element of the solution vector starts.

[0057] j clock = 0, i to the A input terminal of the clock = addition circuit 35 1 at the rising time point H ^T H [1]
[0] · x [0], 0 is prepared for the B input terminal of the adder circuit 35. j clock = 0, i clock = 1 These addition results at the time of the fall of is latched in the latch circuit 10, at the output side of the latch circuit 10, H ^T H [1] to the B input terminal of the adding circuit 35 [0] and x [0] are prepared.

[0058] j clock = 1, i clock = H ^T H [1] at the time of rise of 1 [1] · x [1 ] of the operation result is provided to the A input terminal of the adding circuit 35, the adder circuit 35 addition of the ^{H T H [1] [0} ] · x [0] of the B input terminal is performed. At the falling edge of j clock = 1 and i clock = 1, these additions are completed, the result is latched by the latch circuit 10, appears on the output side of the latch circuit 10, and the B input terminal of the addition circuit 35. the ^{H T H [1] [0} ]
X [0] + H ^TH H [1] [1] .x [1] are prepared.

[0059] j clock = 2, i clock = H ^T H [1] at the time of rise of 1 [2] · x [2 ] of the calculation result is provided to the A input terminal of the adding circuit 35, the adder circuit 35 H ^T H [1] of the B input terminal [0] · x [0] + H T H
[1] [1] · x [1] is added. At the falling edge of j clock = 2 and i clock = 1, these additions are completed, the result is latched by the latch circuit 10, appears on the output side of the latch circuit 10, and the addition circuit 35
The B input terminal ^{H T H [1] [0} ] · x [0] + H T H
[1] [1] .x [1] + H ^T H [1] [2] .x
[2] is prepared. As described above, j clock =
At the time of the fall of N−1, i clock = 1, the value shown in Formula 11 is prepared on the output side of the latch circuit 10.

[0060]

[Equation 11]

Since the i clock is in the state of i = 1, the output of the memory circuit 38 is H ^T y [1] at the time of i = 1.
Has become, H ^T H [1] to the A input terminal of the divider circuit
Since [1] is prepared, the value shown in Expression 12 appears on the output side of the division circuit 33.

[0062]

(Equation 12)

The value of d enters the A input terminal of the adder circuit 40. In addition, the B input terminal of the adder circuit 40 is provided with the second element x [1] of the initial set value solution vector obtained from the inverse filter processing circuit, and is modified as x [1] + d. This is stored in [1] of the memory circuit 43. The storage of x [1] is performed in synchronization with the rise of the i clock. At this point, the calculation for i = 1 ends,
Move on to the correction operation of the third element of the solution vector. Similarly, when the calculation for i = N−1 is completed, the value shown in Expression 13 is calculated.

[0064]

(Equation 13)

Based on this, the correction is made as x [N-1] + d, and the correction result is the solution vector storage circuit [N-1].
Is stored in and the processing operation for the first iteration is completed.

At this point, the switch circuit 42 connects the output side of the solution vector storage circuit 43 and the B input terminal of the adder circuit 40.

Subsequently, i clock = 0, j clock = 0
Then, the same processing operation as before is executed (specifically, returning to the above calculation of the number of iterations for the first time).

As described above, every time the i clock is output N times, the solution vector having N point elements is corrected,
When the i clock is output N * mp times, it means that mp iterative calculations have been executed.

Here, with reference to FIGS. 3 to 7, it is assumed that the observation value shown in FIG. 3 is obtained as the observation value (y (t)) (here, two radar vessels are used for two ships in close proximity to each other. Received data obtained by observing in. Assuming that the device function shown in FIG. 4 is obtained as the device function (h (t): pattern measurement data), the target distribution shown in FIG. 5 is obtained in the deconvolution circuit shown in FIG. A waveform was obtained.

On the other hand, in the deconvolution circuit shown in FIG. 1, the inverse filter processing circuit 21 obtains the inverse filter processing waveform shown in FIG. A standard distribution waveform was obtained.

As can be easily understood from the above results,
It can be seen that the resilience and the resolution can be improved by using the output data of the inverse filter processing circuit as the initial value data when observing the close target distribution.

[0072]

As described above, according to the present invention, the inverse filter processing is performed using the observation data and the device function, and based on the processing result, that is, the processing result is used as the initial value data. As a result, the restoration and resolution when observing the target distribution can be improved.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of a radar device using a deconvolution circuit according to the present invention.

FIG. 2 is a block diagram for explaining an embodiment of the signal surface processing circuit shown in FIG.

[Fig. 3] Observation values (y
(I)) is a waveform diagram showing (i = 0, 1, 2, ..., N-1).

FIG. 4 is a waveform diagram showing a device function (h (i)) (i = 0, 1, 2, ..., 2N−1) created from an antenna pattern function.

FIG. 5 is a diagram showing an example of a target distribution waveform obtained by a deconvolution circuit using only a conventional signal surface processing method.

6 is a diagram showing an example of an output waveform (inverse filtering waveform) from the inverse filtering circuit shown in FIG.

FIG. 7 is a diagram showing an example of a target distribution waveform by a deconvolution circuit that has been subjected to signal surface processing using the output value of the inverse filter shown in FIG. 1 as an initial value.

FIG. 8 is a block diagram showing a radar device using a conventional deconvolution circuit.

[Explanation of symbols]

11 antenna 12 receiving circuit 13 radar indicator 14 deconvolution circuit (deconvolution processing circuit) 22 signal surface processing circuit 15 display circuit 21 inverse filter circuit

Claims (2)

[Claims] 1. When a pulse-modulated electromagnetic wave is transmitted, a reflected wave is received from a target object, A / D-converted observation data is obtained according to the reflected wave, and the A / D-converted observation data and a radar used. It is used to obtain a target distribution closer to a signal source waveform that is more accurate than the observation data based on an antenna beam of the device or a predetermined device function calculated by the transmission pulse width, and the observation data and the device Inverse filter processing means for performing inverse filter processing based on a function to obtain an inverse filter processing result, and signal surface processing means for performing signal surface processing using the inverse filter processing result as an initial value to obtain the target distribution data. A deconvolution circuit having: 2. The deconvolution circuit according to claim 1, wherein the signal surface processing means is a method of solving simultaneous linear equations by an iterative method, here the Jacobian method or the Gauss-Seidel iterative method. A deconvolution circuit characterized by performing processing.