JPH0832470B2 - Dot pattern converter - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a dot pattern conversion device for enlarging or reducing a dot pattern of characters, figures, etc., for example, a printer device, a cathode ray tube (CRT) controller, etc. It is applicable to a device having a dot pattern output section.

[Prior Art] In a conventional dot pattern conversion apparatus, when reducing, according to the scaling factor, a predetermined number of consecutive lines are OR-processed to reduce the number of lines, and enlargement is also performed. In order to multiply, the predetermined number of lines are duplicated and output, and the number of lines is increased to perform scaling.

For example, when the character “H” consisting of 12 rows and 12 columns as shown in FIG. 3 is reduced by 2/3 in the horizontal direction, it is grouped into 3 columns in the horizontal direction and the latter 2 columns of each group are ORed. It was processed and reduced. That is, the first column ~
The dot pattern of the first column L1 of the third columns L1 to L3 is output as it is as the converted dot pattern of the first column M1, and the dot patterns of the second column L2 and the third column L3 are OR-processed and converted. The dot pattern of the second row M2 after that,
Row to 6th row L4 to L6, 7th row to 9th row L7 to L9, 10th row to 10th row
Similarly, for each group of 12 columns L10 to L12, the latter half of the fifth column L5 and the sixth column L6, the eighth column L8 and the ninth column L9, the eleventh column L1.
The first and twelfth columns L12 were ORed to obtain a 2/3 times reduced dot pattern.

Here, the OR processing means that if there is a dot in any of the same rows of the two target columns, there is also a dot in the converted column, and if there is no dot in any of the columns, the converted column Also, it means the process to eliminate the dot.

By this conversion process, the dot pattern of FIG.
The dot pattern is reduced as shown in FIG.

Also in the vertical direction, the conventional dot pattern conversion device performs the same processing.

Further, in the dot pattern conversion device that performs the enlarging operation, the dot pattern of the predetermined line of the group is repeatedly output and enlarged.

[Problems to be Solved by the Invention] By the way, in the case of a dot pattern conversion device that multiplies an original dot pattern by an integer, since dot patterns of all lines are output in duplicate, the dot pattern after conversion is performed even in such a conversion direction. Had a good balance.

However, when the magnification is an unequal magnification or an unequal magnification other than this, conversion is performed without considering the number of dots in each column or each row. The original dot pattern of the character is
As is clear from FIG. 4, conversion often resulted in non-target. In addition, the original dot pattern of a non-target character may be converted so that its important line becomes thinner than other lines. In other words, it often happens that a well-balanced character becomes a poorly balanced character due to the conversion, and the display quality and the print quality are deteriorated.

The present invention has been made in consideration of the above points,
An object of the present invention is to provide a dot pattern conversion device in which a converted dot pattern can be balanced in the horizontal and vertical directions.

[Means for Solving the Problem] In order to solve the problem, according to the first aspect of the present invention, in a dot pattern conversion device that reduces a dot pattern of a character or a graphic by a non-uniform ratio in a predetermined direction, a reduction ratio in a predetermined direction is reduced. Group means for grouping the original dot patterns into several lines in accordance with the above, dot pattern storage means for storing the dot pattern of each line in one group, and dot pattern of each line stored in this dot pattern storage means A dot number detecting means for detecting the number of dots, and a thinning line determining means for determining a line to be thinned out based on the detected dot number information,
The dot pattern storage means is provided with a dot pattern reduction means for reading out the dot pattern of each line from the dot pattern storage means, executing thinning processing to reduce the number of lines when outputting the thinned lines, and outputting the number of lines for each group. The original dot pattern is reduced and converted by executing.

Further, according to the second aspect of the present invention, in a dot pattern conversion apparatus for enlarging a dot pattern of a character or a figure in a predetermined direction by an unequal ratio, a group for grouping original dot patterns by several lines in accordance with an enlargement ratio in a predetermined direction. Means, dot pattern storage means for storing the dot pattern of each line in one group, and dot number detection means for detecting the number of dots of the dot pattern of each line stored in this dot pattern storage means, Duplication output line determination means for deciding the line to be subjected to the duplication output processing based on the dot number information, and the dot pattern of each line is read from the dot pattern storage means, and the duplication output processing is executed in the case of the line for the duplication output processing. Each group is provided with a dot pattern increasing means for increasing the number of lines and outputting. To execute the line number increased work in the so as to enlarge converting an original dot pattern.

[Operation] In both the first and second aspects of the present invention, when unequal magnification reduction or unequal magnification enlargement is performed, the reduction or enlargement operation is repeated for every several lines determined according to the magnification to reduce or enlarge the whole. Therefore, the grouping circuit specifies several lines related to one reduction operation or one expansion operation.

In the first aspect of the present invention, the dot patterns of several lines are once stored in the dot pattern storage means, and then the dot number detection means detects the number of dots in each line, and based on this detection result. When the thinning line determination means determines the line to be thinned out and the dot pattern reduction means reads out and outputs the dot pattern from the dot pattern storage means, the dot pattern of the determined line is thinned and output. did.

Further, in the second aspect of the present invention, after the dot patterns of the several lines that have been grouped are temporarily stored in the dot pattern storage means, the dot number detection means detects the number of dots in each line, and based on this detection result. When the overlapping output line determining means determines the line to be subjected to the overlapping output processing, and the dot pattern enlarging means reads out and outputs the dot pattern from the dot pattern storing means, the dot pattern of the determined line is subjected to the overlapping output processing and output. I chose

As a result, since the scaling processing is performed in consideration of the number of dots in each line, it is possible to obtain a well-balanced dot pattern after conversion.

Embodiment An embodiment of the present invention will be described in detail below with reference to the drawings.

Since the horizontal scaling method and the vertical scaling method are the same, the horizontal direction will be described in detail below. In the following, a case of multiplying by 2/3 will be described as an example.

Also in this embodiment, the processing of grouping the lateral examples according to the scaling factor is the same as that of the conventional apparatus, and the grouped three-row dot patterns are stored in the three dot pattern storage shown in FIG. It is temporarily stored in registers 11, 12, and 13. The control circuit 2 controls the entire dot pattern conversion device, and includes a dot pattern storage register.
When the dot patterns of each column of the group are stored in 11 to 13, the first dot pattern storage register 11 is set in the decoder 3.
A control signal S1 for instructing that the dot pattern stored in the storage register 11 is read out and output to the counter circuit 4. The counter circuit 4 counts the number of dots in the incoming dot pattern. The above-mentioned control signal S1 is applied to the counter circuit 4, and the count value is stored in the first dot number storage register 51 corresponding to the first dot pattern storage register 11 based on this control signal S1.

The control circuit 2 then changes the control signal S1 to instruct the second dot pattern storage register 12 to cause each circuit to perform the same operation as described above, and stores it in the second dot pattern storage register 12. The number of dots of the formed dot pattern is stored in the second dot number storage register 52. Similarly, the number of dots of the dot pattern stored in the third dot pattern storage register 13 is stored in the third dot number storage register 53.

The dot number minimum column detection circuit 6 detects the smallest dot number stored in the first to third dot number storage registers 51 to 53, and stores the dot pattern having the smallest dot number. The detection signal S2 instructing the pattern storage register is output to the control circuit 2. Here, when there are two or more dot patterns having the minimum number of dots, the detection signal S2 for instructing the dot pattern storage register corresponding to the column with the smallest column number is output to the control circuit 2.

The control circuit 2 determines two columns to be OR-processed based on the detection signal 2. If the column having the smallest number of dots is not the last column in the group, it is determined that the column having the smallest number of dots and the column next to the column having the smallest number of dots are subjected to OR processing. Further, if it is the last column of the group of columns having the smallest number of dots, the column having the smallest number of dots and the column immediately before it are determined as the columns to be OR-processed.

After such a determination, the control circuit 2 gives the control signal S1 to the decoder 3 to sequentially output the dot patterns from the first to third dot pattern storage registers 11 to 13. If the read dot pattern is the dot pattern of a column that is not OR-processed, the control circuit 2 outputs the incoming dot pattern as it is, and if it is the dot pattern of the front line that is OR-processed, the control circuit 2 once stores it in the internal register 21. If the dot pattern of the rear row to be stored and ORed is registered, the register 21
The dot pattern stored in is processed and output.

In this way, the grouped three-row dot patterns are converted into two-row dot patterns and output. The other groups are processed in the same manner as described above to convert the dot patterns of three rows into the dot patterns of two rows and output the dot patterns.
In this way, the dot pattern of the character multiplied by 2/3 can be obtained.

Next, the original dot pattern shown in FIG.
The process of multiplying by 3 will be described.

Initially, the dot patterns in the first to third columns L1 to L3 are respectively stored in the first to third dot pattern storage registers 11 to
Stored in 13. After this storage, the dots are sequentially read, the number of dots is counted by the counter circuit 4, and stored in the first to third dot number storage registers 51 to 53. In this case, “2”, “12”, and “12” are the dot number storage register 51.
Stored in ~ 53.

Therefore, the minimum dot number column detection circuit 6 gives the control circuit 2 the detection signal S2 instructing the first column L1. Control circuit 2
Determines the first column L1 and the second column L2 as columns to be OR-processed. After the determination, the control circuit 2 determines that the first column L1
The dot pattern is read from the first dot pattern register 11 and stored in the internal register 21. Next, the dot pattern of the second row L2 is read from the second dot pattern register 12, and the first row L1 stored in the register 21 is read.
The first after converting while taking the dot pattern and OR processing
Output as a dot pattern for column N1. Next, the control circuit 2 reads the dot pattern of the third column L3 from the third dot pattern enable register 13 and directly converts it into the second column.
Output as N2 dot pattern.

In this way, the first to third columns L1 to L3 of the original dot pattern of FIG. 3 are converted into the dot patterns of the first column N1 and the second column N2 as shown in FIG.

When the conversion process for the first to third columns is completed, the control circuit 2 causes the fourth to sixth columns L4 to L4 of the original dot pattern.
The dot patterns L6 to L6 are stored in the first to third dot pattern storage registers 11 to 13. After this storage, the dots are sequentially read, the number of dots is counted by the counter circuit 4, and stored in the first to third dot number storage registers 51 to 53. In this case, "3", "1", and "1" are stored in the dot number storage registers 51-53.

Therefore, the dot number minimum column detection circuit 6 gives the detection signal S2 for instructing the fifth column L5 to the control circuit 2. Control circuit 2
Determines the fifth column L5 and the sixth column L6 as columns to be OR-processed. After the determination, the control circuit 2 reads the dot pattern of the fourth column from the first dot pattern register 11 and outputs it as it is as the converted dot pattern of the third column N3. Next, the control circuit 2 reads the dot pattern of the fifth column L5 from the second dot pattern register 12 and stores it in the built-in register 21. Then the 6th
The dot pattern of column L6 is the third dot pattern register
The fourth column after being read from 13 and converted while taking the OR pattern with the dot pattern of the fifth column L5 stored in the register 21
Output as N4 dot pattern.

In this way, the dot patterns of the fourth to sixth columns L4 to L6 of the original dot pattern of FIG. 3 are converted into the dot patterns of the third column N3 and the fourth column N4 as shown in FIG. It

Thereafter, in the same manner, the seventh to ninth columns of the original dot pattern
The dot patterns in the rows L7 to L9 have the smallest number of dots in the dot pattern in the seventh row L7, so the seventh row L7 and the eighth row L8
Is output after the dot pattern of the
The dot pattern of L9 is output as is. In addition, the dot patterns in the 10th to 12th columns L10 to L12 of the original dot pattern have the smallest number of dots in the dot pattern in the 12th column L12, so the dot pattern in the 10th column L10 is output as it is. The dot patterns of the 11th row L11 and the 12th row L12 are OR-processed and then output.

In this way, the original dot pattern of FIG.
It is converted into a reduced dot pattern as shown in the figure.

Therefore, according to the above-described embodiment, the column with the smallest number of dots is detected among the columns grouped for the conversion process,
Since the column is merged with any one of the columns before and after it and reduced and converted, the width of the vertical line, which is an important element of the character, can be balanced even after the conversion.

In addition, in the above-described embodiment, the case of reducing the size in the horizontal direction has been described, but the size can be similarly reduced in the horizontal direction.

Further, although the case where the reduction ratio is 2/3 is described, the invention can be applied to other reduction ratios. In this case, if the reduction ratio is a ratio in which the denominator and the numerator are different by 2 or more, the number of sets of columns to be OR-processed in the group is 2 or more. Therefore, it is necessary to detect 2 or more columns having a small number of dots. .

Further, in the above-described embodiment, the case of reducing the size has been described, but the same can be applied to the case of increasing the size. In this case, the dot pattern of the row determined by the information about the number of dots may be output twice in succession. Depending on the enlargement ratio, the overlapping output columns may be determined based on the maximum dot number information instead of the minimum dot number information in consideration of the thickness of the character.

Furthermore, although the above-described embodiment has been described as being realized by hardware, the conversion may be executed by software.

Further, although the reduction conversion is realized by the OR processing, it may be realized by simply thinning out the line having the minimum number of dots.

[Effects of the Invention] As described above, according to the present invention, the dot pattern is converted in consideration of the number of dots in each line.
It is possible to obtain a dot pattern conversion device in which the converted character can be well balanced.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of a dot pattern conversion device according to the present invention, FIG. 2 is a schematic diagram showing a dot pattern after conversion according to this embodiment, and FIG. 3 is an original dot pattern before conversion. FIG. 4 is a schematic diagram showing a dot pattern after conversion by a conventional device. 2 ... Control circuit, 4 ... Counter circuit, 6 ... Dot number minimum value detection circuit, 11-13 ... Dot pattern storage register, 51-53 ... Dot number storage register.

Claims (2)

[Claims] 1. A dot pattern conversion device for reducing a dot pattern of a character or a figure in a predetermined direction by an unequal ratio, and grouping means for grouping original dot patterns by several lines in accordance with a reduction ratio in a predetermined direction. Dot pattern storage means for storing the dot pattern of each line in one group, dot number detection means for detecting the number of dots of the dot pattern of each line stored in this dot pattern storage means, and detected dot number information Thinning line determination means for determining the lines to be thinned out based on the above, and the dot pattern of each line is read from the dot pattern storage means, and in the case of the lines to be thinned out, the thinning processing is executed to reduce the number of lines and output. Equipped with a dot pattern reduction means to reduce the number of lines for each group By running the created dot pattern conversion apparatus being characterized in that so as to reduce converting the original dot pattern. 2. A dot pattern conversion device for enlarging a dot pattern of a character or a figure in a predetermined direction by an unequal size, and grouping means for grouping the original dot patterns by several lines in accordance with the enlargement ratio in a predetermined direction. Dot pattern storage means for storing the dot pattern of each line in one group, dot number detection means for detecting the number of dots of the dot pattern of each line stored in this dot pattern storage means, and detected dot number information Based on the above, the output pattern determining means determines the line to be subjected to the overlap output processing, and the dot pattern of each line is read out from the dot pattern storage means. A dot pattern increasing means for increasing and outputting the pattern is provided. The number to execute the increased operation dot pattern conversion apparatus being characterized in that so as to enlarge converting the original dot pattern.