JPH0832025A - Protective circuit - Google Patents

Abstract

PURPOSE:To increase the operation speed to an internal circuit, and prevent malfunction and damage, by connecting one end of a capacitance element in a protective circuit with a resistance element, and a first and a second diode, and connecting the other end with the internal circuit. CONSTITUTION:A capacitance element (C) 50 is formed in MIM(metal insulator metal) structure composed of a first electrode layer 51, an insulating layer 52, and a second insulating layer 53, and connected between a resistance element (R) 20 and an internal circuit 80. The first electrode layer 51 is formed on a specified region of a semiconductor insulating substrate 10 and connected, via a wiring layer 60, with the resistance element (R) 20, a first diode element (D1) 30 and a second diode element (D2) 40. The insulating layer 52 is partly formed on the first electrode layer 51, and retains insulation between the first electrode layer 51 and the second electrode layer 53. The second electrode layer 53 is formed on the insulating layer 52, and connected with the internal circuit 80 via a wiring layer 64.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a protection circuit for a semiconductor integrated circuit or the like which prevents malfunction or damage of an internal circuit against an abnormal input signal.

[0002]

2. Description of the Related Art In a normal semiconductor integrated circuit, a protection circuit is installed as an input stage in order to maintain the normal operation of an internal circuit. This protection circuit prevents malfunction and damage of the internal circuit by not outputting an abnormal voltage signal to the internal circuit.

FIG. 4 is a circuit diagram showing a conventional protection circuit connected as an input stage of an internal circuit. This protection circuit 7
1 is the resistance element R, the first diode element D ₁ and the second
Of the diode element D ₂ . Resistance element R
Are arranged so as to be connected between the input terminal and the internal circuit 80. The first diode element D ₁ has a cathode connected to the first power supply line and an anode connected between the resistance element R and the internal circuit 80. Second
The diode element D ₂ is connected to the second power supply line at its anode and is connected to the cathode between the resistance element R and the internal circuit 80.

Here, the power supply voltage V _DD of the first power supply line
And the power supply voltage V _SS of the second power supply line is set to a relatively high potential and a low potential, respectively.

According to this structure, when the voltage signal V _IN larger than the reference voltage in the predetermined range is applied to the input terminal, a current flows through the resistance element R and the first diode element D _1.
Through the first power supply line. On the other hand, when the voltage signal V _IN smaller than the reference voltage in the predetermined range is applied to the input terminal, the current is supplied from the second power supply line through the second diode element D ₂ and the resistance element R.

The prior art relating to such a protection circuit is described in detail in, for example, Japanese Patent Application Laid-Open No. 3-179773.

[0007]

However, in the above-mentioned conventional protection circuit, a so-called integrating circuit is equivalently constructed based on the combination of the resistance value of the resistance element and the capacitance value of the diode element. Therefore, there is a problem in that the high speed operation of the internal circuit cannot be realized due to the transient phenomenon that occurs in the protection circuit. Further, in comparison with the discharge time corresponding to the time constant based on the resistance value and the capacitance value in the protection circuit, when the voltage signal applied to the input terminal is a high-speed pulse, it is possible to prevent the internal circuit from being broken or malfunctioning. There is a problem that you cannot do it.

Therefore, an object of the present invention is to solve the above problems and to provide a protection circuit which speeds up the operation of an internal circuit and prevents malfunction and damage.

[0009]

In order to achieve the above-mentioned object, a protection circuit of the present invention includes a resistance element connected to a predetermined input terminal and a resistance element and a predetermined internal circuit. The first capacitor is connected between the capacitor and the first power supply line having a predetermined power supply voltage, and the cathode is connected to the first power supply line. The anode is connected between the resistor and the capacitor. The anode is connected to the diode element and the second power supply line having a power supply voltage relatively lower than the power supply voltage of the first power supply line, and the cathode is connected between the resistance element and the capacitance element. And a second diode element.

Here, the resistance element, the capacitance element, and the first element
The diode element and the second diode element may be monolithically formed on the semi-insulating substrate together with the internal circuit.

Further, the semi-insulating substrate is formed of GaAs, the resistance element is formed by injecting a predetermined dopant into the semi-insulating substrate, and the capacitive element is formed on the semi-insulating substrate. A gate electrode layer of a Schottky junction field effect transistor, which is formed by sequentially stacking an electrode layer, an insulating layer, and a second electrode layer, and the first and second diode elements are arranged on a semi-insulating substrate. Is preferably used as the anode and the shorted source and drain electrode layers are formed as the cathode.

[0012]

According to the protection circuit of the present invention, when a voltage signal larger than the reference voltage in the predetermined range is applied to the input terminal,
The current flows through the resistance element and the first diode element to the first
Leaked to the power line. On the other hand, when a voltage signal smaller than the reference voltage in the predetermined range is applied to the input terminal, the current is supplied from the second power supply line through the second diode element and the resistance element.

Here, as compared with the case where the capacitive element is not arranged, the resistance value of the resistance element and the capacitance values of the first and second diode elements are reduced and set corresponding to the capacitance value of the capacitive element. To be done. This reduces the time constant based on these resistance and capacitance values. Therefore, even if the voltage signal applied to the input terminal is a high-frequency pulse,
When it is included in the reference voltage within the predetermined range, it is supplied to the internal circuit via the resistance element and the capacitance element, and when it is not included, it is eliminated as described above.

[0014]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The structure and operation of an embodiment according to the present invention will be described below with reference to FIGS. In the description of the drawings, the same elements will be denoted by the same reference symbols, without redundant description. Further, the dimensional ratios in the drawings do not always match those described.

FIG. 1 is a circuit diagram showing an embodiment of a protection circuit of the present invention connected as an input stage of an internal circuit. FIG. 2 is a perspective view showing the configuration of the protection circuit shown in FIG. In this semiconductor integrated circuit, the protection circuit 70 and the internal circuit 80 are monolithically formed on the semi-insulating substrate 10 and arranged electrically connected to each other. The semi-insulating substrate 10 is made of GaAs.
The protection circuit 70 is mainly composed of a resistance element (R) 20, a first diode element (D ₁ ) 30, a second diode element (D ₂ ) 40, and a capacitance element (C) 50, and has an input terminal. And the internal circuit 80.
The internal circuit 80 is composed of a plurality of logic gates, flip-flops, and the like, and is an arithmetic circuit, a memory circuit, a control circuit, or the like that realizes a predetermined function.

The resistance element (R) 20 is composed of a resistance layer 21 and electrode layers 22 and 23, and is connected between the input terminal and the capacitance element (C) 50 via wiring layers 60 and 61. There is. The resistance layer 21 is formed by injecting a predetermined dopant into a predetermined region of the semi-insulating substrate 10 by using a normal ion implantation method or the like to set a predetermined resistance value based on the size and the dopant concentration. There is. Electrode layer 22
Is formed on one end of the resistance layer 21 and is connected to the input terminal via the wiring layer 61. The electrode layer 23 is the resistance layer 2
The first diode element (D ₁ ) 30, the second diode element (D ₂ ) 40, and the capacitive element (C) 50 are formed on the other end of the first wiring layer 60 and are connected to the first diode element (D ₁ ) 30 through the wiring layer 60.

The first diode element (D ₁ ) 30 has a G
aAs MESFET (Metal Semiconductor Field Effe
ct Transistor), the cathode is connected to the first power supply line, and the resistance element (R) 20
An anode is connected between the capacitor and the capacitive element (C) 50. This Schottky junction field effect transistor is
Active layer 31, contact layers 32 and 33, gate electrode layer 3
4, a source electrode layer 35 and a drain electrode layer 36. The active layer 31 is formed by digging a predetermined region of the semi-insulating substrate 10 and doping it with an n-type dopant. The contact layers 32 and 33 are arranged in contact with both ends of the active layer 31, respectively, and are formed by doping an n ⁺ type dopant having a higher concentration than that of the active layer 31. The gate electrode layer 34 has Schottky contact and has an active layer 31.
It is formed above and is connected to the resistance element (R) 20, the second diode element (D ₂ ) 40, and the capacitance element (C) 50 via the wiring layer 60 as an anode. The source electrode layer 35 and the drain electrode layer 36 have ohmic contact with each other and are formed on the contact layers 32 and 33. The source electrode layer 35 and the drain electrode layer 36 are short-circuited via the wiring layer 62 as cathodes and connected to the first power supply line. .

The second diode element (D ₂ ) 40 is made of GaAs in the same manner as the _first diode element (D ₁ ) 30.
It is composed of a MESFET and has an anode connected to the second power supply line and a cathode connected between the resistance element (R) 20 and the capacitance element (C) 50.
This Schottky junction field effect transistor includes an active layer 41, contact layers 42 and 43, a gate electrode layer 44,
It is composed of a source electrode layer 45 and a drain electrode layer 46. The active layer 41 is formed by digging a predetermined region of the semi-insulating substrate 10 and doping it with an n-type dopant. The contact layers 42 and 43 are arranged in contact with both ends of the active layer 41, respectively, and have a higher n concentration than the active layer 41.
It is formed by doping a ⁺ type dopant. The gate electrode layer 44 is formed on the active layer 41 with Schottky contact, and serves as a cathode via the wiring layer 60 through the resistance element (R) 20, the first diode element (D ₁ ) 30, and the capacitance element. (C) 50 is connected. Source electrode layer 4
5 and the drain electrode layer 46 are respectively formed on the contact layers 42 and 43 with ohmic contact, and are short-circuited via the wiring layer 63 as an anode and connected to the second power supply line.

The capacitive element (C) 50 is composed of the first electrode layer 5
From the first insulating layer 52 and the second insulating layer 53 to the MIM (Meta
l Insulator Metal) structure, and is connected between the resistance element (R) 20 and the internal circuit 80. The first electrode layer 51 is formed on a predetermined region of the semiconductor insulative substrate 10, and the resistance element (R) 20 is interposed via the wiring layer 60.
It is connected to the first diode element (D ₁ ) 30 and the second diode element (D ₂ ) 40. The insulating layer 52 is
The first and second electrodes are partially formed on the first electrode layer 51.
The insulating property between the electrode layers 51 and 53 is maintained. Second
Of the wiring layer 64 is formed on the insulating layer 52.
It is connected to the internal circuit 80 via.

Here, the positive power supply voltage V _DD is applied to the first power supply line, and the negative power supply voltage V _SS is applied to the second power supply line. The plus power source voltage V _DD and the minus power source voltage V _SS are set to a relatively high potential and a low potential, respectively. Further, the voltage signal V _IN is applied to the input terminal.

Next, the operation of the above embodiment will be described.

When a voltage signal V _IN larger than a reference voltage in a predetermined range is applied to the input terminal, a current flows through the resistance element R and the first diode element D ₁ to the first power supply line. On the other hand, when a voltage signal smaller than the reference voltage in the predetermined range is applied to the input terminal, a current flows from the second power supply line to the second diode element D ₂ and the resistance element R.
Is supplied via

Here, as compared with the case where the capacitance element C is not arranged, the resistance value of the resistance element R and the capacitance values of the first and second diode elements D ₁ and D ₂ are the capacitance value of the capacitance element C. Is set correspondingly to. This reduces the time constant based on these resistance and capacitance values. Therefore, even if the voltage signal V _IN applied to the input terminal is a high-frequency pulse, it is supplied to the internal circuit via the resistance element R and the capacitance element C when included in the reference voltage in a predetermined range, and is not so. In this case, it is solved as described above.

Next, the experiment of the above embodiment will be described.

In this experiment, the frequency characteristics of the output signal in the protection circuits of the embodiment and the conventional example were compared and confirmed.
As the protection circuit of the embodiment, the one having the circuit configuration shown in FIG. 1 was applied as a high input impedance circuit for the internal circuit. On the other hand, the conventional protection circuit is shown in FIG.
The one having the circuit configuration shown in FIG. In the protection circuits of the example and the conventional example, common constituent elements are formed in substantially the same manner.

In particular, various conditions for the protection circuit of the embodiment were as follows. The resistance element R has a resistance value of about 300.
Ω. The GaAs FETs forming the first diode element D ₁ and the second diode element D ₂ had a gate width of about 30 μm and operated in the E (Enhancement) mode. The capacitive element had a MIM capacity of about 1 pF.

On the other hand, various conditions for the conventional protection circuit are as follows. The resistance element R has a resistance value of about 300.
Ω. The GaAs FETs constituting the first diode element D ₁ and the second diode element D ₂ had a gate width of about 60 μm and operated in the E (Enhancement) mode.

FIG. 3 is a graph showing frequency characteristics of output signals in the protection circuit of the embodiment and the protection circuit of the conventional example. Here, the horizontal axis represents the frequency of the voltage signal input to each protection circuit, and the vertical axis represents the amount of attenuation of the voltage signal output from each protection circuit when input. According to this result, in the protection circuit of the embodiment, the band of the output signal corresponding to the high frequency side (about several GHz) of the input signal is expanded by about 1 GHz as compared with the protection circuit of the conventional example. Further, in the protection circuit of the embodiment, the band of the output signal corresponding to the low frequency side (about several hundred MHz) of the input signal has a cutoff frequency of about 10 MHz, and the protection circuit of the conventional protection circuit has It has been greatly reduced. Therefore, it can be seen that the voltage signal applied to the input terminal is supplied to the internal circuit even if the pulse has a high frequency.

However, the value of about 10 MHz as the cutoff frequency of the output signal corresponding to the low frequency side of the input signal is set in consideration of static electricity discharged from the human body to the semiconductor integrated circuit. Usually, assuming an equivalent circuit when the human body is charged and discharged, the discharge current reaches about 20 A as an initial value, and its time constant is about 100 ns or more. Therefore, a pulsed large current having a fast rising time and a short time width flows, so that the semiconductor integrated circuit is required to take measures against the pulse current.

The knowledge about the discharge current due to such static electricity is described in detail in the book “Comprehensive Technology Publication, Latest Noise Countermeasure Technology, Chapter 12, Section 3, Page 343”.

The protection circuit according to the present invention is not limited to the above embodiment, and various modifications can be made.

For example, in the above embodiment, the resistance layer of the resistance element is formed by implanting ions inside the semi-insulating substrate. However, even if the resistance layer of the resistance element is formed by performing the epitaxial growth on the semi-insulating substrate, the same effect as that of the above-described embodiment can be obtained.

Further, in the above embodiment, the first and second diode elements are formed by short-circuiting the source electrode and the drain electrode of the field effect transistor. However, even if the first or second diode element is formed by short-circuiting the base electrode layer and the collector electrode layer of the bipolar transistor, the same action and effect as those of the above embodiment can be obtained.

[0034]

As described above in detail, in the protection circuit of the present invention, the capacitive element is arranged with one end connected to the resistance element and the first and second diodes and the other end connected to the internal circuit. Has been done. As a result, the resistance value of the resistance element and the capacitance values of the first and second diode elements are reduced and set in correspondence with the capacitance value of the capacitance element. The constant decreases. Therefore, even if the voltage signal applied to the input terminal is a high-frequency pulse, it is a surge voltage that is supplied to the internal circuit via the resistance element and the capacitance element when it is included in the reference voltage within a predetermined range, and is not such a surge voltage In some cases, it is canceled and not supplied to the internal circuit.

Therefore, according to the present invention, it is possible to provide a protection circuit which speeds up the operation of the internal circuit and prevents malfunction and damage.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing an embodiment of a protection circuit of the present invention connected as an input stage of an internal circuit.

FIG. 2 is a perspective view showing a configuration of a protection circuit shown in FIG.

FIG. 3 is a graph showing frequency characteristics of output signals in the protection circuit shown in FIG. 1 and the protection circuit shown in FIG.

FIG. 4 is a circuit diagram showing a conventional protection circuit connected as an input stage of an internal circuit.

[Explanation of symbols]

10 ... Semiconductor substrate, 20 ... Resistance element, 21 ... Resistance layer, 2
2, 23 ... Electrode layer, 30 ... First diode element, 31
... active layer, 32, 33 ... contact layer, 34 ... gate electrode layer, 35 ... source electrode layer, 36 ... drain electrode layer, 4
0 ... Second diode element, 41 ... Active layer, 42, 43
... Contact layer, 44 ... Gate electrode layer, 45 ... Source electrode layer, 46 ... Drain electrode layer, 50 ... Capacitance element, 51 ...
First electrode layer, 52 ... Insulating layer, 53 ... Second electrode layer, 6
0-64 ... Wiring layers, 70, 71 ... Protection circuit, 80 ... Internal circuit.

Claims (3)

[Claims] 1. A resistance element arranged to be connected to a predetermined input terminal, a capacitance element arranged to be connected between the resistance element and a predetermined internal circuit, and a first element having a predetermined power supply voltage. A first diode element arranged by connecting a cathode to the power source line and an anode connected between the resistive element and the capacitive element, and relatively relative to a power source voltage of the first power source line. A protection comprising a second diode element arranged by connecting an anode to a second power line having a low power voltage and connecting a cathode between the resistance element and the capacitance element. circuit. 2. The resistance element, the capacitance element, and the first element
2. The protection circuit according to claim 1, wherein the diode element and the second diode element are formed monolithically on the semi-insulating substrate together with the internal circuit. 3. The semi-insulating substrate is formed of GaAs, the resistance element is formed by implanting a predetermined dopant into the semi-insulating substrate, and the capacitive element is formed of the semi-insulating substrate. A first electrode layer, an insulating layer, and a second electrode layer are sequentially stacked on top of each other, and the first and second diode elements are arranged on the semi-insulating substrate, which is a Schottky junction type. 3. The protection circuit according to claim 2, wherein the gate electrode layer of the field effect transistor is used as the anode, and the shorted source electrode layer and drain electrode layer are formed as the cathode.