JPH08317389A - Block distortion remover - Google Patents

Block distortion remover

Info

Publication number
JPH08317389A
JPH08317389A JP11551395A JP11551395A JPH08317389A JP H08317389 A JPH08317389 A JP H08317389A JP 11551395 A JP11551395 A JP 11551395A JP 11551395 A JP11551395 A JP 11551395A JP H08317389 A JPH08317389 A JP H08317389A
Authority
JP
Japan
Prior art keywords
block
block distortion
level difference
pixel
pixels
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11551395A
Other languages
Japanese (ja)
Other versions
JP3149729B2 (en
Inventor
Fumio Fujimura
文男 藤村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP11551395A priority Critical patent/JP3149729B2/en
Publication of JPH08317389A publication Critical patent/JPH08317389A/en
Application granted granted Critical
Publication of JP3149729B2 publication Critical patent/JP3149729B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Abstract

PURPOSE: To remove block distortion with much higher accuracy by non-linearly changing the removing amount of block distortion corresponding to level difference between the picture elements of a block boundary. CONSTITUTION: The level difference between a concerned picture element and an adjacent reference picture element found from delay circuits 1 and 2 and subtracters 3 and 4 is inputted to non-linear processing circuits 5 and 6. When the level difference is set in a previously decided range, the non-linear processing circuits 5 and 6 judge the presence of block distortion and output the block distortion removing amount. This output value is the product of probability for that level difference to be the block distortion and a correcting amount expressed by a straight line of negative slope passing through the origin and is added to the concerned picture element at adders 7 and 8 so that the levels of both the picture elements can get close each other.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、ブロック単位で変換符
号化された画像信号を復号化する場合に、符号化により
発生するブロック歪を除去するブロック歪除去装置に関
するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a block distortion removing apparatus for removing block distortion generated by coding when an image signal converted and coded in block units is decoded.

【0002】[0002]

【従来の技術】画像信号の符号化においては、画像信号
を複数のブロックに分割し、各ブロックについてDCT
(離散コサイン変換)等により、画像データを符号化す
るブロック符号化方式がよく用いられている。この方式
では、隣接するブロック間に不連続なレベル差、いわゆ
るブロック歪が発生し、画質低下を招いてしまうので、
従来、ブロック境界を平滑化することにより、ブロック
歪を除去する装置が提案されている。
2. Description of the Related Art In coding an image signal, the image signal is divided into a plurality of blocks and a DCT is performed for each block.
A block coding method for coding image data by (discrete cosine transform) or the like is often used. In this method, a discontinuous level difference between adjacent blocks, that is, so-called block distortion occurs, which causes deterioration in image quality.
Conventionally, an apparatus has been proposed that removes block distortion by smoothing block boundaries.

【0003】従来のブロック歪除去装置としては、例え
ばブロック境界においては、ブロック歪かあるかどうか
を検出し、ブロック歪がある場合には平滑化処理を行
い、ない場合には原画像がもつエッジデータを保存する
ものがある。平滑化処理としては移動平均、メディアン
フィルタなどがある。
As a conventional block distortion removing apparatus, for example, at a block boundary, it is detected whether or not there is block distortion, and if there is block distortion, smoothing processing is carried out. Some store data. Examples of smoothing processing include moving average and median filter.

【0004】[0004]

【発明が解決しようとする課題】しかしながら上記従来
の装置では、ブロック歪を除去するために行われる、移
動平均、メディアンフィルタなどの処理では、ブロック
歪に対して線形的な平滑化しかできず、歪がもつ特性に
あわせた除去ができなかった。
However, in the above conventional apparatus, the processing such as moving average and median filter, which is performed to remove block distortion, can only perform linear smoothing with respect to block distortion. It could not be removed according to the characteristics of strain.

【0005】そこで本発明は、ブロック歪の特性に合わ
せて歪を除去する、非線形ノイズフィルタを構成するこ
とにより、より高精度なブロック歪除去装置を提供する
ことを目的とする。
Therefore, an object of the present invention is to provide a block distortion removing apparatus with higher accuracy by constructing a non-linear noise filter that removes distortion according to the characteristics of block distortion.

【0006】[0006]

【課題を解決するための手段】上記課題を解決するため
に本発明のブロック歪除去装置は、複数のブロックに分
割された画像信号を復号化する場合に、前記ブロック境
界の画素間のレベル差をとり、その大きさがブロック歪
の生じる確率分布の範囲内にあるときには、前記レベル
差に応じた確率と、原点を通る負の傾きの直線により表
わされる補正量との積をブロック歪除去量として、前記
両画素のレベルを互いに近付けるようそれぞれに加算す
ることを特徴とするものである。
In order to solve the above-mentioned problems, the block distortion removing apparatus of the present invention, when decoding an image signal divided into a plurality of blocks, has a level difference between pixels at the block boundary. When the magnitude is within the range of the probability distribution in which the block distortion occurs, the product of the probability according to the level difference and the correction amount represented by a straight line with a negative slope passing through the origin is calculated as the block distortion removal amount. The above is characterized in that the levels of both pixels are added so as to be close to each other.

【0007】[0007]

【作用】上記構成によれば、ブロック境界における画素
のレベル差から、ブロック歪である確率を求め、その確
率が大きいほどブロック歪除去量を大きくし、確率が小
さいほど、除去量を小さくしている。このように歪除去
の特性を非線形にすることにより、より高精度に歪を除
去することができる。
According to the above construction, the probability of block distortion is obtained from the pixel level difference at the block boundary. The larger the probability, the larger the block distortion removal amount, and the smaller the probability, the smaller the removal amount. There is. By making the distortion removal characteristic non-linear in this way, the distortion can be removed with higher accuracy.

【0008】[0008]

【実施例】以下、本発明のブロック歪除去装置の実施例
について、図面を参照しながら具体的に説明する。図1
は本発明の一実施例におけるブロック歪除去装置の構成
を示すものである。
Embodiments of the block distortion eliminating device of the present invention will be described below in detail with reference to the drawings. FIG.
Shows a configuration of a block distortion eliminator in one embodiment of the present invention.

【0009】まず水平方向のブロック歪除去について述
べる。遅延回路1,2は、入力信号を1画素分だけ遅延
するものであり、注目画素の信号を遅延回路1の出力信
号として、そのXY座標を(x,y)とすると、注目画
素とその左右画素(x−1,y),(x+1,y)との
レベル差は、減算器3,4で求めることができる。
First, the block distortion removal in the horizontal direction will be described. The delay circuits 1 and 2 delay the input signal by one pixel. When the signal of the target pixel is used as the output signal of the delay circuit 1 and the XY coordinates thereof are (x, y), the target pixel and its left and right sides. The level difference between the pixels (x-1, y) and (x + 1, y) can be obtained by the subtracters 3 and 4.

【0010】レベル差を非線形処理回路5,6に入力す
ると、その大きさに応じてそれぞれ算出されたブロック
歪除去量が加算器7において合計される。そして加算器
8において注目画素からブロック歪除去を行う。
When the level difference is input to the non-linear processing circuits 5 and 6, the block distortion removal amounts calculated in accordance with the magnitudes are summed in the adder 7. Then, the adder 8 removes block distortion from the pixel of interest.

【0011】なお、ブロック境界検出回路9及びオン/
オフ制御回路10は、注目画素がブロック境界にある場
合には、非線形処理回路5,6からの出力を注目画素の
信号に加算し、そうでない場合は加算されないようにす
るものである。
The block boundary detection circuit 9 and the ON / OFF
The off control circuit 10 adds the outputs from the non-linear processing circuits 5 and 6 to the signal of the target pixel when the target pixel is on the block boundary, and does not add otherwise.

【0012】ここで非線形処理回路5,6では、入力さ
れるレベル差が予め定められた範囲にある場合は、ブロ
ック歪があると判断して歪除去データを出力し、前記範
囲にない大きな値である場合には、エッジであると判断
しエッジデータを保存するようにする。
Here, in the non-linear processing circuits 5 and 6, when the input level difference is within a predetermined range, it is judged that there is block distortion and the distortion removal data is output, and a large value that is not within the above range is output. If it is, it is determined to be an edge and the edge data is saved.

【0013】具体的に非線形処理回路5,6の特性は以
下のように決定している。すなわち、ブロック境界のレ
ベル差がブロック歪である確率分布は、図2に示すよう
にレベル差tまでの正規分布となる。またレベル差が仮
に全てブロック歪であるとすると、ブロック歪を除去す
るための注目画素の補正量は、図3に示すようにレベル
差の大きさに応じて大きくなり、レベル差が正の値の場
合には負の値、レベル差が負の値の場合には正の値とな
る。
Specifically, the characteristics of the non-linear processing circuits 5 and 6 are determined as follows. That is, the probability distribution in which the level difference at the block boundary is the block distortion is a normal distribution up to the level difference t as shown in FIG. If all the level differences are block distortions, the correction amount of the pixel of interest for removing the block distortions increases according to the level difference, as shown in FIG. 3, and the level differences are positive values. In the case of, it becomes a negative value, and when the level difference is a negative value, it becomes a positive value.

【0014】ここでブロック歪除去量を、ブロック歪の
確率分布と前記補正量との積とすると、画素間のレベル
差がブロック歪である確率に比例した大きさのブロック
歪除去量が与えられることとなる。したがって図4に示
す特性となり、レベル差が−t〜tの範囲においてブロ
ック歪を除去し、それ以外のレベルでは0を出力し、エ
ッジを保存する。tがブロック歪かエッジかを判断する
値となる。
Here, when the block distortion removal amount is the product of the probability distribution of the block distortion and the correction amount, the block distortion removal amount having a size proportional to the probability that the level difference between pixels is the block distortion is given. It will be. Therefore, the characteristics shown in FIG. 4 are obtained, the block distortion is removed in the range where the level difference is −t to t, 0 is output at the other levels, and the edge is preserved. It is a value that determines whether t is block distortion or an edge.

【0015】ブロック歪除去処理について、図5〜7を
参照しながら具体的に説明する。図5(a)は画素配置
とブロック境界の位置、同図(b)はブロック境界付近
の参照画素A,B,C,Dの信号レベルを示しており、
aはブロック境界を、bは処理対象の画素を示してい
る。A画素とB画素のレベル差をd1、B画素とC画素
のレベル差をd2、C画素とD画素のレベル差をd3と
する。従ってこの場合ブロック境界のレベル差はd2と
なる。
The block distortion removing process will be specifically described with reference to FIGS. 5A shows the pixel arrangement and the position of the block boundary, and FIG. 5B shows the signal levels of the reference pixels A, B, C, and D near the block boundary.
“A” indicates a block boundary, and “b” indicates a pixel to be processed. The level difference between the A pixel and the B pixel is d1, the level difference between the B pixel and the C pixel is d2, and the level difference between the C pixel and the D pixel is d3. Therefore, in this case, the level difference at the block boundary is d2.

【0016】ブロック歪除去量の計算には、ブロック境
界の画素B,C間のレベル差d2だけでなく、ブロック
境界とは反対側の参照画素A,Dとのレベル差d1、d
3も用いるが、これは後述のようにより正確にブロック
歪を除去するためであるので、説明を簡単にするため、
図6(a)に示すようにd1=0、d3=0と仮定し、
ブロック境界のレベル差d2だけで処理を行う。
In calculating the block distortion removal amount, not only the level difference d2 between the pixels B and C at the block boundary, but also the level differences d1 and d from the reference pixels A and D on the opposite side of the block boundary.
3 is also used, but this is to remove the block distortion more accurately as described later, so to simplify the explanation,
As shown in FIG. 6A, assuming that d1 = 0 and d3 = 0,
Processing is performed only with the level difference d2 at the block boundary.

【0017】まず注目画素をB画素としてその処理を説
明する。C画素とのブロック境界のレベル差d2の絶対
値が基準値tより小さい場合には、ブロック歪が発生し
ていると判断し、図6(b)に示すように、歪の大きさ
に応じたブロック歪除去量hが非線形処理回路5から出
力され、B画素の値を除去量h分だけ小さくする。この
ときA画素とのレベル差d1は0であるので、非線形処
理回路6の出力は0である。
First, the processing will be described with the pixel of interest as a B pixel. When the absolute value of the level difference d2 at the block boundary with the C pixel is smaller than the reference value t, it is determined that block distortion has occurred, and as shown in FIG. The block distortion removal amount h is output from the non-linear processing circuit 5, and the value of the B pixel is reduced by the removal amount h. At this time, since the level difference d1 from the A pixel is 0, the output of the nonlinear processing circuit 6 is 0.

【0018】また注目画素がC画素に移ると、C画素と
B画素とのレベル差d2に応じたブロック歪除去量hが
非線形処理回路6から出力され、C画素の値を除去量h
分だけ大きくする。またC画素とD画素とのレベル差d
3は0であるので、非線形処理回路5の出力は0とな
る。従ってB画素とC画素とは、ブロック歪が低減され
るよう互いにその値が近づくこととなる。なおレベル差
d2の絶対値が基準値tより大きい場合には、エッジと
判断して非線形処理回路5,6は0を出力するのでエッ
ジを保存する。
When the pixel of interest moves to the C pixel, the block distortion removal amount h corresponding to the level difference d2 between the C pixel and the B pixel is output from the non-linear processing circuit 6, and the value of the C pixel is removed by the removal amount h.
Increase by the amount. Also, the level difference d between the C pixel and the D pixel
Since 3 is 0, the output of the non-linear processing circuit 5 is 0. Therefore, the values of the B pixel and the C pixel are close to each other so that the block distortion is reduced. If the absolute value of the level difference d2 is larger than the reference value t, it is determined that the edge is present and the nonlinear processing circuits 5 and 6 output 0, so the edge is saved.

【0019】次に参照画素を加えた処理について説明す
る。A画素とB画素のレベル差d1、C画素とD画素の
レベル差d3を計算に加えると、さらに高精度にブロッ
ク歪を除去することができる。例えば図7(a)に示す
ように、信号のレベルがブロック境界において連続的に
変化している場合、上述のようにブロック境界のレベル
差d2のみに基づいてブロック歪を除去することを考え
る。
Next, the processing in which the reference pixel is added will be described. By adding the level difference d1 between the A pixel and the B pixel and the level difference d3 between the C pixel and the D pixel to the calculation, the block distortion can be removed with higher accuracy. For example, as shown in FIG. 7A, when the signal level continuously changes at the block boundary, it is considered to remove the block distortion based on only the level difference d2 at the block boundary as described above.

【0020】この場合、ブロック境界のレベル差d2に
対するブロック歪除去量h2だけB画素の信号レベルは
下がり、C点の信号レベルは上がるため、処理により連
続性がそこなわれる可能性がある。
In this case, since the signal level of the B pixel decreases and the signal level of the point C increases by the block distortion removal amount h2 with respect to the level difference d2 of the block boundary, continuity may be impaired by the processing.

【0021】そこでA画素とB画素のレベル差d1、C
画素とD画素のレベル差d3に対する非線形処理回路
5,6からの出力h1,h3を用いて、B画素,C画素
のレベルをそれぞれ補正する。出力h1,h3は、ブロ
ック歪除去量h2によるB画素,C画素のレベル変化を
抑制するため、連続性を保つことができる。
Therefore, the level difference d1, C between the A pixel and the B pixel
The levels h1 and h3 from the non-linear processing circuits 5 and 6 for the level difference d3 between the pixel and the D pixel are used to correct the levels of the B pixel and the C pixel, respectively. Since the outputs h1 and h3 suppress the level change of the B pixel and the C pixel due to the block distortion removal amount h2, the continuity can be maintained.

【0022】垂直方向のブロック歪の除去については、
水平方向の処理と同様に、ブロック境界検出回路9によ
り注目画素がブロック境界にあると場合、注目画素
(x,y)と、注目画素とその上下画素(x,y−
1)、(x,y+1)との差を減算器3,4で求め、そ
の差分データから非線形処理回路5,6により、上述の
ブロック歪除去処理を行うことができる。この場合、遅
延回路1,2は1ライン遅延回路となる。
For removing block distortion in the vertical direction,
Similar to the processing in the horizontal direction, when the target pixel is on the block boundary by the block boundary detection circuit 9, the target pixel (x, y), the target pixel and its upper and lower pixels (x, y−).
1), the difference between (x, y + 1) is obtained by the subtracters 3 and 4, and the above-described block distortion removal processing can be performed from the difference data by the nonlinear processing circuits 5 and 6. In this case, the delay circuits 1 and 2 are 1 line delay circuits.

【0023】なお上述の実施例においては、ブロック境
界においてブロック歪を除去する処理のみを行ってお
り、ブロック境界にエッジがある場合には、画像本来の
エッジを保存している。そこで上述の非線形処理回路
5,6に図8に示す特性を追加してやると、エッジを強
調して画像の鮮鋭度を上げることができる。
In the above embodiment, only the processing for removing the block distortion at the block boundary is performed, and when the block boundary has an edge, the original edge of the image is preserved. Therefore, if the characteristics shown in FIG. 8 are added to the above-mentioned non-linear processing circuits 5 and 6, the edge can be emphasized and the sharpness of the image can be increased.

【0024】すなわち、非線形処理回路5,6には、遅
延回路1,2と減算器3,4とにより算出した、注目画
素とその左右または上下画素とのレベル差が入力され
る。注目画素がブロック境界にある場合、tをブロック
歪かエッジかを判断する基準値とすることができる。そ
してブロック境界の信号のレベル差が、−t〜tの値で
あればブロック歪と判断して上述の処理を行う。そして
レベル差が、−tより小さいかまたはt以上であればエ
ッジと判断して、レベル差を大きくするデータを出力す
る。なお注目画素がブロック境界にない場合には、オン
/オフ制御回路10により、非線形処理回路5,6の−
t〜tまでの出力値を0とすることにより、輪郭強調だ
けを行うことができ、この場合、輪郭強調量はブロック
境界の場合と同じであるため、データの連続性を保つこ
とができる。
That is, the non-linear processing circuits 5 and 6 are supplied with the level differences between the pixel of interest and the left and right or upper and lower pixels calculated by the delay circuits 1 and 2 and the subtractors 3 and 4. When the pixel of interest is on the block boundary, t can be used as a reference value for determining whether it is block distortion or an edge. If the level difference of the signal at the block boundary is a value between -t and t, it is judged as block distortion and the above-mentioned processing is performed. If the level difference is smaller than -t or greater than t, it is determined to be an edge, and data for increasing the level difference is output. When the pixel of interest is not on the block boundary, the ON / OFF control circuit 10 causes the non-linear processing circuits 5 and 6 to operate in the negative direction.
By setting the output value from t to t to 0, only the contour enhancement can be performed. In this case, since the contour enhancement amount is the same as that at the block boundary, the continuity of data can be maintained.

【0025】[0025]

【発明の効果】以上のように本発明のブロック歪除去装
置は、ブロック境界の画素間で検出したレベル差がブロ
ック歪である確率に応じて、ブロック歪除去量が変化す
るよう、非線形な特性を持たせたので、ブロック歪の特
性に合わせた高精度な処理を行うことができる。またブ
ロック境界の画素に隣接する参照画素とのレベル差か
ら、ブロック境界の画素間のブロック歪除去を補正する
ことにより、原画像の持つデータの連続性を保つことが
できる。さらにブロック境界の画素間において、ブロッ
ク歪除去だけでなくエッジ強調をも選択的に行うことに
より、鮮鋭で歪のない画像を得ることができる。
As described above, the block distortion removing apparatus of the present invention has a nonlinear characteristic so that the block distortion removing amount changes according to the probability that the level difference detected between pixels on the block boundary is block distortion. Since it is provided, it is possible to perform highly accurate processing according to the characteristics of block distortion. Further, by correcting the block distortion removal between the pixels on the block boundary from the level difference between the reference pixel adjacent to the pixel on the block boundary, the continuity of the data of the original image can be maintained. Further, between the pixels on the block boundary, not only the block distortion removal but also the edge enhancement is selectively performed, whereby a sharp and distortion-free image can be obtained.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明のブロック歪除去装置の一実施例を示す
ブロック図
FIG. 1 is a block diagram showing an embodiment of a block distortion eliminating device of the present invention.

【図2】ブロック歪の確率分布図[Fig. 2] Probability distribution diagram of block distortion

【図3】ブロック歪の補正量の一例を示す特性図FIG. 3 is a characteristic diagram showing an example of a block distortion correction amount.

【図4】同実施例における非線形処理回路の入出力特性
FIG. 4 is an input / output characteristic diagram of a nonlinear processing circuit according to the same embodiment.

【図5】同実施例における画素配列、及びブロック境界
の画素と参照画素の信号レベル図
FIG. 5 is a pixel array according to the embodiment, and a signal level diagram of pixels at a block boundary and reference pixels.

【図6】同実施例におけるブロック境界の画素間の歪処
理を示す図
FIG. 6 is a diagram showing distortion processing between pixels at a block boundary in the embodiment.

【図7】同実施例におけるブロック境界の画素と、参照
画素を含めた歪処理を示す図
FIG. 7 is a diagram showing a distortion process including a pixel at a block boundary and a reference pixel in the embodiment.

【図8】同実施例におけるブロック歪除去とエッジ強調
とを行う非線形処理回路の特性図
FIG. 8 is a characteristic diagram of a non-linear processing circuit that performs block distortion removal and edge enhancement in the same embodiment.

【符号の説明】[Explanation of symbols]

1,2 遅延回路 3,4 減算器 5,6 非線形処理回路 7,8 加算器 9 ブロック境界検出回路 10 オン/オフ制御回路 1, 2 Delay circuit 3, 4 Subtractor 5, 6 Non-linear processing circuit 7, 8 Adder 9 Block boundary detection circuit 10 ON / OFF control circuit

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】複数のブロックに分割された画像信号を復
号化する場合に、前記ブロック境界の画素間のレベル差
をとり、その大きさがブロック歪の生じる確率分布の範
囲内にあるときには、前記レベル差に応じた確率と、原
点を通る負の傾きの直線により表わされる補正量との積
をブロック歪除去量として、前記両画素のレベルを互い
に近付けるようそれぞれに加算することを特徴とするブ
ロック歪除去装置。
1. When decoding an image signal divided into a plurality of blocks, a level difference between pixels at the block boundary is calculated, and when the magnitude is within a range of a probability distribution in which block distortion occurs, The product of the probability according to the level difference and the correction amount represented by a straight line having a negative slope passing through the origin is used as a block distortion removal amount, and the levels of the both pixels are added so as to approach each other. Block distortion removal device.
【請求項2】ブロック境界の画素と、それに隣接する参
照画素とのレベル差とから、ブロック境界の画素間のブ
ロック歪除去量と同様にして算出された値により、前記
ブロック歪除去量を補正するよう、ブロック境界の画素
からそれぞれ減算することを特徴とする請求項1に記載
のブロック歪除去装置。
2. The block distortion removal amount is corrected by a value calculated in the same manner as the block distortion removal amount between pixels at the block boundary from the level difference between a pixel at the block boundary and a reference pixel adjacent to it. The block distortion removal apparatus according to claim 1, wherein the pixels are subtracted from the pixels at the block boundaries.
【請求項3】ブロック境界の画素及びそれに隣接する参
照画素の間でレベル差をとり、そのレベル差がブロック
歪の生じる確率分布の範囲外にあるときには、前記ブロ
ック境界の画素間及び参照画素間のレベル差を大きくし
てエッジ強調するよう、前記ブロック境界の画素を補正
するようにしたことを特徴とする請求項1または2記載
のブロック歪除去装置。
3. A block boundary pixel and a reference pixel adjacent thereto have a level difference, and when the level difference is out of a probability distribution range of block distortion, the block boundary pixel and the reference pixel are separated. 3. The block distortion eliminating apparatus according to claim 1, wherein the pixel at the block boundary is corrected so that the level difference between the two is increased and the edge is emphasized.
JP11551395A 1995-05-15 1995-05-15 Block distortion removal device Expired - Fee Related JP3149729B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11551395A JP3149729B2 (en) 1995-05-15 1995-05-15 Block distortion removal device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11551395A JP3149729B2 (en) 1995-05-15 1995-05-15 Block distortion removal device

Publications (2)

Publication Number Publication Date
JPH08317389A true JPH08317389A (en) 1996-11-29
JP3149729B2 JP3149729B2 (en) 2001-03-26

Family

ID=14664388

Family Applications (1)

Application Number Title Priority Date Filing Date
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Country Status (1)

Country Link
JP (1) JP3149729B2 (en)

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US6496605B1 (en) * 1996-08-02 2002-12-17 United Module Corporation Block deformation removing filter, image processing apparatus using the same, method of filtering image signal, and storage medium for storing software therefor
JP2005102179A (en) * 2003-08-27 2005-04-14 Matsushita Electric Ind Co Ltd Filter device, filtering method, and filtering program
JP2005533303A (en) * 2002-07-08 2005-11-04 ベリテック インコーポレーテッド Method for reading a symbol having encoded information
JPWO2005004489A1 (en) * 2003-07-02 2006-08-17 ソニー株式会社 Block distortion detection apparatus, block distortion detection method, and video signal processing apparatus
JP2007189657A (en) * 2005-12-16 2007-07-26 Fuji Xerox Co Ltd Image evaluation apparatus, image evaluation method and program
US8326064B2 (en) 2007-01-22 2012-12-04 Nec Corporation Image re-encoding method to decode image data which is orthogonally transformed per first block and encoded by a first encoding method

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6496605B1 (en) * 1996-08-02 2002-12-17 United Module Corporation Block deformation removing filter, image processing apparatus using the same, method of filtering image signal, and storage medium for storing software therefor
JP2002344968A (en) * 2001-05-14 2002-11-29 Matsushita Electric Ind Co Ltd Block distortion eliminating device
JP4495881B2 (en) * 2001-05-14 2010-07-07 パナソニック株式会社 Block distortion remover
JP2005533303A (en) * 2002-07-08 2005-11-04 ベリテック インコーポレーテッド Method for reading a symbol having encoded information
JPWO2005004489A1 (en) * 2003-07-02 2006-08-17 ソニー株式会社 Block distortion detection apparatus, block distortion detection method, and video signal processing apparatus
JP2005102179A (en) * 2003-08-27 2005-04-14 Matsushita Electric Ind Co Ltd Filter device, filtering method, and filtering program
JP4558409B2 (en) * 2003-08-27 2010-10-06 パナソニック株式会社 Filter device, filtering method, and filtering program
JP2007189657A (en) * 2005-12-16 2007-07-26 Fuji Xerox Co Ltd Image evaluation apparatus, image evaluation method and program
US8135232B2 (en) 2005-12-16 2012-03-13 Fuji Xerox Co., Ltd. Image evaluation apparatus, image evaluation method, computer readable medium and computer data signal
US8326064B2 (en) 2007-01-22 2012-12-04 Nec Corporation Image re-encoding method to decode image data which is orthogonally transformed per first block and encoded by a first encoding method

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