JPH08293185A - Recording and reproducing cassette - Google Patents

Abstract

PURPOSE: To reduce the number of parts by slidably mounting an IC board on a cassette shell and constituting a miserasing preventing mechanism in a relative position to an external contact pin. CONSTITUTION: The IC memory board 31 is mounted on the recording and reproducing cassette 25, and is equipped with a memory chip for recording recorded information, etc., of a recording and reproducing tape to be housed. Then, data contact terminals 33a-d for reading and writing recording information, etc., of the tape are equipped to correspond to data detection pins 38a-d of a connecting part of a substrate on the side of an electronic instrument respectively, and are connected with, for instance, power source, data, lock and grounding circuits. The IC memory board 31 is constituted to be movable right and left to the recording and reproducing cassette 25 by an operating knob 35, and is equipped with a miserasing preventing contact terminal 34. For example, when the IC memory board 31 is slid to the right side position, miserasing preventing detection pins 38e and 38f on the electronic instrument side are short-circuited by a miserasing preventing contact terminal 34, so that the recordable state is recognized.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an erroneous erasure identification structure in a recording / reproducing cassette provided with an IC memory substrate for storing information recorded on a recording medium such as a magnetic tape.

[0002]

2. Description of the Related Art Recording / reproducing cassette 1 in the prior art
As shown in FIGS. 7 to 10, the recording and reproducing tape 4, for example, both reels 5A and 5B on which magnetic tape is wound are housed in upper and lower square shells 2 and 3 as shown in FIGS. There is. In the vicinity of the corner on the back surface side, a detection hole 6 is provided so that the electronic device side can determine whether or not recording is possible.

As shown in FIG. 11, the detection hole 6 is formed in the cassette 1 by sliding the operation plug 8 of the erroneous erasing operation section 7 provided on the upper side surface of the detection hole 6 left and right. It is opened or closed inside. Although not shown, the recording / reproducing apparatus detects the state of the detection hole 6 to determine whether the tape 4 is recordable or non-recordable (reproduction-only). Below the erroneous erasing operation section 7, an IC board mounting section 17 for engaging and mounting an IC memory board is provided.

The erroneous erasing operation section 7 is shown in FIG. 9, FIG. 10 and FIG.
As shown in FIG. 1, the upper shell 2 and the lower shell 3 are provided in the vicinity of the corners thereof, and an opening 9 formed by a window formed by cutting out a side surface of the upper shell 2 is provided. The protrusion-shaped knob 8a is mounted so as to face it, and the color plate 10 is arranged on the inner side of the operation plug 8 substantially parallel to the operation plug 8.

Then, as shown in FIG. 9, the operation plug 8
When the knob 8a is slid to the right, the color of the operation plug 8 itself, for example, a blackish gray of a color similar to that of the cassette, can be visually recognized from the opening 9 and can be identified as a recordable state.

On the other hand, as shown in FIG. 10, the operation plug 8
Slide the knob to the left so that only the portion of the knob 8a faces the opening 9, and the remaining portion is the operation plug 8
A color plate 10 of a conspicuous specific color, for example, a red color, which is arranged on the back side of the disk is visible, and the fact that recording is not possible can be easily identified by the color distinction.

An IC memory board 11 is mounted on the lower side of the corner of the cassette on which the operation plug 8 having such a structure is mounted. The IC memory board 11 is shown in FIG.
As shown in FIG. 2 and FIG. 13, the memory mounting portion 14 equipped with the IC chip 13 is provided on the wide left side of the substrate 12 formed in a substantially rectangular shape, and the terminal portion 15 connected to the detection pin of the external device is provided on the right side position. It has a built-in structure.

The memory mounting section 14 has a structure in which an IC memory 13, which is a chip for recording the recording information of the recording / reproducing tape, is mounted at a substantially central position, and the periphery thereof is covered with a protective layer. ing. The IC memory 13 has terminals 16a, 16b, 16c, 16 of the terminal section 15, respectively.
It is connected to d.

The terminal portion 15 includes four terminals 16a, 16
b, 16c, 16d are arranged in an aligned state, and the respective terminals 16a, 16b, 16c, 16d are grounding terminals 16a, clock terminals 16b, and data terminals 16 from the outside.
c, and a power supply terminal 16d. Note that the terminals 16a, 16b, 16c, 1
Of course, the structure of the IC memory substrate having only 6d may be used.

On the other hand, the IC board mounting portion 17 of the cassette is
As shown in FIG. 11, there are two rooms, and in the room on the right side, a terminal storage part 18 for connecting to a connector such as an electronic device,
The room on the left side is composed of an IC storage portion 19 for storing the IC portion of the IC memory board 11.

As shown in FIG. 10, for example, in the terminal accommodating portion 18, the side wall of the lower shell 3 is located at a position corresponding to the lower side of the opening 9 in which the knob 8a of the operation plug 8 is slidable.
Connection window portions 19a, 19 consisting of four windows facing the outside
The structure has b, 19c, and 19d.

The IC board mounting portion 17 having such a structure
As shown in FIG. 11, the mounting of the IC memory board 11 on the terminals 16a, 16b, 16 of the IC memory board 11 is performed.
c and 16d (see FIG. 13) are directed outward, and the memory mounting portion 14 is inserted into the IC storage portion 19 from above. Then, the terminals 16a, 16b, 16c, 16d of the terminal portion 15 of the IC memory board 11 are connected to the connection window portion 19
It is arranged so as to face the outside through a, 19b, 19c, and 19d. Then, the IC memory board 11 and the erroneous erasing operation plug 8 are engaged with each other and assembled by covering the upper shell with the upper shell.

To obtain the record information of the recording / reproducing cassette thus assembled, as shown in FIG.
While the detection pin 20 provided on the external device slides from the lower side to the upper side with respect to the cassette, the terminal 19a (, 19
b, 19c, 19d) to obtain a contact state.

[0014]

However, in the prior art described above, even in a cassette having an IC memory board incorporated in the cassette, the erroneous erasure prevention operation plug is separately arranged and provided at the bottom of the shell. By opening and closing the detection hole with the operation plug, the external detection pin of the electronic device identifies whether or not the information recorded on the tape can be erased.

As described above, in the method in which the detection hole is formed in the bottom of the shell and the identification is made by the detection pin of the electronic device, it is difficult to make the hole shallow because the detection stroke of the detection pin is restricted.

Therefore, the detection hole for determining whether recording is possible or not must be arranged avoiding the place where the reel member for winding the tape is contained, and the place is limited and the design is free. There is a problem that the degree is low. Moreover, it is necessary to make a deep hole, and there is a problem in dustproofness.

Therefore, in a cassette having a structure in which the information recorded in the cassette is connected to an external terminal of an electronic device or the like, it is necessary to solve the problem that the information recorded on the tape can be recorded or cannot be recorded. Have

[0018]

In order to solve the above-mentioned problems, the recording / reproducing cassette according to the present invention allows an IC memory substrate arranged so that terminals for connecting to an external connector are exposed to the outside. The terminals are arranged and the terminals of the IC memory substrate are added with the terminals for erroneous erasure identification.

[0019]

The recording / reproducing cassette of the present invention having the above-described structure has a structure in which an erroneous erasure identification terminal is added to a terminal connected to a detection pin of an external device, and is made to be slidable as appropriate, thereby separately Eliminates the need to install an erroneous erasure prevention operation plug, reduces the number of parts, and expands design flexibility
The dustproof property is improved and the cassette itself can be downsized.

[0020]

DESCRIPTION OF THE PREFERRED EMBODIMENTS A recording / reproducing cassette according to the present invention will be described below with reference to the drawings. For the sake of easy understanding, the same parts as those of the prior art will be assigned the same reference numerals for description.

The IC memory board mounted on the recording / reproducing cassette according to the present invention has an erroneous erasure prevention member integrated therein, and has a contact portion for reading / writing data and a contact for detecting erroneous erasure prevention. And the IC
When the memory substrate is slidably moved, only the contact position of the erroneous erasure prevention detection unit can be changed.

That is, as shown in FIGS. 1 and 2, the recording / reproducing cassette 25 includes upper and lower shells 26, 2 having a substantially rectangular shape.
7 has a structure in which a tape 4 wound around two reels 5A and 5B, for example, a magnetic tape is mounted, and an IC memory substrate is provided on the side surface near the corner. The structure is such that a mounting portion 28 for mounting is provided. It goes without saying that the position of the mounting portion 28 can be changed to a proper position.

The mounting portion 28 has six connection windows 29a, 29b, 29c, 29d, 29 for connecting to the detection pins of the device.
e and 29f are arranged in an aligned state, and an operation window 30 for an erroneous erasure prevention knob is provided above the structure. The connection windows 29a, 29b, 29c, 29
Of course, the numbers of e and 29f are not limited to these.

On the other hand, as shown in FIG. 3, the IC memory substrate 31 is formed of a quadrangular substrate, and a memory mounting portion 32 having an IC chip mounted is provided on the back surface on the left side in the figure, and a right side corner on the front surface side. It has a structure in which a terminal portion 33 including five contact terminals in an aligned state is integrally provided with an operation knob 35 protruding above the terminal portion 33 substantially parallel to the arrangement of the terminals. Although not shown, the IC chip of the memory mounting portion 32 and the contact terminal of the terminal portion 33 are connected.

The terminal portion 33 has four data contact terminals 33a for reading and writing recorded information data of the cassette,
33b, 33c, 33d and these contact terminals 33a, 33
It is formed from a total of five terminals, including an erroneous erasure prevention contact terminal 34 having a width wider than the widths b, 33c and 33d.

The IC memory substrate 31 having such a structure
Is mounted on the mounting portion 28 of the cassette shown in FIGS. FIG. 4 is an enlarged view of a main part in which the IC memory board 31 is mounted on the mounting portion 28. The mounting portion 28 provided on the lower shell 27 is shown in FIG.
With the terminal portion 33 outside from the upper portion of the board engaging portion 36 of
The IC memory board 31 is slidably engaged so as to sandwich both sides thereof, and the operation knob 35 is exposed from the operation window 30 of the upper shell from above to cover the upper shell to assemble.

As shown in FIG. 5, the electronic device side is provided with a board connecting portion 38 corresponding to the terminal portion 33 (see FIG. 4) of the mounting portion 28 of the cassette.

The board connecting portion 38 has a connection window 29 of the cassette.
a, 29b, 29c, 29d, 29e, and 29f, the detection pin 38a which contacts and connects to the terminal portion 33 facing.
It has a structure in which 38b, 38c, 38d, 38e, and 38f are arranged side by side. Of these, two on the right side in FIG. 5 are detection pins 38e and 38f for erasure prevention, and four on the left side.
The individual pieces are data detection pins 38a, 38b, 38c and 38d for reading and writing the record information of the cassette.

Here, in FIG. 5, when the IC memory board is slidably mounted on the mounting portion of the cassette, the IC memory board 3
The terminal portion 33 of No. 1 has connection windows 29a, 29b, 29c, 29
It is a state in which it is exposed to the outside through d, 29e, and 29f (see FIG. 2), and shows a state in which the operation knob 35 is slid to the right side position. This can be set so that the cassette is in a "recordable" (also called erasable) state. What can be determined in this way will be described later.

On the other hand, when the operation plug is moved to the left side, FIG.
The IC memory board 31 has the operation knob 35.
The terminal portion 33 also moves to the left side in association with the above, and the terminal portion 33 also moves to the left side in the same manner, and it can be set to be in a "recording disabled" (also referred to as erasable) state. This determination and the determination as to whether recording is possible will be described below.

For the sake of convenience of description, the recordable state and the non-recordable state are determined according to the sliding position of the operation plug.
The reverse is also possible and can be appropriately determined.

Now, when a cassette on which the slidable IC memory substrate 31 is mounted is appropriately mounted on an electronic device, it is possible to first determine whether recording is possible or not by the erroneous erasure prevention detection pins 38e and 38f.

Whether or not recording is possible on the electronic device side is determined as follows.

When recording is possible, as shown in FIG. 5, when the IC memory substrate 31 mounted on the recording / reproducing cassette 25 is in a state of sliding to the right in the figure, the external detection pin of the electronic device is detected. When 38 is brought into contact with each other to obtain an electrical connection, the erroneous erasure prevention contact terminals 34 are connected to the erroneous erasure prevention detection pins 38e and 38f, and are in a short-circuited state.

Further, four data contact terminals 33a, 33
b, 33c and 33d have data detection pins 38a, 3
8b, 38c, 38d are in contact with each other and electrically connected,
The tape information recorded in the C memory can be appropriately read or written.

On the other hand, when recording is not possible, as shown in FIG. 6, the IC memory substrate 31 mounted in the recording / reproducing cassette 25 is slid to the left side in the figure by operating the operation knob 35. . In this state, when the detection pins 38 of the electronic device are brought into contact with each other to obtain an electrical connection,
Accidental erasure prevention contact pin 34 is provided on erroneous erasure prevention contact pin 34.
Only f (one pin on the left side) is connected, and one pin 38
e is in a floating state. Therefore, the erroneous erasure prevention can be easily identified by detecting whether the erroneous erasure prevention contact terminal 34 is short-circuited or in the floating state.

When recording is not possible, the data contact terminals 33a, 33b, 33c and the data detection pin 38 are used.
b, 38c, and 38d come into contact with each other so that they are connected to each other.
Since reading and writing with the chip is unnecessary, it does not matter if the contacting person is different.

[0038]

As described above, in the recording / reproducing cassette according to the present invention, the erroneous erasure prevention identification operation is performed by the slidable operation of the IC memory board. It becomes unnecessary and the number of parts can be reduced.

Further, the restrictions on the arrangement of the erroneous erasure prevention operation portion are reduced, the degree of freedom in design is expanded, and the hole for detection is not required, so that the dustproof property can be improved.

Furthermore, since the erroneous erasure prevention plug is not required, the erroneous erasure prevention function can be achieved in the thickness space of the IC memory substrate, and the cassette itself can be downsized.

[Brief description of drawings]

FIG. 1 is a schematic plan view of a recording / reproducing cassette according to the present invention.

FIG. 2 is a side view of a side on which the IC memory board is mounted.

FIG. 3 is a schematic explanatory view showing the IC memory board.

FIG. 4 is an explanatory view showing a main part of an IC memory substrate mounted in the recording / reproducing cassette, which is slidably mounted.

FIG. 5 is an explanatory diagram showing a connection state between an IC memory substrate in a recordable state and a detection pin.

FIG. 6 is an explanatory diagram showing a connection state between an IC memory substrate and a detection pin in the same recording-disabled state.

FIG. 7 is a plan view of a recording / reproducing cassette according to a conventional technique.

FIG. 8 is a rear view of a recording / reproducing cassette according to a conventional technique.

FIG. 9 is a side view showing a recordable state of a recording / reproducing cassette equipped with an IC memory substrate according to a conventional technique.

FIG. 10 is a side view of a recording / reproducing cassette equipped with an IC memory substrate according to the related art in a non-recordable state.

FIG. 11 is an explanatory view showing a state in which an IC memory substrate mounted on a recording / reproducing cassette and an erroneous erasure prevention plug are mounted in a conventional technique.

FIG. 12 is a side view of an IC memory substrate according to a conventional technique.

FIG. 13 is a plan view of FIG.

FIG. 14 is an explanatory diagram showing a contact state between a terminal of an IC memory board and an external detection pin.

[Explanation of symbols]

4 tape for recording / reproducing 5A, 5B reel 6 detection hole 25 cassette for recording / reproducing 26 upper shell 27 lower shell 28 mounting portion 29a, 29b, 29c, 29d, 29e, 29f connection window 30 operation window 31 IC memory board 32 memory mounting portion 33 terminal portion 33a, 33b, 33c, 33d contact terminal 34 erroneous erasure prevention contact terminal 35 operation knob 36 board engaging portion 38 detection pin 38a, 38b, 38c, 38d data detection pin 38e, 38f erroneous erasure prevention detection pin

Claims (4)

[Claims] 1. A recording / reproducing device having a cassette formed of substantially rectangular upper and lower shells, and an IC memory substrate mounted at an appropriate position in the cassette so that a terminal connected to an external detection pin is exposed to the outside. A recording / reproducing cassette, wherein the IC memory substrate is slidably mounted in the cassette. 2. The data contact terminal for supplying recording information of the cassette, and the terminal formed to be wider than the terminal width of the data contact terminal for erroneous erasure prevention for judgment as to whether recording is possible or not. The recording / reproducing cassette according to claim 1, comprising a contact terminal. 3. The external detection pin connected to the terminal,
A plurality of data detection pins for obtaining recorded information of the cassette and at least two erroneous erasure prevention detection pins, and the two erroneous erasure prevention detection pins are electrically connected to each other via the erroneous erasure prevention contact terminals or The recording / reproducing cassette according to claim 2, wherein it is determined whether recording is possible or not based on non-conduction. 4. The plurality of data detection pins are the I
4. When the C memory substrate is slid to a recordable or non-recordable position, it can be electrically connected to any of the terminals.
The recording / playback cassette described in.