JPH08289542A - Switching power supply system - Google Patents

Abstract

PURPOSE: To provide a switching power supply system which is used in various kinds of electronic equipments, especially an RCC, and which operates stably even under a light load by preventing the increase in a switching frequency under a light load or rather actively lowering the frequency and thereby lessening a turn-on loss. CONSTITUTION: This system is provided with a controlling circuit 80. The controlling circuit 80 sets the minimum off-state time which would be longer as a load gets lighter based on a feedback signal from a detecting circuit 7. After the passage of the minimum off-state time, the controlling circuit 80 sees if the flyback voltage appears in a tertiary winding 23. If the controlling circuit 80 detects no flyback voltage in the tertiary winding 23, it turns a switching device 3 on and then determines the on-state time of the switching device based on the feedback signal of the detecting circuit 7 so that the output DC voltage may be stabilized. By providing such a controlling circuit in this system, a switching frequency gets lowered as a load gets lighter and then a turn-on loss can be lessened and thereby the system can operate stably even under a light load.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a switching power supply device for supplying a stable DC voltage to various electronic devices.

[0002]

2. Description of the Related Art In recent years, a switching power supply has been widely used as a power supply for various electronic devices due to its highly efficient conversion characteristics. As a conventional switching power supply device, there is a self-oscillation type switching power supply device called RCC (ringing choke converter) as shown in FIG.

The operation of a conventional switching power supply device will be described below with reference to FIG. FIG.
In the above, 1 is an input DC power supply, and its voltage is Ei. 2 is a transformer, which is a primary winding 21 and a secondary winding 2
It has secondary and tertiary windings 23. 3 is a switching element, 4
Is a diode, and 5 is an output capacitor. The switching element 3 is repeatedly turned on and off to convert the input DC voltage Ei into a high frequency AC voltage, which is input to the primary winding 21 and generated in the secondary winding 22. The back voltage is rectified and smoothed by the diode 4 and the output capacitor 5, and is supplied to the load 6 as an output DC voltage. This output DC voltage is Eo. Reference numeral 7 is a detection circuit, and 8 is a control circuit, which outputs the output DC voltage E from the detection circuit that detects the output DC voltage to the control circuit 8.
Communicate the information of o. The control circuit 8 has a function of turning on the switching element 3 when the flyback voltage of the tertiary winding 23 disappears and determining the on-time so as to stabilize the output DC voltage Eo.

The operation of the switching power supply device configured as described above will be described below. First, when the switching element 3 is on, the input DC voltage Ei is applied to the primary winding 21 to excite the transformer 2. When the switching element 3 is turned off, the excitation energy of the transformer 2 is generated as a flyback voltage, rectified and smoothed by the diode 4 and the output capacitor 5, and the output DC voltage Eo is supplied to the load 6. When the exciting energy of the transformer 2 is released, the flyback voltage disappears and a ringing voltage is generated in each winding. The control circuit 8 detects that the flyback voltage has disappeared, and again switches the switching element 3
Turn on. In this way, the magnetic flux excited during the on time Ton of the switching element 3 and the magnetic flux demagnetized during the off time Toff become equal, so the primary winding 21 and the secondary winding 22 are
If the winding ratio of 1 and is 1, the relationship of Ei · Ton = Eo · Toff (1) holds. Therefore, if the control circuit 8 properly determines the on-time Ton based on the information of the output DC voltage Eo from the detection circuit 7, the output DC voltage Eo can be stabilized.

When the exciting inductance of the transformer 2 is L, the current flowing from the input DC power supply 1 during the on-time of the switching element 3 is a sawtooth current having a peak value of Ei.Ton / L, and therefore the input power Pi Is expressed by the following equation.

Pi = Ei2 Ton / (2L). {Ton
From (/ Ton + Toff)} (1), if Ei is constant, the ratio of Ton and Toff is also constant, and thus Pi∝Ton∝1 / f (2). f is a switching frequency. That is, the switching frequency f has a characteristic that it fluctuates in inverse proportion to the weight of the load.

[0007]

However, in the above-mentioned conventional structure, the switching frequency f varies in inverse proportion to the weight of the load, so that the frequency becomes higher as the load becomes lighter. When the switching frequency f becomes higher, the turn-on loss of the switching element 3 increases, leading to efficiency deterioration at light load. In addition, the ON time To existing depending on the drive capability of the control circuit 8 and the performance of the switching element 3
When reaching the minimum value of n, there is a problem that stable operation cannot be performed such as causing intermittent oscillation.

As means for solving this problem, for example, as disclosed in Japanese Patent Publication No. 5-57827,
Set the minimum off time Toff (MIN) with the control circuit,
There is a method of preventing the switching frequency f from becoming high even if the load becomes light. However, this method is limited to suppressing higher switching frequencies,
The upper limit switching frequency set by the minimum off-time Toff (MIN) is at a higher level than the switching frequency at the time of heavy load, so its effect is limited.

The present invention solves the above-mentioned conventional problems. By positively lowering the switching frequency at a light load, the turn-on loss of the switching element 3 is reduced to prevent efficiency deterioration. An object of the present invention is to provide a switching power supply device capable of ensuring operation stability even under a light load.

[0010]

In order to achieve this object, a switching power supply device of the present invention comprises an input DC power supply,
A transformer having a primary winding, a secondary winding, and a tertiary winding, a switching element connected in series with the input DC power supply and the primary winding, and a flyback voltage generated in the secondary winding. A diode and an output capacitor that rectify and smooth the output and supply an output DC voltage to the load; a detection circuit that detects the output DC voltage; and a minimum off time that increases as the load becomes lighter based on the feedback signal from the detection circuit. A function of determining, a function of turning on the switching element when the flyback voltage generated in the tertiary winding disappears after the minimum off time, and a stabilization of the output DC voltage based on a feedback signal from the detection circuit. And a control circuit having a function of determining the ON time of the switching element.

[0011]

With this configuration, the control circuit recognizes that the load is light based on the information from the detection circuit, and the lighter load causes the switching element OFF time to be set longer, thereby actively lowering the switching frequency. Therefore, it is possible to reduce the turn-on loss of the switching element, prevent the efficiency from deteriorating, and ensure the stability of the operation even under a light load.

[0012]

【Example】

(Embodiment 1) An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 shows a circuit configuration diagram of a switching power supply device according to a first embodiment of the present invention. In FIG. 1, reference numeral 1 denotes an input DC power supply, the voltage of which is Ei. 2 is a transformer, the primary winding 21, 2
It has a secondary winding 22 and a tertiary winding 23. Reference numeral 3 is a switching element, 4 is a diode, and 5 is an output capacitor. The switching element 3 is repeatedly turned on and off to convert the input DC voltage Ei into a high-frequency AC voltage, and the primary winding 2
1, the flyback voltage generated in the secondary winding 22 is rectified and smoothed by the diode 4 and the output capacitor 5, and is supplied to the load 6 as an output DC voltage. This output DC voltage is Eo. 7 is a detection circuit, and resistors 71 and 7
2, a reference voltage source 73, an error amplifier 74, a resistor 75 and a photocoupler 76. The detection circuit 7 divides the output DC voltage Eo by the resistors 71 and 72, compares the divided voltage with the reference voltage 73 and the error amplifier 74, and connects the resistor 75 and the photocoupler 76 connected to the output of the error amplifier 74.
A feedback signal is output as information on the output DC voltage Eo via. Reference numeral 80 denotes a control circuit which receives a feedback signal, that is, a reference voltage source 81 for converting a transistor current of the photocoupler 76 into a feedback voltage Vfb, a resistor 82, and a voltage Vtr generated by the tertiary winding 23, and a flyback voltage of Vtr. Timing circuit 83 that outputs the turn-on signal a at the timing when the voltage is no longer present, an on-time setting circuit 84 that outputs the turn-off signal b so as to shorten the on-time of the switching element 3 as Vfb is received and Vfb becomes higher, and Vf
The switching element 3 increases as Vfb increases due to the reception of power b.
The off-time setting circuit 85 that outputs the minimum off-time signal c so as to increase the minimum off-time, and the turn-on signal a, the turn-off signal b, and the minimum off-time signal c are received, and the switching element 3 is activated by the turn-off signal b. When it is turned off, it is kept off for at least the minimum off-time by the minimum off-time signal c, and the drive circuit 86 outputs the drive signal d for turning on the switching element 3 by the turn-on signal a after the minimum off-time.

The operation of the switching power supply device configured as described above will be described with reference to FIGS. 2 and 3. FIG. 2 is a timing chart showing the waveforms of the essential parts of this embodiment. The voltage Vtr of the tertiary winding 23, the turn-on signal a of the timing circuit 83, the turn-off signal b of the on-time setting circuit 84, and the off-time setting circuit 85 are shown. The states of the minimum off-time signal c and the drive signal d of the drive circuit 86 are shown for a heavy load and a light load. FIG. 3 shows the relationship between the feedback voltage Vfb and the on time Ton, the off time Toff, and the minimum off time Toff (MIN) of the switching element 3. The detection circuit 7 outputs the output DC voltage Eo like when the load is light.
Is going to rise, the feedback signal, that is, the photocoupler 76
Since it operates so as to increase the transistor current of, the feedback voltage Vfb also rises. On the contrary, the feedback voltage Vfb becomes low when the load is heavy. When the feedback voltage Vfb is low and the load is heavy, the minimum off-time Toff (MIN) is also short, and the off-time Toff of the switching element 3 is determined by the excitation energy emission period of the transformer 2. Thus, the switching power supply device of this embodiment also differs from the conventional example. Do the same. When the load becomes lighter and the feedback voltage Vfb rises, the ON time Ton of the switching element 3 becomes shorter, and the output DC voltage Eo is stabilized by suppressing the input power to the switching power supply device. Since the off time Toff is shortened at the same ratio, the switching frequency is also increased.

When the load is further reduced, the minimum off-time Toff is sooner than the excitation energy emission period of the transformer 2.
(MIN) becomes longer. Therefore, the turn-on signal a indicating the excitation energy emission of the transformer 2 is ignored, and the off time Toff is determined by the minimum off time Toff (MIN). After the excitation energy of the transformer 2 is released, a ringing voltage is generated due to the resonance between the excitation inductance of the transformer 2 and the parasitic capacitance equivalently connected in parallel therewith. The pulse generation circuit 83 that detects the voltage Vtr of the tertiary winding 23 continues to output the turn-on signal a at the cycle of this ringing voltage, and the minimum off-time Toff (MI
The drive circuit 86 turns on the switching element 3 by the turn-on signal a output after N). Since the minimum off-time Toff (MIN) becomes longer as the load is lighter, the switching frequency does not increase in frequency but decreases in frequency. This is shown in FIG.

Since the turn-on loss per switching cycle of the switching element 3 is substantially constant regardless of the load, it is reduced as the switching frequency is lower. Also, as mentioned above, when the load becomes lighter, the feedback signal increases,
Since the feedback voltage Vfb rises, the ON time Ton of the switching element 3 becomes short, and the output DC voltage Eo is attempted to be stabilized by suppressing the input power to the switching power supply device, but the minimum off time Toff (MIN) is On the contrary, since it becomes longer and the suppression of the input power is spurred, the ON time Ton is not shorter than that in the conventional example under the same load condition. For this reason, when the minimum value of the on-time Ton existing due to the drive capability of the control circuit 80 and the performance of the switching element 3 is reached, the load condition that stable operation such as intermittent oscillation becomes impossible is moved to the light load side and stabilized. The operating area can be expanded.

As described above, according to this embodiment, the input DC power supply 1, the primary winding 21, the secondary winding 22, and the tertiary winding 23 are provided.
With a transformer 2, an input DC power supply 1 and a primary winding 21
Switching element 3 and secondary winding 2 connected in series with
Based on the feedback signal from the detection circuit 7, the diode 4 and the output capacitor 6 that rectify and smooth the flyback voltage generated in 2 and supply the output DC voltage Eo to the load, the detection circuit 7 that detects the output DC voltage Eo, The minimum off time Toff (MIN) that becomes longer as the load becomes lighter is determined, and after the minimum off time Toff (MIN) is detected, the flyback voltage of the tertiary winding 23 is not generated, and the switching element 3 is turned on. The control circuit 8 having the function of determining the ON time Ton of the switching element 3 so as to stabilize the output DC voltage Eo based on the feedback signal from the detection circuit 7.
By adopting the configuration including 0 and 0, the switching frequency can be positively lowered at the time of light load,
It is possible to reduce the turn-on loss of the switching element 3 to prevent the efficiency from deteriorating, and to secure the operation stability even under a light load.

(Second Embodiment) A second embodiment of the present invention will be described below with reference to the drawings. FIG. 5 shows a control circuit of the switching power supply device according to the second embodiment of the present invention. The configuration other than the control circuit is similar to that of FIG. The control circuit shown in FIG. 5 has the same basic operation as that of the control circuit 80 of FIG. 1, and more specifically represents the control circuit 80 and corresponds to claim 3 in which a function is added. In FIG. 5, 23 is the transformer 2
Third winding, 76 is a photocoupler transistor, 81
Is a reference voltage source, 82 is a resistor, 83 is a timing circuit, 8
4 is an on-time setting circuit, 85 is an off-time setting circuit, 86
Is a drive circuit, and its basic operation is similar to that of FIG. The reference voltage source 81 is
It is composed of a diode 811, a capacitor 812 and a regulator circuit 813. The timing circuit 83 includes resistors 831 to 834, a diode 835, a PNP transistor 836 and an NPN 837. The on-time setting circuit 84 includes resistors 841 and 842, NPN transistors 843 and 844, a PNP transistor 845, a first capacitor 846, Zener diodes 847 and 848, and a comparator 849. Off time setting circuit 85
Is a constant current source 851, a second capacitor 852, a resistor 8
53, 854, NPN transistors 855, 856 and a comparator 857. The drive circuit 86 is NO
T circuit 861, NOR circuits 862 to 864 and amplifier 86
It consists of 5.

The operation of the control circuit configured as described above will be described. The reference voltage source 81 is the tertiary winding 23.
Flyback voltage of diode 811 and capacitor 8
12 is rectified and smoothed, and the reference voltage Vcc is supplied to each circuit through the regulator circuit 813.

The timing circuit 83 applies the voltage Vtr of the tertiary winding 23 to the PNP transistor 836 via the resistor 831.
Receive at. When the switching element 3 is off and the flyback voltage is generated in the tertiary winding 23, the PNP transistor 836 is reverse-biased and therefore off. The diode 835 is inserted for reverse voltage protection of the PNP transistor 836. At this time, the NPN transistor 837 supplied with the base current via the resistor 832 is turned on, so that the output turn-on signal a becomes L level. Further, since a current flows from the Vcc to the resistor 834 via the resistor 833 and the NPN transistor 837, the voltage drop V
834 has occurred. The base voltage of NPN transistor 837 is therefore Vbe + V834. Tertiary winding 2
When the flyback voltage of 3 disappears and the base voltage of the PNP transistor 836 falls below V834, the PNP transistor 836 turns on and the NPN transistor 837 turns off, so the output turn-on signal a becomes H level.

The on-time setting circuit 84 is the drive circuit 8
The drive signal d output from 6 is received by the PNP transistor 845 via the resistor 842. When the switching element 3 is off, that is, when the drive signal d is at L level, the PNP
Since the transistor 845 is on, the first capacitor 846 is charged to the voltage Vz1 of the Zener diode 847. This voltage Vz1 is the first predetermined voltage. When the drive signal d becomes H level and the switching element 3 is turned on, the PNP transistor 845 is turned off and the first capacitor 846 is discharged from the first predetermined voltage Vz1 via the NPN transistor 844.
The NPN transistor 844 has its emitter connected to the tertiary winding 23 via the resistor 831 and has a mirror configuration with the NPN transistor 843. Therefore NPN
The emitter potential of the transistor 844 is fixed at 0V,
The current flowing through the resistor 831 is the NPN transistor 8
It becomes equal to the discharge current of the first capacitor 846 flowing through 44. Since a forward voltage proportional to the input DC voltage Ei is generated in the tertiary winding 23, this discharge current is also proportional to the input DC voltage Ei. The voltage Vc1 of the first capacitor 846 is compared with the feedback voltage Vfb by the comparator 849, the discharge of Vc1 progresses, and Vc1 <V
When it becomes fb, the output turn-off signal b becomes H level. When the turn-off signal b becomes H level and the drive signal d becomes L level, the PNP transistor 845.
Turns on to rapidly charge Vc1 to the first predetermined voltage Vz1, and since the switching element 3 turns off, the forward voltage disappears in the tertiary winding 23 and the NPN transistor 844 turns off. At this time, Vc1> Vfb
Therefore, the turn-off signal b returns to the L level. The on time Ton of the switching element 3 is obtained as follows.
The number of turns of the primary winding 21 is N1, and the number of turns of the tertiary winding 23 is N3.
And the turn ratio is n = N3 / N1. The resistance value of the resistor 831 is Rtr, and the electrostatic capacitance of the first capacitor 846 is C
Set to 1. The forward voltage generated in the tertiary winding 23 is n
Since it is Ei, during the on time Ton, the voltage Vc1 of the first capacitor 846 is the discharge current nEi / Rtr,
It is time to discharge from the predetermined voltage Vz1 to the feedback voltage Vfb. That is, Ton = (Vz1-Vfb) * C1 * Rtr / (nEi). The higher the feedback voltage Vfb, the more the on time To becomes.
n is shortened and adjusted so as to stabilize the output DC voltage Eo. The discharge time constant is inversely proportional to the DC input voltage Ei. Zener diode 848 has feedback voltage Vfb
To provide a lower limit value Vfb (MIN). The maximum on-time Ton (MAX) of the on-time Ton is T
on (MAX) = (Vz1-Vfb (MIN)) * C1
Rtr / (nEi), and the input correction can be applied such that the maximum on-time Ton (MAX) becomes shorter as the DC input voltage Ei becomes higher.

The off-time setting circuit 85 includes a drive circuit 8
Drive signal d output from each
And the NPN transistor 855 and the NP via the resistor 854.
Received by N-transistor 856. When the switching element 3 is on, that is, when the drive signal d is at the H level, the NPN transistors 855 and 856 are in the on state, so the second
The capacitor 852 of is discharged to OV,
The minimum off-time signal c that is output is at the L level. The OV of the second capacitor 852 is the second predetermined voltage. When the drive signal d becomes L level, NP
The N transistors 855 and 856 are turned off, the second capacitor 852 is started to be charged by the constant current source 851, and the voltage Vc2 of the second capacitor 852 becomes
Since it is compared with the feedback voltage Vfb by the comparator 857, the minimum off-time signal c becomes H level. When the charging of Vc2 progresses and Vc2> Vfb, the minimum off-time signal c
Becomes L level. The minimum off time Toff (MIN) is obtained as follows. The charging current from the constant current source 851 is I
2. If the electrostatic capacity of the second capacitor 852 is C2, the minimum off-time Toff (MIN) is that the voltage Vc2 of the second capacitor 852 is the charging current I2 and the second predetermined voltage 0V to the feedback voltage Vfb. It will be time to charge. That is, Toff (MIN) = Vfb · C2 / I2. The higher the feedback voltage Vfb, the longer the minimum off time Toff (MIN).

The drive circuit 86 has a turn-on signal a,
The turn-off signal b and the minimum off-time signal c are received, the switching element 3 is turned on / off, and the drive signal d indicating the output information of the control circuit is output to each circuit.
The turn-on signal a is inverted by the NOT circuit 861 and then input to the NOR circuit 862 together with the minimum off-time signal c. The output of the NOR circuit 862 becomes H level when the turn-on signal a is H level and the minimum off-time signal c is L level, that is, the flyback voltage is generated in the tertiary winding 23 outside the minimum off-time. It's not time. The output signal of the NOR circuit 862 and the turn-off signal b are input to the flip-flop circuit composed of the NOR circuits 863 and 864. The output is output as the drive signal d via the amplifier 865. The drive signal d becomes L level when the turn-off signal b issues a pulse of H level, turns off the switching element 3, and turns the turn-on signal a until the output signal of the NOR circuit 862 becomes H level, that is, after the minimum off-time. The L level is maintained until the H level is reached. FIG. 6 is a timing chart showing the waveforms of the main parts of the control circuit of the switching power supply device according to this embodiment described above.
Voltage Vt of the tertiary winding 23 under heavy load and light load
r, turn-on signal a, voltage Vc1 of first capacitor 846, turn-off signal b, voltage Vc2 of second capacitor 852, minimum off-time signal c, output signal of NOR circuit 862 and drive signal d are shown. Further, FIG. 7 shows the relationship between the feedback voltage Vfb, the on time Ton, the off time Toff, and the minimum off time Toff (MIN).

As described above, the on-time setting circuit 84 is provided with the first capacitor 846, and the first capacitor 846 is supplied with a current corresponding to the forward voltage generated in the tertiary winding 23 when the switching element 3 is on. A configuration in which the feedback voltage Vfb obtained from the feedback signal from the detection circuit is compared with the voltage Vc1 of the first capacitor while charging or discharging from the first predetermined voltage, and when Vc1 reaches Vfb, the turn-off signal b is output. The off-time setting circuit 85 has a second capacitor 852, and when the switching element 3 is turned off, the minimum off-time signal c is output. At the same time, the second capacitor 852 is supplied with a predetermined current from a second predetermined voltage. While charging or discharging, the voltages Vc2 and Vfb of the second capacitor are compared, and when Vc1 reaches Vfb, the minimum off-time signal c With the structure to turn off,
The present invention can be embodied, and the on-time Ton is determined by the discharge time of the first capacitor 846 provided in the on-time setting circuit 84, and the discharge current is input as a function of the input DC voltage Ei. An on-time T having a characteristic that is corrected and becomes shorter as the input DC voltage Ei becomes higher.
Corresponding to on, the fluctuation of the feedback voltage Vfb due to the fluctuation of the input DC voltage Ei can be suppressed. Therefore, the minimum off time Toff (MIN) due to the fluctuation of the input DC voltage Ei
Of the switching frequency f at a light load can be suppressed. Further, in this configuration, by setting a lower limit value for the feedback voltage Vfb,
The maximum on-time Ton (MAX) can also be dependent on the input DC voltage, and the maximum input power of the switching power supply device can be input-corrected.

(Embodiment 3) A third embodiment of the present invention will be described below with reference to the drawings. FIG. 8 shows an off-time setting circuit in the control circuit of the switching power supply device according to the third embodiment of the present invention, and corresponds to claims 4 and 5. For other configurations,
Since it is similar to FIG. 5, it is omitted. In FIG. 8, a constant current source 8
51, a second capacitor 852, resistors 853, 854,
The NPN transistors 855 and 856 and the comparator 857 are similar to the off-time setting circuit 85 of FIG. The difference from the configuration of FIG. 5 is that resistors 871 to 873,
Comparator 874, OR circuit 875, NOT circuit 876, N
The point is that a PN transistor 877 and a constant current source 878 are added.

The operation of the off-time setting circuit configured as described above will be described. Resistor 871 and resistor 872
Divides the reference voltage Vcc to generate a third predetermined voltage V3. The comparator 874 compares the third predetermined voltage V3 with the voltage Vc2 of the second capacitor 852, and the output thereof is input to the OR circuit 875 together with the output of the comparator 858.
The output of the OR circuit 875 becomes the minimum off-time signal c. Therefore, when the drive signal d becomes L level and the NPN transistors 855 and 856 are turned off, the second capacitor 8
52 starts to be charged, and the output of the comparator 874 and the comparator 85
Since the outputs of 7 are both at the H level, the minimum off-time signal c is at the H level. Then, the H level of the minimum off-time signal c is maintained until the outputs of the comparator 874 and the comparator 857 are both at the L level. That is, when the feedback voltage Vfb is lower than the third predetermined voltage V3,
The charging of the voltage Vc2 of the second capacitor 852 proceeds and Vc
Even when 2> Vfb, the minimum off-time signal c remains at H level, and when Vc2> V3, the minimum off-time signal c becomes L level. Minimum off time Toff
(MIN) is Toff (MIN) = V3 · C2 / I
It is fixed at 2. Conversely, when the feedback voltage Vfb is higher than the third predetermined voltage V3, the minimum off-time signal c is Vc2>.
When it becomes Vfb, it becomes L level, and it has the dependency of the feedback voltage Vfb. With the above configuration, the lower limit of the minimum off-time Toff (MIN) can be set, and the minimum off-time Toff (MIN) can be prevented from becoming too short at the time of heavy load.

Further, in this embodiment, the comparator 874 is used.
Output of NPN via NOT circuit 876 and resistor 873
Input to transistor 877, NPN transistor 87
When 7 is turned on, the constant current source 87 is added to the second capacitor 852.
8 is connected. That is, when the charging of the voltage Vc2 of the second capacitor 852 progresses and Vc2> V3, the NPN transistor 877 is turned on, the constant current source 878 is connected to the second capacitor 852, and the charging current to the second capacitor 852 is increased. Is the difference between the charging current I2 of the constant current source 851 and the discharging current of the constant current source 878. Assuming that the difference between the charging current I2 of the constant current source 851 and the discharging current of the constant current source 878 is I3, the minimum off-time Toff (Moff when the feedback voltage Vfb is higher than the third predetermined voltage V3.
IN) is Toff (MIN) = V3 · C2 / I2 +
(Vfb-V3) · C2 / I3. FIG. 9 is a waveform diagram of a main part of the present embodiment, showing the second waveform under heavy load and light load.
The capacitor voltage Vc2, the output of the comparator 857, the output of the comparator 874, and the minimum off-time signal c are shown. FIG. 10 shows the relationship between the feedback voltage Vfb and the minimum off-time Toff (MIN).

As described above, when the third predetermined voltage V3 is provided in the off-time setting circuit to output the minimum off-time signal c and at the same time the charging of the second capacitor 852 is started, the third predetermined voltage V3 is output. By continuing to output the minimum off-time signal c during the period until reaching V3, the minimum off-time T
A lower limit value can be set for off (MIN). In a switching power supply device such as the RCC used in the present invention, a surge voltage is generated when the switching element 3 is turned off. This surge voltage is a high frequency resonance phenomenon between the leakage inductance of the transformer 2 and the parasitic capacitance.
A high frequency voltage is also generated in the secondary winding 23 immediately after it is turned off. Further, the amplitude becomes larger as the switching current immediately before turn-off is larger, that is, when the load is heavy. Setting the minimum off-time Toff (MIN) also has the effect of ignoring the turn-on signal output from the timing circuit with the high-frequency voltage generated immediately after this turn-off and ensuring the necessary off-time. As in the present invention, the minimum off time Toff (MI
If N) becomes shorter as the load increases, this effect may be impaired. If a lower limit value can be set for the minimum off-time Toff (MIN), the minimum off-time Tof can be set under heavy load.
It is possible to prevent f (MIN) from becoming too short.

Further, the second capacitor 852 is charged with a predetermined current I2 during the period until reaching the third predetermined voltage V3, and the second predetermined current I3 is changed from the third predetermined voltage V3.
With the configuration in which the charging is performed with, the change range of the minimum off-time Toff (MIN) at the time of a light load can be expanded as shown in FIG. In the configurations up to FIG. 5, the minimum off time Toff (MIN) is simply the feedback voltage Vfb.
Was only proportional to. As in the present embodiment, the minimum off-time Toff (MIN) is set by changing the charging current to the second capacitor 852 depending on whether the lower limit value is set or changed at the time of light load. If the relationship between MIN) and the feedback voltage Vfb can also be set, the degree of freedom in design is increased and a higher performance switching power supply device can be obtained.

(Embodiment 4) A fourth embodiment of the present invention will be described below with reference to the drawings. FIG. 11 shows an on-time setting circuit and an off-time setting circuit in the control circuit of the switching power supply device according to the fourth embodiment of the present invention. The configurations other than the on-time setting circuit and the off-time setting circuit are the same as those in FIGS. See also FIG.
The off-time setting circuit shown in FIG. 1 has the same basic operation as that shown in FIG. 8, and this embodiment corresponds to claim 6. In FIG. 11, the tertiary winding 23, the resistor 83
1, resistor 841, NPN transistors 843, 844,
The Zener diodes 847 and 848 and the comparator 849 are the same as those in FIG. 5, and the constant current sources 851 and 878 and the resistor 85 are used.
4,871-873, NPN transistors 854,87
7, comparator 874, OR circuit 875 and NOT circuit 876
Is similar to FIG. 5 and 8 is different from the configuration of FIG. 5 and FIG. 8 in that the first and second capacitors 846 and 852 are commonly used as a capacitor 880, resistors 842, 853, NP.
By removing the N transistors 845, 855 and the comparator 857, the resistors 881 to 883, the NPN transistor 884,
PNP transistors 885, 886, NOT circuit 88
7, 888, AND circuit 889 and OR circuit 890 are added, and in the ON time setting circuit, the turn-off signal b is output from the output of the comparator 849 via the pulse generation circuit including the NOT circuit 887 and the AND circuit 889, Turn-off signal b is passed through resistor 881 to NPN transistor 8
In the off-time setting circuit, the first and second capacitors 846 and 852 are commonly used as the capacitor 880 so that the capacitor 880 can be shared by the comparator 857 and the comparator 849. 8
82 and PNP transistor 885 receive the drive signal d to switch the constant current source 851, and the minimum off-time signal c
Through a pulse generation circuit composed of a NOT circuit 888 and an OR circuit 890, and a resistor 883.
That is, the capacitor 880 is configured to be rapidly charged.

The operation of the on-time setting circuit and the off-time setting circuit configured as described above will be described. First, when the drive signal d becomes H level and the switching element 3 is turned on, a forward voltage is generated in the tertiary winding 23, and the capacitor 8 is passed through the NPN transistor 844.
Discharge 80. At the same time, the NPN transistor 854 is also turned on to fix the minimum off-time signal c to the L level. The above is the same operation as in FIG. The difference is that the first and second capacitors 846 and 852 are shared and the capacitor 880 is
Therefore, the capacitor 88 by the constant current source 851 is
This is a point where the charging to 0 is cut off by turning off the PNP transistor 885. Set the voltage of the capacitor 880 to Vc
Then, the discharge of the capacitor 880 advances and Vc <Vfb
Then, the comparator 849 goes to the H level, and the pulse generation circuit composed of the NOT circuit 887 and the AND circuit 889 detects the rising of the H level from the L level and outputs the one-shot pulse turn-off signal b. The turn-off signal b changes the drive signal d to L level,
The NPN transistor 884 is turned on and the capacitor 880
Voltage Vc is rapidly discharged to a second predetermined voltage of 0V. When the drive signal d becomes L level, the NPN transistor 856 is turned off, and the minimum off time signal c which is the output of the OR circuit 875 to which the H level of the comparator 849 is input becomes H level. At the same time, the PNP transistor 88
2 turns on, and when the turn-off signal b of the one-shot pulse becomes L level and the NPN transistor 884 turns off, the constant current source 851 charges the capacitor 880 to the charging current I.
Start charging at 2. At this time, since Vc <V3 also holds, the output of the comparator 874 is at the H level and the NPN transistor 877 is off, so the constant current source 878 is not connected. When Vfb <V3, the capacitor 88
0 continues to be charged with the charging current I2 until Vc <V3, and during this period, the minimum off-time signal c becomes H level.
When Vfb> V3, the NPN transistor 877 is turned on from Vc> V3, and the capacitor 880 has Vc> Vf.
The battery is charged with the charging current I3 up to b, and the minimum off-time signal c becomes H level during this period. This minimum off time T
The operation of determining off (MIN) is the same as in FIG. NO
The pulse generation circuit including the T circuit 888 and the OR circuit 890 detects the falling of the minimum off-time signal c at the L level, outputs a one-shot pulse signal, receives the one-shot pulse signal, and receives a PNP transistor. 88
6 is turned on, the capacitor 880 is the Zener diode 8
It is rapidly charged to a first predetermined voltage Vz1 determined by 47. Thereafter, the turn-on signal a from the timing circuit is received, and this state is maintained until the drive signal d becomes H level, and when the drive signal d becomes H level, the above operation is repeated. FIG. 12 shows a waveform diagram of the main part of the above operation.
Voltage V of capacitor 880 under heavy load and light load
c, output of comparator 849, turn-off signal b, comparator 8
The output of 74, the minimum off-time signal c, the output of the comparator 890 and the drive signal d are shown.

As described above, according to this embodiment, the first capacitor 846 of the on-time setting circuit and the second capacitor 852 of the off-time setting circuit are shared and the capacitor 88 is used.
0, the on-time setting circuit outputs the turn-off signal b, and at the same time sets the capacitor 880 to the second predetermined voltage 0V.
By rapidly discharging to the off time setting circuit, the minimum off time signal c disappears, and at the same time, the capacitor 880 is rapidly charged to the first predetermined voltage Vz1.
When the control circuit of the switching power supply device according to the present invention is integrated into an integrated circuit, the number of terminals of the integrated circuit and the number of external parts can be reduced.

(Fifth Embodiment) A fifth embodiment of the present invention will be described below with reference to the drawings. FIG. 13 is a diagram in which the invention of claim 7 is applied to the off-time setting circuit shown in FIG. 8, and only the configuration different from that of FIG. 8 is shown. Therefore, FIG.
3 shows a part of the off-time setting circuit in the control circuit of the switching power supply device according to the fifth embodiment of the present invention. In FIG. 13, resistors 891 and 892 are the reference voltage V
cc is divided to create a fourth predetermined voltage V4. Comparator 8
93 is a fourth predetermined voltage V4 and a second capacitor 852
The voltage Vc2 is compared. The output of the comparator 893 is input to the AND circuit 894 together with the output of the OR circuit 875,
The output of the AND circuit 894 becomes the minimum off-time signal c.
NPN transistor 856 is connected to short circuit the minimum off-time signal c rather than the output of OR circuit 875.

The operation of the off-time setting circuit configured as above will be described. The fourth predetermined voltage V4 is set higher than the third predetermined voltage V3, and when Vfb <V4, Vc2 <V4 is also established, so that the output of the comparator 893 is H.
The level is the same as the operation of FIG. Vfb> V4
In the case of, when the voltage Vc2 of the second capacitor 852 is charged within the minimum off-time Toff (MIN), Vc
When 2> V4, the output of the comparator 893 becomes L level, and the output of the AND circuit 894, that is, the minimum off-time signal c becomes L level. Therefore, the minimum off time Toff (MI
The upper limit can be set in N).

As described above, according to this embodiment, by setting the upper limit value to the minimum off-time Toff (MIN), the minimum off-time Toff (MIN) is set when the load becomes light.
The switching frequency f that becomes longer and lowers
It becomes possible to prevent it from becoming too low and falling into the audible region (20 kHz or less).

In the first to fifth embodiments, the first capacitor 846 or the capacitor 880 is discharged when the on-time is set, and the second capacitor 852 or the capacitor 880 is charged when the minimum off-time is set. However, the present invention is not limited to this, because it is represented as a means for utilizing the charge / discharge time of the capacitor for each time setting.

(Embodiment 6) A control circuit for a switching power supply according to a sixth embodiment of the present invention will be described with reference to FIG. In FIG. 14, the control IC 9 has a terminal 90 connected to a common voltage, a terminal 91 for supplying a power supply voltage to the control IC 9, a terminal 92 for turning on / off the switching element 3,
A terminal 93 connected to the tertiary winding 23 via a resistor or the like, and a terminal 9 connected to the photocoupler 76 for receiving a feedback signal.
4, having a terminal 95 for setting the minimum off time, a terminal 93
When the voltage applied to is lower than a predetermined value and after the minimum off-time, an output pulse voltage is output from the terminal 92, and the output pulse voltage has a function of shortening as the outflow current from the terminal 94 increases. A parallel circuit of a capacitor 950 and a resistor 951 is connected to the normal terminal 95, and the minimum off time Tof
f (MIN) is a capacitor 95 charged to a predetermined voltage
It is determined by the time that 0 is discharged by the resistor 951. To apply the present invention to this, a photo coupler 76
Resistor 8 that converts the transistor current of the device into the feedback voltage Vfb
2, and an NPN transistor 94 which receives the feedback voltage Vfb as a base and supplies a current corresponding to the feedback voltage Vfb to a terminal 95.
0 and the resistor 941 are connected.

With the above structure, when the load is light, the transistor current of the photocoupler 76 increases, the feedback voltage Vfb rises, and when the NPN transistor 940 becomes the active region, a current flows through the resistor 941 and this current flows through the capacitor 950. It works to extend the discharge time. That is, the minimum off time Toff (MIN) also extends.

As described above, the present invention can be embodied by adding a few external parts to the existing control IC having the minimum off-time setting function.

(Embodiment 7) In Embodiments 1 to 6, the present invention has been applied to the switching power supply device of RCC. This is because, as described above, the RCC has a characteristic that the switching frequency becomes high when the load is light, so that the effect of the present invention is most prominent. But RCC
As described above, in most switching power supply devices that operate at a fixed switching frequency as well as those that have the characteristic that the switching frequency becomes high when the load is light, applying the present invention reduces the turn-on loss of the switching element when the load is light. It can be reduced. FIG.
A circuit configuration diagram of a switching power supply device according to a seventh embodiment of the present invention corresponding to claim 8 will be shown and described.

In FIG. 15, 1 is an input DC power supply, 2 is a transformer, and has a primary winding 21 and a secondary winding 22. 3 is a switching element, 41 and 42 are diodes, 51 is a smoothing choke, 52 is an output capacitor, and the input DC voltage converted into a high frequency AC voltage by turning on / off the switching element 3 is connected to the diodes 41 and 42 via the transformer 2. A rectifying and smoothing is performed by the smoothing choke 51 and the output capacitor 52, and a feedforward converter that supplies an output DC voltage to the load 6 is configured. A detection circuit 7 detects the output DC voltage and outputs a feedback signal via the photocoupler 76. Reference numeral 10 denotes a control circuit, which is an existing switching regulator control IC as in the sixth embodiment. The control circuit 10 includes a terminal 100 that is connected to a common voltage and a terminal 1 that supplies a power supply voltage to the control circuit 10.
01, a terminal 102 for turning on / off the switching element 3,
Terminal 103 connected to resistor 107, capacitor 108
Has a terminal 104 to which is connected, a terminal 105 to which a resistor 109 is connected, and a terminal 106 which is connected to a photocoupler 76 and receives a feedback signal. The outflow current from the terminal 106 is converted into a current / voltage, and an internal feedback voltage is obtained. And the output pulse width output from the terminal 102 is adjusted by comparing with the voltage of the capacitor 108 that repeats charging and discharging, that is, the voltage of the terminal 104. It is assumed that an output pulse is output from the terminal 102 when the voltage of the capacitor 108 is lower than the internal feedback voltage during the charging period. The charging current and discharging current of the capacitor 108 are determined according to the resistance values connected to the terminals 103 and 105, respectively. It is assumed that the larger the resistance value, the smaller the charging / discharging current. Therefore, the resistor 107,
The maximum on time, the minimum off time, and the switching frequency are determined by the set values of the capacitor 108 and the resistor 109.
The above is the normal usage of the control circuit 10. Further, the transistor current of the photocoupler 76 is set to the feedback voltage V
A resistor 82 for converting into fb, an NPN transistor 940 which receives a feedback voltage Vfb as a base and supplies a current corresponding to the feedback voltage Vfb to a terminal 105, and a resistor 941 are connected.

With the above configuration, when the load is light, the transistor current of the photocoupler 76 increases, the feedback voltage Vfb rises, and when the NPN transistor 940 becomes the active region, the current flows through the resistor 941. This current serves to apparently increase the resistance value connected to the terminal 105. Therefore, the discharge time of the capacitor 108 is extended, and the period in which the output pulse from the terminal 102 is off, that is, the off time of the switching element 3 is lengthened.

As described above, according to this embodiment, by adding a few external parts to the existing switching regulator control IC, the switching power supply device operating at a fixed switching frequency can be operated at a low load when the load is low. It is also possible to realize the present invention by changing the frequency, and it is possible to reduce the turn-on loss of the switching element 3 when the load is light.

In the first to seventh embodiments, the detection circuit 7 is configured on the secondary side so as to detect the output DC voltage Eo, and the feedback signal is sent to the control circuit via the photocoupler 76. Although fed back, the detection circuit is configured to detect the DC voltage obtained by rectifying and smoothing the flyback voltage of the tertiary winding 23, thereby omitting the photocoupler 76 and substantially stabilizing the output DC voltage Eo. There are also means. This is also because the detection circuit indirectly detects the output DC voltage Eo, so long as the configuration is such that the light load is recognized from the feedback signal and the off time is controlled to be extended. Not to mention that.

[0044]

As described above, the present invention includes an input DC power supply,
A transformer having a primary winding, a secondary winding, and a tertiary winding, a switching element connected in series with the input DC power supply 1 and the primary winding 21, and a flyback voltage generated in the secondary winding. Rectifying and smoothing, the output DC voltage to the load, the output capacitor, the detection circuit that detects the output DC voltage, and the feedback signal from the detection circuit determines the minimum off time that becomes longer as the load becomes lighter. After the minimum off time, the switching element is turned on by detecting that the flyback voltage of the tertiary winding is not generated, and the switching element is turned on so that the output DC voltage is stabilized based on the feedback signal from the detection circuit. With the configuration including the control circuit having the function of determining the time, the switching frequency can be actively lowered at the time of light load, and the switching element By reducing the on loss preventing efficiency deterioration, in which good can realize a switching power supply can be even more secure operation stability to light loads.

[Brief description of drawings]

FIG. 1 is a circuit configuration diagram of a switching power supply device according to a first embodiment of the present invention.

FIG. 2 is a waveform diagram of a main part of the switching power supply device according to the first embodiment.

FIG. 3 is a diagram showing the relationship between the feedback voltage and the operation time of the switching power supply device according to the first embodiment.

FIG. 4 is a relationship diagram of a load and a switching frequency of the switching power supply device according to the first embodiment.

FIG. 5 is a circuit configuration diagram of a control circuit of a switching power supply device according to a second embodiment of the present invention.

FIG. 6 is a waveform diagram of essential parts of a switching power supply device according to a second embodiment.

FIG. 7 is a diagram showing the relationship between the feedback voltage and the operating time of the switching power supply device according to the second embodiment.

FIG. 8 is a circuit configuration diagram of an off-time setting circuit of a control circuit of a switching power supply device according to a third embodiment of the present invention.

FIG. 9 is a waveform diagram of essential parts of an off-time setting circuit of the control circuit of the switching power supply device according to the third embodiment.

FIG. 10 is a diagram showing the relationship between the feedback voltage and the minimum off time of the switching power supply device according to the third embodiment.

FIG. 11 is a circuit configuration diagram of an on-time setting circuit and an off-time setting circuit of a control circuit of a switching power supply device according to a fourth embodiment of the present invention.

FIG. 12 is a waveform diagram of essential parts of a control circuit of a switching power supply device according to a fourth embodiment.

FIG. 13 is a circuit configuration diagram of a part of an off-time setting circuit of a control circuit of a switching power supply device according to a fifth embodiment of the present invention.

FIG. 14 is a circuit configuration diagram of a control circuit of a switching power supply device according to a sixth embodiment of the present invention.

FIG. 15 is a circuit configuration diagram of a switching power supply device according to a seventh embodiment of the present invention.

FIG. 16 is a circuit configuration diagram of a conventional switching power supply device.

[Explanation of symbols]

 1 input DC power supply 2 transformer 21 primary winding 22 secondary winding 23 tertiary winding 3 switching element 4 diode 5 output capacitor 6 load 7 detection circuit 80 control circuit 83 timing circuit 84 on-time setting circuit 85 off-time setting circuit 86 drive circuit

Continuation of the front page (72) Inventor Nobu Yabu 1006 Kadoma, Kadoma City, Osaka Prefecture Matsushita Electric Industrial Co., Ltd.

Claims (8)

[Claims] 1. A transformer having an input DC power supply, a primary winding, a secondary winding, and a tertiary winding; a switching element connected in series with the input DC power supply and the primary winding; A diode and an output capacitor that rectify and smooth the flyback voltage generated in the secondary winding and supply an output DC voltage to the load, a detection circuit that detects the output DC voltage, and a feedback signal from the detection circuit. A function of determining a minimum off-time that becomes longer as the load is lighter, a function of turning on the switching element by detecting that a flyback voltage of the tertiary winding is not generated after the minimum off-time, and the detection And a control circuit having a function of determining an ON time of the switching element so as to stabilize the output DC voltage based on a feedback signal from the circuit. 2. The timing circuit, wherein the control circuit detects a voltage generated in the tertiary winding and outputs a turn-on signal during a period in which there is no flyback voltage; and a feedback signal from the detection circuit, and the switching circuit receives the feedback signal. An ON time of the switching element is determined so as to stabilize the output DC voltage when the element is ON, an ON time setting circuit that outputs a turn-off signal, and a feedback signal from the detection circuit is received, and the feedback signal is received. An off-time setting circuit that determines a minimum off-time that becomes longer as the on-time setting circuit is in a direction to shorten the on-time of the switching element, and outputs a minimum off-time signal when the switching element is off, The turn-on signal, the turn-off signal, and the minimum off-time signal are received, and the switch is received by receiving the turn-off signal. A driving circuit that turns off the switching element, maintains the switching element off during the power receiving period of the minimum off time signal after turning off, and turns on the switching element by receiving the turn on signal after the minimum off time ends. The switching power supply device according to claim 1, which comprises 3. The on-time setting circuit has a first capacitor, and the first capacitor is provided with a current according to a forward voltage generated in the tertiary winding when the switching element is on.
Charging or discharging the capacitor from a first predetermined voltage, comparing the feedback voltage obtained from the feedback signal from the detection circuit with the voltage of the first capacitor, and charging or discharging the voltage of the first capacitor. When the discharge voltage reaches the feedback voltage, the turn-off signal is output, the off-time setting circuit includes a second capacitor, and outputs the minimum off-time signal when the switching element is turned off. The second capacitor is charged or discharged from the second predetermined voltage with a predetermined current, and
Comparing the feedback voltage and the voltage of the second capacitor,
The switching power supply device according to claim 2, wherein the minimum off-time signal is turned off when the voltage of the second capacitor reaches the feedback voltage by charging or discharging. 4. The off-time setting circuit is provided with a third predetermined voltage to output the minimum off-time signal, and at the same time,
When charging or discharging of the second capacitor is started from a second predetermined voltage with a predetermined current, charging or discharging is maintained until the third predetermined voltage is reached, and the minimum off-time signal is output. The switching power supply device according to claim 3, wherein a lower limit value is further set for the minimum off-time by continuing to output. 5. The off-time setting circuit charges or discharges the second capacitor with a first predetermined current during a period from the second predetermined voltage to the third predetermined voltage, 5. The switching power supply device according to claim 4, wherein charging or discharging is performed with a second predetermined current from the third predetermined voltage. 6. The on-time setting circuit and the off-time setting circuit share a capacitor, and the on-time setting circuit turns on the turn-off signal and simultaneously changes the voltage of the capacitor to a second predetermined voltage. 4. The configuration according to claim 3, wherein the off time setting circuit turns off the minimum off time signal and simultaneously rapidly charges or discharges the voltage of the capacitor to a first predetermined voltage. 5. The switching power supply device according to any one of 5. 7. The switching power supply device according to claim 1, wherein an upper limit value is provided for the minimum off time. 8. A switching element that turns on and off converts an input DC voltage into a high frequency AC voltage, rectifies and smoothes it again through a transformer or a choke coil, supplies an output DC voltage to a load, and detects the output DC voltage. Based on a feedback signal from the detection circuit to adjust the on-off ratio of the switching element by the control circuit, in the switching power supply device to stabilize the output DC voltage, the control circuit, the feedback signal of the switching element A switching power supply device having a function of increasing the OFF time of the switching element as the ON time is shortened.