JPH08274592A - Voltage-controlled oscillator circuit - Google Patents

Voltage-controlled oscillator circuit

Info

Publication number
JPH08274592A
JPH08274592A JP7076698A JP7669895A JPH08274592A JP H08274592 A JPH08274592 A JP H08274592A JP 7076698 A JP7076698 A JP 7076698A JP 7669895 A JP7669895 A JP 7669895A JP H08274592 A JPH08274592 A JP H08274592A
Authority
JP
Japan
Prior art keywords
voltage
differential
input
terminals
current
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7076698A
Other languages
Japanese (ja)
Inventor
Akira Abe
彰 阿部
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP7076698A priority Critical patent/JPH08274592A/en
Publication of JPH08274592A publication Critical patent/JPH08274592A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To improve stability of oscillation by using plural differential amplifiers positioned mutually to be a front one and a rear one and connecting their differential input terminals and output terminals in a manner that they are opposite in operating characteristic to each other. CONSTITUTION: The differential input terminals 2, 3 and the differential output terminals 4, 5 located before and behind are connected in series and also in a ring shape by using the plural differential amplifiers so as to display their operating polarities opposite to each other. Currents corresponding to the input voltage of the terminals 2, 3 flow on differential input transistors 9, 10, and the sum of them flows on a current control transistor. In such a case, a constant DC current flows on a transistor 7 when it performs a constant current operation in a saturated area by a DC voltage supplied to the control input of a current control terminal 6. Therefore, the voltage of the drain terminal 8 of the transistor 7 is stabilized at a nearly constant voltage value without changing in a pulse shape steeply. Since a high oscillation frequency is obtained with a low voltage, low power consumption is attained.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は電圧制御型発振回路に関
するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a voltage controlled oscillator circuit.

【0002】[0002]

【従来の技術】従来の電圧制御型発振回路は例えば図3
に示されるように反転回路をリング発振器として構成下
ものであり、1つの反転回路のVDD側とVSS側に各
々1個の電流制御トランジスタを挿入し、制御入力端子
11に入力される制御電圧によって2つの電流制御トラ
ンジスタに流れる電流を同時に制御することによって発
振周波数を制御するというものであった。
2. Description of the Related Art A conventional voltage controlled oscillator circuit is shown in FIG.
As shown in FIG. 3, the inverting circuit is configured as a ring oscillator, and one current control transistor is inserted on each of the VDD side and the VSS side of one inverting circuit, and a control voltage input to the control input terminal 11 is used. The oscillation frequency is controlled by simultaneously controlling the currents flowing through the two current control transistors.

【0003】[0003]

【発明が解決しようとする課題】従来の電圧制御型発振
回路における各反転回路の動作電流は該反転回路の入力
電圧の関数であり一定ではない。これはCMOS反転回
路の動作原理からも明白である。よって、発振動作中に
電流制御トランジスタ21および22に流れる電流も一
定ではなく発振周波数の2倍の頻度で反転回路に流れる
貫通電流がパルス状に流れることになる。従って、電流
制御トランジスタ21および22はパルス電流が流れる
瞬間のみの定電流飽和領域動作を要求され、その瞬間以
外は非飽和領域動作状態となっている。
The operating current of each inverting circuit in the conventional voltage controlled oscillator circuit is a function of the input voltage of the inverting circuit and is not constant. This is also clear from the operating principle of the CMOS inversion circuit. Therefore, the current flowing through the current control transistors 21 and 22 during the oscillating operation is also not constant, and the through current flowing through the inverting circuit flows in a pulse shape at a frequency twice the oscillation frequency. Therefore, the current control transistors 21 and 22 are required to operate in the constant current saturation region only at the moment when the pulse current flows, and are in the non-saturation region operation state at other times.

【0004】ここで、21および22のドレイン端子で
ある23と24を見ると、以上の理由からこれらの端子
電圧も発振周波数の2倍の頻度でパルス状に振られるこ
とになる。所望の発振周波数が比較的低い場合は特に問
題とはならないが、より高周波数で発振させようとする
と、新たに次の問題が発生した。
Looking at the drain terminals 23 and 24 of 21 and 22, the voltage of these terminals is also pulsed at a frequency twice as high as the oscillation frequency for the above reason. When the desired oscillation frequency is comparatively low, there is no particular problem, but when the oscillation is attempted at a higher frequency, the following new problem occurs.

【0005】同じ制御電圧で発振周波数を上げるために
は21と22の電流制御トランジスタの電流能力を大き
くして動作電流を大きくすればよいが、通常このために
は該トランジスタの物理寸法の増大が伴い、これに比例
して23と24における寄生容量の増大を招く。前述の
通り23と24は発振周波数の2倍の頻度で電圧が振ら
れるため、ここの寄生容量が大きいと高速な電圧変化を
妨げるため寄生容量は発振周波数を下げる方向に作用す
ることになる。以上から発振周波数を上げようとして電
流制御トランジスタの電流能力を上げても発振周波数は
前記寄生容量によって低く制限されることになり、さら
に寄生容量に流れる電流が原因となって反転回路の動作
電流に対する発振周波数の直線性も損なわれるという問
題が発生した。
In order to increase the oscillation frequency with the same control voltage, it is sufficient to increase the current capability of the current control transistors 21 and 22 to increase the operating current, but this usually requires an increase in the physical size of the transistors. Accordingly, the parasitic capacitances at 23 and 24 are increased in proportion to this. As described above, the voltages of 23 and 24 are swung at a frequency twice as high as the oscillation frequency. Therefore, if the parasitic capacitance is large, the high-speed voltage change is hindered and the parasitic capacitance acts to lower the oscillation frequency. From the above, even if the current capability of the current control transistor is increased in an attempt to increase the oscillation frequency, the oscillation frequency is limited to a low level by the parasitic capacitance, and the current flowing in the parasitic capacitance causes the operating current of the inverting circuit to increase. There was a problem that the linearity of the oscillation frequency was also impaired.

【0006】また、従来の電圧制御型発振回路において
は電源間に4個のトランジスタが直列に接続されるた
め、各トランジスタの端子間電圧を確保するために電源
電圧をある電圧値以下にできないという問題があり、近
年の低電源電圧化に充分に対応することができない。さ
らに、前述の通り電流制御トランジスタが1反転回路に
つき2個あるため、20の制御電圧変換回路が別途必要
となりこれは以下の問題を持つ。
Further, in the conventional voltage-controlled oscillator circuit, four transistors are connected in series between the power supplies, so that the power supply voltage cannot be made lower than a certain voltage value in order to secure the terminal voltage of each transistor. There is a problem, and it is not possible to sufficiently cope with the recent reduction in power supply voltage. Further, as described above, since there are two current control transistors per inversion circuit, 20 control voltage conversion circuits are separately required, which has the following problems.

【0007】従来の電圧制御型発振回路の制御入力11
にAC信号を入力すると電流制御トランジスタ22のゲ
ート端子にはそのまま伝わるが、電流制御トランジスタ
21のゲート端子には制御電圧変換回路20を通ってか
ら伝わるため、22と21のゲート端子間に制御電圧の
時間的ずれが生じてしまう。また、11を充分な低イン
ピーダンスで駆動しても制御電圧変換回路20の出力イ
ンピーダンスを消費電流の観点からあまり小さくできな
いため、制御電圧変換回路20の出力が発振器からの影
響を受け易くなり、全体の発振周波数の安定度を上げに
くいという問題がある。
Control input 11 of a conventional voltage controlled oscillator circuit
When an AC signal is input to the current control transistor 22, it is transmitted to the gate terminal of the current control transistor 22 as it is, but it is transmitted to the gate terminal of the current control transistor 21 after passing through the control voltage conversion circuit 20. There will be a time lag. Further, even if 11 is driven with a sufficiently low impedance, the output impedance of the control voltage conversion circuit 20 cannot be made too small in terms of current consumption, so that the output of the control voltage conversion circuit 20 is easily affected by the oscillator, and There is a problem that it is difficult to increase the stability of the oscillating frequency.

【0008】さらに、前述の通り各反転回路には発振周
波数の2倍の頻度でパルス状の貫通電流が流れているた
め、発振周波数を上げるほど電源のインピーダンスを充
分低くしないと電源に雑音を重畳して他の回路あるいは
自分自身に電源雑音の影響を及ぼして、発振の安定度を
損ない易いという問題が発生した。
Further, as described above, since a pulse-like through current flows at a frequency twice as high as the oscillation frequency in each inverting circuit, noise is superimposed on the power source unless the impedance of the power source is made sufficiently low to raise the oscillation frequency. Then, the problem that power supply noise affects other circuits or itself and the stability of oscillation is easily impaired occurs.

【0009】[0009]

【課題を解決するための手段】一対の差動電圧入力端子
と一対の差動電圧出力端子を具備し、該差動電圧入力端
子間に入力される差動電圧を増幅した結果を該差動出力
端子間に差動出力する差動増幅器であって、該差動増幅
器は差動増幅の動作電流が制御入力端子の入力によって
制御される差動増幅器を具備し、該差動増幅器を複数個
用いて互いに前後する差動増幅器の差動電圧入力端子と
差動出力端子が互いの動作極性が反対となるように直列
かつリング状に接続することを特徴とする。また該差動
増幅器の電流制御入力端子を互いに接続してこれを入力
とし、該差動増幅器の任意の出力端子を出力としたこと
を特徴とする。
A differential voltage input terminal and a pair of differential voltage output terminals are provided, and a result of amplifying a differential voltage input between the differential voltage input terminals is used as the differential signal. A differential amplifier that differentially outputs between output terminals, the differential amplifier including a differential amplifier in which an operating current of the differential amplification is controlled by an input of a control input terminal. It is characterized in that the differential voltage input terminal and the differential output terminal of the differential amplifier, which are arranged before and after each other, are connected in series and in a ring shape so that their operation polarities are opposite to each other. Further, the current control input terminals of the differential amplifier are connected to each other to be used as an input, and any output terminal of the differential amplifier is used as an output.

【0010】[0010]

【実施例】図1に3個の差動増幅器を用いた本発明の電
圧制御型発振回路の一実施例を示す。1は差動増幅器で
ありCMOSトランジスタで構成した場合の例を図2に
示す。2および3は差動入力端子であり4および5は差
動出力端子である。6は電流制御入力端子であり、この
端子に入力する電圧によって該作動増幅器の動作電流を
制御する。この差動増幅器の動作は周知であるので説明
を省略する。
FIG. 1 shows an embodiment of the voltage controlled oscillator circuit of the present invention using three differential amplifiers. FIG. 2 shows an example in which a differential amplifier 1 is composed of CMOS transistors. 2 and 3 are differential input terminals, and 4 and 5 are differential output terminals. A current control input terminal 6 controls the operating current of the operational amplifier by the voltage input to this terminal. Since the operation of this differential amplifier is well known, its explanation is omitted.

【0011】図1の電圧制御型発振回路は互いに前後す
る差動増幅器の差動電圧入力端子と差動出力端子が互い
の動作極性が反対となるように直列かつリング状に接続
し、該差動増幅器がリング発振器を構成するように接続
されている。また、3個の差動増幅器の電流制御入力端
子は互いに接続されて電圧制御型発振回路の制御入力端
子11となっている。12は電圧制御型発振回路の出力
端子である。なお、出力端子は電圧制御型発振回路を構
成する任意の差動増幅器のいずれの出力端子でもよく、
また図1では差動増幅器出力端子の一方を用いてシング
ルエンド出力としているが、差動増幅器の差動出力端子
両方を用いて差動出力としてもよい。また、複数の差動
増幅器の出力を同時に複数の出力端子として用いてもよ
い。
In the voltage controlled oscillator circuit of FIG. 1, the differential voltage input terminals and the differential output terminals of the differential amplifiers, which are arranged in front of each other, are connected in series and in a ring shape so that their operating polarities are opposite to each other. The dynamic amplifier is connected to form a ring oscillator. Further, the current control input terminals of the three differential amplifiers are connected to each other to form the control input terminal 11 of the voltage controlled oscillator circuit. Reference numeral 12 is an output terminal of the voltage controlled oscillator circuit. It should be noted that the output terminal may be any output terminal of any differential amplifier that constitutes the voltage controlled oscillator circuit,
Further, in FIG. 1, one of the differential amplifier output terminals is used for single-ended output, but both of the differential output terminals of the differential amplifier may be used for differential output. Moreover, the outputs of the plurality of differential amplifiers may be simultaneously used as the plurality of output terminals.

【0012】本発明の電圧制御型発振回路の発振状態に
おける差動増幅器1の動作状態について以下に述べる。
差動入力トランジスタ9および10には差動入力端子2
および3の入力電圧に対応した電流が流れるが、両電流
の和が7の電流制御トランジスタに流れる。ここで7の
電流制御トランジスタが6の制御入力に与えられた直流
電圧によって飽和領域における定電流動作をしているも
のとすると、7の電流制御トランジスタにはほぼ一定の
直流電流が流れる。したがって、7の電流制御トランジ
スタのドレイン端子8の電圧も従来の電圧制御型発振回
路のようにパルス状に急峻に変化することなく、ほぼ一
定の電圧値で安定する。7の電流制御トランジスタの飽
和領域動作のみを使用するように1の差動増幅器の構成
と6の制御入力電圧範囲の最適化を図ることは8の電圧
がほぼ一定であるので容易である。
The operation state of the differential amplifier 1 in the oscillation state of the voltage controlled oscillator circuit of the present invention will be described below.
The differential input terminals 9 are provided for the differential input transistors 9 and 10.
The current corresponding to the input voltage of 3 and 3 flows, but the sum of both currents flows to the current control transistor of 7. Assuming that the current control transistor 7 has a constant current operation in the saturation region by the DC voltage applied to the control input 6, the current control transistor 7 has a constant DC current. Therefore, the voltage of the drain terminal 8 of the current control transistor 7 does not change sharply like a pulse as in the conventional voltage control type oscillation circuit, and is stabilized at a substantially constant voltage value. It is easy to optimize the configuration of the differential amplifier 1 and the control input voltage range 6 so that only the saturation region operation of the current control transistor 7 is used, because the voltage 8 is almost constant.

【0013】8の電圧がほぼ一定であるので端子8にお
ける寄生容量を高速に充放電する必要がないことから、
該寄生容量の影響が小さくなる。これによって、電流制
御トランジスタ7に流れる動作電流に対する発振周波数
が上がり直線性も向上する。さらに、電圧制御型発振回
路全体の動作電流もほぼ一定の直流電流となるため、電
源に重畳する雑音も小さくなり発振周波数の安定度が向
上すると共に他への電源を介した雑音の影響を小さくす
ることができる。
Since the voltage of 8 is almost constant, it is not necessary to charge and discharge the parasitic capacitance at the terminal 8 at high speed.
The influence of the parasitic capacitance is reduced. As a result, the oscillation frequency with respect to the operating current flowing through the current control transistor 7 is increased and the linearity is improved. Furthermore, since the operating current of the entire voltage controlled oscillator circuit is also a nearly constant DC current, the noise superimposed on the power supply is reduced, the stability of the oscillation frequency is improved, and the effect of noise from other power sources is reduced. can do.

【0014】また、電源間に直列に接続されるトランジ
スタの数が従来の電圧制御型発振回路と比較して少なく
なるので、その分電源電圧を下げることも可能である。
電源電圧をさげても前述の通り寄生容量の影響が少ない
ので高周波発振が可能である。
Since the number of transistors connected in series between the power supplies is smaller than that in the conventional voltage controlled oscillator circuit, the power supply voltage can be reduced accordingly.
Even if the power supply voltage is reduced, high-frequency oscillation is possible because the influence of parasitic capacitance is small as described above.

【0015】さらに、従来の電圧制御型発振回路のよう
に制御電圧変換回路を必要とせず制御入力端子が一つで
よいため、該端子を低インピーダンスで駆動することに
よって周波数安定度の高い電圧制御型発振回路を容易に
実現することができると共に、前述の従来の電圧制御型
発振回路のように制御電圧の時間的ずれを発生すること
もない。したがって、11の制御入力端子に入力される
電圧の時間的変化に対する発振周波数の変化速度も速く
なり、ダイナミック特性が向上する。
Further, unlike the conventional voltage control type oscillation circuit, a control voltage conversion circuit is not required and only one control input terminal is required. Therefore, by driving the terminal with low impedance, voltage control with high frequency stability is achieved. Type oscillator circuit can be easily realized, and the time lag of the control voltage does not occur unlike the above-mentioned conventional voltage control type oscillator circuit. Therefore, the rate of change of the oscillation frequency with respect to the time change of the voltage input to the 11 control input terminals is also increased, and the dynamic characteristics are improved.

【0016】なお、以上述べた実施例は本発明の電圧制
御型発振回路の一実施例である。本実施例では1の差動
増幅器をCMOSトランジスタで構成しているが、バイ
ポーラトランジスタで構成してもかまわない。また9お
よび10の差動入力トランジスタの負荷をトランジスタ
で構成しているが、単なる抵抗素子で構成してもかまわ
ない。
The embodiment described above is one embodiment of the voltage controlled oscillator circuit of the present invention. Although the differential amplifier 1 is composed of CMOS transistors in this embodiment, it may be composed of bipolar transistors. Further, although the loads of the differential input transistors 9 and 10 are composed of transistors, they may be composed of simple resistance elements.

【0017】[0017]

【発明の効果】以上述べたように本発明の電圧制御型発
振回路によれば、従来技術と比較して低電源電圧動作が
可能となり、低電源電圧で高周波発振周波数を得ること
ができるため低消費電力化に効果がある。また、電圧制
御型発振回路全体の動作が直流動作に近くなるため、発
振周波数の安定度が向上すると共に他の回路への電源を
介した雑音の影響を大幅に低減することができる。さら
に、周波数制御入力端子が1つであるため、制御電圧変
換回路が不要となり回路が簡単になってダイナミック特
性も向上する。
As described above, according to the voltage controlled oscillator circuit of the present invention, it is possible to operate at a lower power supply voltage and to obtain a high frequency oscillation frequency at a lower power supply voltage, as compared with the prior art. Effective in reducing power consumption. Further, the operation of the entire voltage controlled oscillator circuit is close to the direct current operation, so that the stability of the oscillation frequency is improved and the influence of noise through the power source on other circuits can be significantly reduced. Furthermore, since there is only one frequency control input terminal, the control voltage conversion circuit is not required, and the circuit is simplified and the dynamic characteristics are improved.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の電圧制御型発振回路の一実施例を示す
図。
FIG. 1 is a diagram showing an embodiment of a voltage controlled oscillator circuit of the present invention.

【図2】差動増幅器の構成例を示す図。FIG. 2 is a diagram showing a configuration example of a differential amplifier.

【図3】従来の電圧制御型発振回路例を示す図。FIG. 3 is a diagram showing an example of a conventional voltage controlled oscillator circuit.

【符号の説明】[Explanation of symbols]

1 差動増幅器 2,3 差動入力端子 4,5 差動出力端子 6 電流制御入力端子 7 電流制御トランジスタ 8 7のドレイン端子 9,10 差動入力トランジスタ 11 制御入力端子 12 電圧制御型発振回路の出力端子 20 制御電圧変換回路 21,22 電流制御トランジスタ 23 21のドレイン端子 24 22のドレイン端子 1 differential amplifier 2,3 differential input terminal 4,5 differential output terminal 6 current control input terminal 7 current control transistor 8 7 drain terminal 9,10 differential input transistor 11 control input terminal 12 voltage control type oscillation circuit Output terminal 20 Control voltage conversion circuit 21, 22 Current control transistor 23 21 drain terminal 24 22 drain terminal

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】一対の差動電圧入力端子と一対の差動電圧
出力端子を具備し、該差動電圧入力端子間に入力される
差動電圧を増幅した結果を該差動出力端子間に差動出力
する差動増幅器であって、該差動増幅器は差動増幅の動
作電流が制御入力端子の入力によって制御される差動増
幅器を具備し、該差動増幅器を複数個用いて互いに前後
する差動増幅器の差動電圧入力端子と差動出力端子が互
いの動作極性が反対となるように、直列かつリング状に
接続したことを特徴とする電圧制御型発振回路。
1. A pair of differential voltage input terminals and a pair of differential voltage output terminals are provided, and a result obtained by amplifying a differential voltage input between the differential voltage input terminals is provided between the differential output terminals. A differential amplifier that outputs differentially, the differential amplifier including a differential amplifier in which an operating current of the differential amplification is controlled by an input of a control input terminal. A voltage-controlled oscillation circuit in which the differential voltage input terminal and the differential output terminal of the differential amplifier are connected in series and in a ring shape so that their operation polarities are opposite to each other.
【請求項2】請求項1記載の電圧制御型発振回路であっ
て、該差動増幅器の電流制御入力端子を互いに接続し、
該制御入力端子を入力とし、該差動増幅器の任意の単一
もしくは複数の出力端子を出力としたことを特徴とする
電圧制御型発振回路。
2. The voltage controlled oscillator circuit according to claim 1, wherein the current control input terminals of the differential amplifier are connected to each other,
A voltage-controlled oscillation circuit, wherein the control input terminal is used as an input and any one or a plurality of output terminals of the differential amplifier are used as an output.
JP7076698A 1995-03-31 1995-03-31 Voltage-controlled oscillator circuit Pending JPH08274592A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7076698A JPH08274592A (en) 1995-03-31 1995-03-31 Voltage-controlled oscillator circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7076698A JPH08274592A (en) 1995-03-31 1995-03-31 Voltage-controlled oscillator circuit

Publications (1)

Publication Number Publication Date
JPH08274592A true JPH08274592A (en) 1996-10-18

Family

ID=13612725

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7076698A Pending JPH08274592A (en) 1995-03-31 1995-03-31 Voltage-controlled oscillator circuit

Country Status (1)

Country Link
JP (1) JPH08274592A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6990597B2 (en) 2000-10-19 2006-01-24 Seiko Epson Corporation Clock generation circuit, data transfer control device, and electronic instrument

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6990597B2 (en) 2000-10-19 2006-01-24 Seiko Epson Corporation Clock generation circuit, data transfer control device, and electronic instrument

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