JPH08274325A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE: To make it possible to reduce the number of processes by introducing impurities to the inside of a substrate with a reflection preventing film, a block film and a conductive film as masks and then removing at the same time the block film and the reflection preventing film made from the same material. CONSTITUTION: An SiN reflection preventing film 7 having a large absorption coefficient during transfer of a wiring pattern and an SiN block film 8 having an absorption coefficient smaller than that of the SiN reflection preventing film 7 for preventing the punch-through of the impurities are formed on a polysilicon film 5, and the reflection preventing film 7 and the block film 8 are made of the same material. Then, upon completion of a pattern transfer process for forming a gate electrode 5a and the impurity introducing process to a low concentration diffusion layer 9 and to a high concentration diffusion layer 11, the reflection preventing film 7 and the block 8 comprising the SiN can be removed at the same time by using phosphoric acid buoys or the like. Because of this, the number of processes can be reduced compared to the conventional case where the refraction prevention film and block film made of different materials are removed separately.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly, it can be applied to a manufacturing technique for a fine high-speed MOS device, and particularly, a block film and a fine pattern for preventing penetration of impurities. The present invention relates to a method for manufacturing a semiconductor device capable of reducing the number of steps by simultaneously removing an antireflection film that prevents reflection of light during formation.

In recent years, with the integration of semiconductor devices, MOS transistors with low power consumption have been used from bipolar transistors to high speed devices. In order to further improve the efficiency of this MOS transistor, the gate oxide film has been thinned and the source / drain portions have been salicided. Also,
Thinning of each wiring layer is desired from the viewpoint of easy microfabrication.

[0003]

2. Description of the Related Art Conventionally, in forming a gate wiring of a MOS transistor having a design rule of about 0.25 μm, when poly-Si is used for the gate wiring, an amorphous film is used as an antireflection film for preventing reflection of light when a pattern is transferred. Carbon, a silicon nitride film, or a silicon oxynitride film is used.
For example, when amorphous carbon is used for the antireflection film, the antireflection film is removed by O ₂ plasma or the like after the pattern of the wiring, the lightly doped drain is formed, and the sidewall is formed, and then the heavy dose is applied to the source / drain portions. To form an LDD. And after this, Ti
Alternatively, Co and Ni are deposited on the entire surface and heat-treated to silicide the gate portion and the source / drain portions.

However, in this conventional manufacturing method,
When performing heavy dose, there is a problem that impurities may penetrate through the gate and reach the channel portion under the gate, which may change the transistor characteristics. In order to avoid this, it is conceivable to increase the thickness of the gate wiring or lower the acceleration energy of impurities. However, in addition to making fine processing difficult, leakage occurs during silicidation due to shallow junctions in the source / drain portions. There is a problem in that it is difficult to manufacture a transistor, such as when it is caused.

Therefore, in order to prevent impurities from penetrating the gate when the impurities are doped, conventionally, there is known a technique of providing a block film for preventing the impurities from penetrating the gate. Hereinafter, a specific description will be given with reference to the drawings. 15 and 16 are views showing a conventional method for manufacturing a semiconductor device. First, S is determined by the LOCOS method or the like.
After selectively thermally oxidizing the i substrate 1001 to form a field oxide film 1002, a CVD (Chemical V
a polysilicon film 10 as a gate material, the entire surface of which is doped with impurities by an Aper Deposition method or the like.
03 is formed (FIG. 15A). Polysilicon film 10
The impurities may be introduced into 03 as described above, or may be performed by ion implantation or the like after the film formation.

Next, the silicon oxide film 1 is formed by the CVD method or the like.
004 is formed and the silicon oxide film 100 is formed by RIE or the like.
After selectively etching so as to leave 4 in a predetermined area,
A SiN block film 1005 is formed on the entire surface by the CVD method or the like (FIG. 15B). Next, after the carbon antireflection film 1006 is formed on the entire surface by the CVD method or the like (FIG. 15).
(C)), the antireflection film 1006 to the polysilicon film 1003 are selectively set by RIE or the like to form a gate electrode 1003a (FIG. 15D).

Next, after the carbon antireflection film 1006 is etched and removed by O ₂ RIE or the like (FIG. 16).
(A)) Using the gate electrode 1003a as a mask, impurities are ion-implanted into the Si substrate 1001 at a low dose to form a low-concentration diffusion layer 1007. Next, after depositing a SiO ₂ film or the like by the CVD method or the like, the SiO ₂ film is anisotropically etched to form sidewalls 1008 on the sidewalls of the polysilicon film 1003a (FIG. 16B).

Next, using the gate electrode 1003a and the sidewall 1008 as a mask, the Si substrate 1 is formed at a high dose.
Impurities are ion-implanted into 001 to form the high-concentration diffusion layer 100.
9 is formed (FIG. 16C). At this time, the source / drain diffusion layer 1010 including the low concentration diffusion layer 1007 and the high concentration diffusion layer 1009 is formed. Then, the block film 1005 is removed by etching with boiled phosphate or the like, whereby a semiconductor device having a structure as shown in FIG. 16D can be obtained.

[0009]

However, in the above-described conventional method of manufacturing a semiconductor device, the gate electrode 100 is used.
The SiN block film 1005 and the carbon antireflection film 1 made of different materials are formed on the polysilicon film 1003 to be 3a.
Since the layer 006 is formed, the carbon antireflection film 1006 is removed after performing the patterning for forming the gate electrode 1003a, and the source / drain diffusion layer 101 is formed.
The SiN block film 1005 must be removed after doping an impurity for forming 0. For this reason,
Carbon antireflection film 1006 and SiN block film 100
Since the removal step 5 must be performed separately, there is a problem that the number of steps is large and it is troublesome.

The carbon antireflection film 1006 is easily oxidized at the temperature at which the insulating film for forming the sidewall 1008 is grown. Therefore, it is an object of the present invention to provide a method for manufacturing a semiconductor device, which can remove the block film and the antireflection film at the same time and can reduce the number of steps.

[0011]

According to the first aspect of the present invention,
A step of forming a conductive film on the substrate, and then an antireflection film made of silicon nitride having a large absorption coefficient for preventing reflection of light when transferring a wiring pattern on the conductive film A step of forming a block film made of silicon nitride having an absorption coefficient smaller than that of the antireflection film for preventing penetration of impurities in either an upper layer or a lower layer, and then, the antireflection film, the block film and the conductive film. After the pattern transfer of the film, a step of selectively etching, a step of introducing impurities into the substrate by using the antireflection film, the block film and the conductive film as a mask, and then the antireflection film And a step of removing the block film,
Then, a step of salicide or selectively depositing a conductor on the portion of the conductive film from which the antireflection film has been removed is included.

According to a second aspect of the present invention, in the above-mentioned first aspect of the invention, after introducing the impurities, an insulating film is formed on the entire surface, and the insulating film is anisotropically etched to form the antireflection film, A sidewall is formed on the side wall of the block film and the conductive film, and the dose amount is higher than that when the impurity is introduced by masking the antireflection film, the block film, the conductive film and the sidewall. The impurity is introduced into the substrate in a dose amount.

The invention according to claim 3 is the above-mentioned claim 1 or 2.
In the invention described above, the removal of the antireflection film and the block film is performed by wet etching with boil phosphate. According to a fourth aspect of the present invention, the step of forming a conductive film on a substrate, and the subsequent step of preventing reflection of light when transferring a wiring pattern onto the conductive film, A step of forming an antireflection / block film made of silicon nitride for preventing punch-through, a step of pattern-transferring the antireflection / block film and the conductive film, and then a step of forming the antireflection / block film and the conductive film. Of introducing an impurity into the substrate using the conductive film as a mask, and then performing the antireflection /
And a step of removing the block film. The invention according to claim 5 is the above claim 4, 5
In the invention described above, after introducing the impurities, an insulating film is formed on the entire surface, and the insulating film is anisotropically etched to form sidewalls on the antireflection / blocking film and the conductive film side wall. The antireflection / blocking film, the conductive film and the sidewalls are masked to introduce the impurities into the substrate at a dose higher than the dose when the impurities are introduced. .

The invention according to claim 6 is the above claim 4, 5
In the invention described above, the antireflection / blocking film is removed by wet etching with boiled phosphate.

[0015]

In the present invention, as shown in FIGS. 1 to 6 of Example 1 which will be described later, a SiN antireflection film 7 having a large absorption coefficient for preventing reflection of light when a wiring pattern is transferred onto the polysilicon film 5. And a transparent SiN block film 8 having an absorption coefficient smaller than that of the SiN antireflection film 7 for preventing penetration of impurities when introducing impurities, and the antireflection film 7 and the block film 8 are made of the same material. , A pattern transfer step for forming the gate electrode 5a and impurities of the low-concentration diffusion layer 9 and the high-concentration diffusion layer 11 with both the SiN antireflection film 7 and the SiN block film 8 formed on the polysilicon film 5. After completing both of the introduction steps, the antireflection film 7 made of SiN and the block film 8 can be simultaneously removed by boiling phosphate or the like. Therefore, the number of steps can be reduced as compared with the conventional case where the antireflection film and the block film made of different materials are separately removed.

In the present invention, as shown in FIGS.
As shown in FIG. 5, SiN antireflection / preventing reflection of light when transferring a wiring pattern onto the polysilicon film 33 and preventing penetration of impurities when introducing impurities.
A block film 35 is formed and S is formed on the polysilicon film 33.
After completing both the pattern transfer process for forming the gate electrode 33a and the impurity introduction process for the low-concentration diffusion layer 36 and the high-concentration diffusion layer 38 with the iN antireflection / blocking film 35 formed, boil phosphate, etc. Thus, the antireflection / block film 35 made of SiN can be removed.

Therefore, the number of steps can be reduced as compared with the conventional case where the antireflection film 7 and the block film 8 made of different materials are separately removed.

[0018]

Embodiments of the present invention will be described below with reference to the drawings. (Embodiment 1) FIGS. 1 to 6 are views showing a method for manufacturing a semiconductor device according to Embodiment 1 of the present invention. First, a silicon nitride film such as Si ₃ N ₄ is formed on the Si substrate 1 by the CVD method or the like, and the silicon nitride film is selectively etched by the RIE or the like to form a mask 2 for forming a field oxide film (FIG. 1 (a), (b)).

Next, using the mask 2, the Si substrate 1 is selectively oxidized by the LOCOS method or the like to form a field oxide film 3 which will be an element isolation insulating region, and then the mask 2 is removed (FIG. 1C). At this time, Si with the mask 2 removed
An element region is formed on the substrate 1 portion. Next, the Si substrate 1
The element region of CV is thermally oxidized to form the gate oxide film 4, and the CV
A polysilicon film 5 to be a gate electrode on the entire surface by the D method or the like
Then, a silicon oxide film 6 is formed on the polysilicon film 5 by the HTO method or the like (FIG. 1D).

Next, it is selectively etched by RIE or the like so as to remain in a predetermined region on the polysilicon film 5 (see FIG. 2).
(A)) After the antireflection film 7 made of SiN having a large absorption coefficient for preventing the reflection of light when transferring the wiring pattern to the entire surface is formed by the CVD method or the like, the antireflection film 7 is formed on the antireflection film 7 by the CVD method or the like. SiN having a smaller absorption coefficient than the antireflection film 7 for preventing the penetration of impurities when introducing the impurities
A block film 8 made of is formed (FIG. 2B). Here, in consideration of giving an antireflection effect, the thickness of the antireflection film 7 is preferably 25 nm or more and 35 nm or less, and the thickness of the block film 8 is required to have a blocking effect. Considering this, the thickness is preferably 45 nm or more. The blocking effect of the block film 8 is adjusted by adjusting the film thickness of the block film 8.

Next, SiN is formed on the poly-Si gate electrode 5a.
After pattern transfer is performed with the block film 8 and the SiN antireflection film 7 formed, the block film 8 to the gate oxide film 4 are selectively etched by RIE or the like in the element region of the Si substrate 1. At the portion on the field oxide film 3, the block film 8 to the polysilicon film 5 are selectively etched to form a gate electrode 5a (FIG. 2C).

At this time, a pattern composed of the block film 8, the antireflection film 7, the gate electrode 5a and the gate oxide film 4 is formed in the element region of the Si substrate 1, and the block is formed in the portion on the field oxide film 3. A pattern including the film 8, the antireflection film 7, the silicon oxide film 6 and the gate electrode 5a, and the block film 8, the antireflection film 7 and the gate electrode 5
and a pattern of a are formed.

Next, SiN is formed on the poly-Si gate electrode 5a.
With the block film 8 and the SiN antireflection film 7 formed, impurities are ion-implanted into the element region of the Si substrate 1 at a low dose to form a low concentration diffusion layer 9 in the Si substrate 1 (FIG. 2).
(D)). Next, after the silicon oxide film 10 is formed on the entire surface by the CVD method or the like (FIG. 3A), the silicon oxide film 10 is anisotropically etched by the RIE or the like to form the gate electrode 5.
A side wall 10a is formed on the side wall a (see FIG. 3).
(B)).

Next, using the gate electrode 5a and the side wall 10a having the block film 8 and the antireflection film 7 formed thereon as a mask, impurities are introduced into the element region of the Si substrate 1 at a high dose and the inside of the Si substrate 1 is etched. A high-concentration diffusion layer 11 is formed on the substrate (FIG. 3C). At this time, the source / drain diffusion layer 12 including the low concentration diffusion layer 9 and the high concentration diffusion layer 11 is formed.

Next, the SiN block film 8 and the SiN antireflection film 7 are etched and removed by boiling phosphoric acid at about 140 ° C. to expose the gate electrode 5a and the silicon oxide film 6 (FIG. 3D). In this way, when the wet treatment is performed with the phosphoric acid boil at a low temperature, the SiN block film 8 and the SiN film 8 and Si can be selected with good selectivity without etching the Si substrate 1.
The N antireflection film 7 can be etched. Then, a refractory metal film 13 of Co or the like serving as a silicide material is formed on the entire surface by sputtering or the like (FIG. 4A).
At this time, a TiN film may be formed on the refractory metal film 13 in order to reduce the contact resistance.

Next, an annealing treatment is performed to form the gate electrode 5a, Si of the Si substrate 1 and C of the refractory metal film 13.
After reacting o to form a metal silicide film 14 of Co.Si on the Si substrate 1 on which the gate electrode 5a and the source / drain diffusion layer 12 are formed, the field oxide film 3, the side wall 10a and the silicide oxide are formed. Membrane 6
The refractory metal film 13 in the upper unreacted portion is removed (FIG. 4).
(B)).

Next, after the interlayer insulating film 15 such as PSG is formed on the entire surface by the CVD method or the like (FIG. 4C), the interlayer insulating film 15 is selectively etched by the RIE or the like to diffuse the source / drain. A contact hole 16 in which the layer 12 and the gate electrode 5a are exposed is formed (FIG. 4D). Next, the contact hole 1 is formed by the sputtering method and the CVD method.
Source / drain diffusion layer 12 in 6 and gate electrode 5a
(Sputtering method) / TiN to contact with
After forming the metal film 17 such as (sputtering method) / W (CVD method) (FIG. 5A), W of the metal film 17 is formed by RIE or the like.
Is etched back to flatten the surface (FIG. 5B).
At this time, the metal film 17 is embedded only in the contact hole 16.

Next, a wiring layer 18 of Al or the like is formed so as to make contact with the metal film 17 in the contact hole 16 by sputtering or RIE (FIG. 5C), and SiO ₂ is formed on the entire surface by CVD or the like. After forming the insulating film 19 such as
By selectively etching the insulating film 19 by RIE or the like to form the contact hole 20 in which the wiring layer 18 is exposed, a semiconductor device having a structure as shown in FIG. 6 can be obtained.

As described above, in this embodiment, the SiN antireflection film 7 having a large absorption coefficient for preventing the reflection of light when the wiring pattern is transferred onto the polysilicon film 5 and the penetration of impurities when the impurities are introduced. Since the transparent SiN block film 8 having an absorption coefficient smaller than that of the SiN antireflection film 7 for preventing the above is formed and the antireflection film 7 and the block film 8 are made of the same material, the SiN antireflection film 7 is formed on the polysilicon film 5. With both the film 7 and the SiN block film 8 formed,
A pattern transfer step for forming the gate electrode 5a,
After completing both the impurity introduction steps of the low-concentration diffusion layer 9 and the high-concentration diffusion layer 11, the antireflection film 7 made of SiN and the block film 8 can be removed at the same time by boiling phosphate or the like.

Therefore, the number of steps can be reduced as compared with the conventional case where the antireflection film and the block film made of different materials are separately removed. In this embodiment, since the pattern is transferred in the state where the SiN block film 8 is formed on the polysilicon film 5, it is difficult to generate a standing wave due to the reflection of light, and a good fine pattern can be formed. it can.

In this embodiment, SiN is formed on the polysilicon film 5.
Since the impurity doping for forming the low-concentration diffusion layer 9 and the high-concentration diffusion layer 11 is performed with the antireflection film 7 formed, the gate electrode 5a to the underlying Si substrate 1 are formed.
So that impurities are not penetrated inside, that is, the gate electrode 5a
The source / drain portions can be doped with impurities without changing the impurity concentration in the underlying Si substrate 1.

In this embodiment, by appropriately selecting the film thickness of the SiN block film 8, the junction leak occurs even if the acceleration voltage at the time of doping the source / drain portion with impurities is changed to the source / drain portion by silicidation. It is possible to efficiently select a non-accelerating voltage. In addition, although the case where the antireflection film 7 is formed on the polysilicon film 5 and the block film 8 is formed on the antireflection film 7 has been described in the first embodiment, the present invention is not limited thereto. However, after forming the block film 8 on the polysilicon film 5,
The antireflection film 7 may be formed on the block film 8, and in this case, the same effect as that of the first embodiment can be obtained. (Second Embodiment) Next, FIGS. 7 and 8 are views showing a method for manufacturing a semiconductor device according to a second embodiment of the present invention.

First, the Si substrate 31 is formed by the LOCOS method or the like.
Is selectively thermally oxidized to form a field oxide film 32, and then a polysilicon film 33 serving as a gate material is formed on the entire surface by CVD or the like (FIG. 7).
(A)). The impurities may be introduced into the polysilicon film 33 at the time of film formation as described above, but may be introduced by ion implantation or the like after the film formation.

Next, the silicon oxide film 3 is formed by the CVD method or the like.
4 is formed and is selectively etched by RIE or the like so as to leave the silicon oxide film 34 in a predetermined region, and then an antireflection and an impurity are introduced to prevent reflection of light when a pattern is transferred to the entire surface by a CVD method or the like. Si that also functions as a punch-through prevention (block) to prevent impurities from punching through the gate
An N reflection preventing / blocking film 35 is formed (FIG. 7).
(B)). Here, a parallel plate type plasma CVD apparatus is used, RF is set to 13.56 MHz, a circle of 150 W × a diameter of 150 mm is set, a substrate temperature is set to 350 ° C., and SiH is set.
_{The 4} / NH ₃ ratio is 0.4 to 1.0.

The plasma may use any frequency other than 13.56 MHz. Also, thermal CVD, PHO
It may be performed by TO-CVD, and in this case also, the composition ratio can be controlled by changing the gas ratio. Next, with the antireflection / block film 35 attached to the surface by RIE or the like, the antireflection / block film 35 to the polysilicon film 33 are selectively etched by RIE or the like to form the gate electrode 33a (FIG. 7). (C)). At this time, in the element region of the Si substrate 31, the antireflection /
A pattern composed of the block film 35 and the gate electrode 33a is formed, and in the portion on the field oxide film 32, the pattern composed of the antireflection / block film 35 and the gate electrode 33a, the antireflection / block film 35, the silicon oxide film 34, and A pattern including the gate electrode 33a is formed.

Next, with the gate electrode 33a having the antireflection / blocking film 35 formed thereon as a mask, impurities are ion-implanted into the Si substrate 31 at a low dose to form a low concentration diffusion layer 36. Next, after depositing a SiO ₂ film or the like by the CVD method or the like, the SiO ₂ film is anisotropically etched by RIE or the like to form the sidewall 3 on the side wall of the gate electrode 33a.
7 is formed (FIG. 8A).

Next, with the gate electrode 33a and the sidewall 37 having the antireflection / blocking film 35 formed thereon as a mask, impurities are ion-implanted into the Si substrate 31 at a high dose to form a high concentration diffusion layer 38. Yes (Fig. 8
(B)). At this time, the low concentration diffusion layer 36 and the high concentration diffusion layer 3
A source / drain diffusion layer 39 of 8 is formed.
And anti-reflection / boiled phosphate of 140 ° C
By removing the block film 35 by wet etching, a semiconductor device having a structure as shown in FIG. 8C can be obtained. As described above, when the wet treatment is performed with the boiled phosphate at a low temperature, the SiN antireflection / block film 35 can be etched with good selectivity without etching the Si substrate 31.

As described above, in the present embodiment, the SiN antireflection / block which prevents the reflection of light when the wiring pattern is transferred onto the polysilicon film 33 and prevents the penetration of impurities when introducing the impurities. Since the film 35 is formed, the gate electrode 33a is formed with the SiN antireflection / block film 35 formed on the polysilicon film 33.
Pattern transfer step for forming a low concentration diffusion layer 36
After both the impurity introduction step of the high-concentration diffusion layer 38 and the impurity introduction step of the high-concentration diffusion layer 38 are completed, the antireflection / blocking film 35 made of SiN can be removed by boiling phosphate.

Therefore, compared with the conventional case where the antireflection film and the block film made of different materials are separately removed,
The number of steps can be reduced. In this embodiment, the pattern is transferred with the SiN antireflection / block film 35 formed on the polysilicon film 33. Therefore, it is difficult to generate a standing wave due to the reflection of light, and a good fine pattern is formed. can do.

In this embodiment, Si is formed on the polysilicon film 33.
Since the impurity doping for forming the low-concentration diffusion layer 36 and the high-concentration diffusion layer 38 is performed with the N antireflection / blocking film 35 formed, the impurities are introduced from the gate electrode 33a into the underlying Si substrate 1. So as not to penetrate
That is, the source / drain portions can be doped with impurities without changing the impurity concentration in the Si substrate 31 under the gate electrode 33a.

In this embodiment, by appropriately selecting the film thickness of the SiN antireflection / blocking film 35, the acceleration voltage at the time of doping impurities in the source / drain portion can be improved even if the source / drain portion is silicided. It is possible to efficiently select an acceleration voltage that does not cause leakage. Next, in Examples 1 and 2 above, the preferable ranges of the absorption coefficients of the antireflection film 7 and the antireflection / block film 35 as the antireflection film are as follows. Here, all excimers will be described as examples. The refractive index N depends on the base. Therefore, assuming that the base is poly-Si (or amorphous Si), the refractive index N
Is 1.8 to 2.5 (λ = 0.25 nm), the absorption coefficient K is about 0.3 to 1.2 (λ = about 0.25 nm) according to I ≦ 0.3 in FIGS. 9 to 12. Becomes

Next, in order to realize the absorption coefficient K of about 0.3 to 1.2, the SiH ₄ / NH ₃ ratio is set as shown in FIG.
3 to 0.4 to 0.7, and the Si / N ratio at this time is about 0.9 to 1.3 from FIG. 14 (data is XP
S).

[0043]

According to the present invention, the block film and the antireflection film can be removed at the same time, and the number of steps can be reduced.

[Brief description of drawings]

FIG. 1 is a diagram showing a method for manufacturing a semiconductor device according to a first embodiment of the present invention.

FIG. 2 is a view showing the method for manufacturing the semiconductor device according to the first embodiment of the present invention.

FIG. 3 is a diagram showing a method for manufacturing the semiconductor device according to the first embodiment of the present invention.

FIG. 4 is a diagram showing the method for manufacturing the semiconductor device according to the first embodiment of the present invention.

FIG. 5 is a view showing the method for manufacturing the semiconductor device according to the first embodiment of the present invention.

FIG. 6 is a diagram showing a method for manufacturing the semiconductor device according to the first embodiment of the present invention.

FIG. 7 is a diagram showing a method for manufacturing a semiconductor device according to a second embodiment of the present invention.

FIG. 8 is a diagram showing a method for manufacturing a semiconductor device according to a second embodiment of the present invention.

FIG. 9 is a diagram showing contour lines of absorption coefficient when the refractive index is 1.6.

FIG. 10 is a diagram showing contour lines of absorption coefficient when the refractive index is 1.8.

FIG. 11 is a diagram showing contour lines of absorption coefficient when the refractive index is 2.0.

FIG. 12 is a diagram showing contour lines of absorption coefficient when the refractive index is 2.2.

FIG. 13 is a diagram showing an absorption coefficient at a SiH ₄ / NH ₃ composition ratio.

FIG. 14 is a diagram showing the Si / N composition ratio in the SiH ₄ / NH ₃ composition ratio.

FIG. 15 is a diagram showing a conventional method for manufacturing a semiconductor device.

FIG. 16 is a diagram showing a conventional method for manufacturing a semiconductor device.

[Explanation of symbols]

 1,31 Si substrate 2 Mask 3,32 Field oxide film 4 Gate oxide film 5,33 Polysilicon film 5a, 33a Gate electrode 6,10,34 Silicon oxide film 7 Antireflection film 8 Block film 9,36 Low concentration diffusion layer 10a, 37 Sidewall 11, 38 High-concentration diffusion layer 12, 39 Source / drain diffusion layer 13 Refractory metal film 14 Metal silicide film 15 Interlayer insulation film 16, 20 Contact hole 17 Metal film 18 Wiring layer 19 Insulation film 35 Antireflection / Block membrane

Continuation of the front page (51) Int.Cl. ⁶ Identification number Office reference number FI Technical indication location H01L 21/3065 H01L 21/302 J 21/318 29/78 301L

Claims (6)

[Claims] 1. A step of forming a conductive film (5) on a substrate (1), and a large absorption coefficient for preventing light reflection when a wiring pattern is subsequently transferred onto the conductive film (5). An antireflection film (7) made of silicon nitride and a block film (8) made of silicon nitride having an absorption coefficient smaller than that of the antireflection film (7) for preventing the penetration of impurities when introducing the impurities are provided as upper and lower layers. And then selectively etching the antireflection film (7), the block film (8) and the conductive film (5) after pattern transfer. A step of introducing impurities into the substrate (1) using the antireflection film (7), the block film (8) and the conductive film (5) as a mask, and then the antireflection film (7) and the block A step of removing the film (8), Conductive films obtained by removing the coating (7) (5)
A step of depositing salicide or a conductor selectively on the part (1). 2. After introducing the impurities, an insulating film (10) is formed on the entire surface, and the insulating film (10) is anisotropically etched to form the antireflection film (7) and the block film (8). And a sidewall (10a) is formed on the side wall of the conductive film (5), and the antireflection film (7), the block film (8), the conductive film (5) and the sidewall (10a) are masked. The method of manufacturing a semiconductor device according to claim 1, wherein the impurity is introduced into the substrate (1) at a dose higher than a dose when the impurity is introduced. 3. The method of manufacturing a semiconductor device according to claim 1, wherein the antireflection film (7) and the block film (8) are removed by wet etching with a boiling phosphate. 4. A step of forming a conductive film (33) on a substrate (31) and, subsequently, preventing reflection of light when transferring a wiring pattern on the conductive film (33), and removing impurities. A step of forming an antireflection / block film (35) made of silicon nitride for preventing penetration of impurities when introducing, and then pattern transfer of the antireflection / block film (35) and the conductive film (33) And then
The antireflection / blocking film (35) and the conductive film (3)
A method of manufacturing a semiconductor device, comprising: a step of introducing impurities into the substrate (31) using 3) as a mask; and a step of subsequently removing the antireflection / block film (35). 5. After introducing the impurities, an insulating film is formed on the entire surface, and the insulating film is anisotropically etched to prevent the reflection /
A side wall (37) is formed on the side wall of the block film (35) and the conductive film (33), and the anti-reflection / block film (35), the conductive film (33) and the side wall (37) are masked. The method of manufacturing a semiconductor device according to claim 4, wherein the impurity is introduced into the substrate (31) at a dose higher than that when the impurity is introduced. 6. The method of manufacturing a semiconductor device according to claim 4, wherein the antireflection / blocking film (35) is removed by wet etching with boiled phosphate.