JPH08264721A - Dielectric capacitor - Google Patents

Abstract

PURPOSE: To utilize the frequency characteristics specific to a dielectric material effectively. CONSTITUTION: The dielectric capacitor comprises a substrate 31, a lower electrode 32, a first layer 33a forming a part of ferroelectric layer, a first intermediate electrode 34a, a second layer 33b forming a part of the ferroelectric layer, a second intermediate electrode 34b, a third layer 33c forming a part of the ferroelectric layer, a third intermediate electrode 34c, a fourth layer 33d forming a part of the ferroelectric layer, and an upper electrode 35, wherein a first contact hole 36a is made through the first layer, the first intermediate electrode and the second layer and a first conductor 38a is provided in the contact hole through an insulation layer. A second contact hole 36b is made through the second layer, the second intermediate electrode and the third layer and a second conductor 38b is provided in the contact hole through an insulation layer. Similarly, a third contact hole 36c is made through the third layer, the third intermediate electrode and the fourth layer and a third conductor 38c is provided in the contact hole through an insulation layer.

Description

Detailed Description of the Invention

[0001]

FIELD OF THE INVENTION The present invention relates to a dielectric capacitor.

[0002]

2. Description of the Related Art Conventionally, much research has been conducted on forming a ferroelectric capacitor as a capacitor for a semiconductor memory. Further, for the purpose of reducing the size of the DRAM, the dielectric constant of the capacitor material has been actively increased. Therefore, at present, a technique for monolithically manufacturing a MOS transistor, a semiconductor element, and a ferroelectric capacitor on a semiconductor substrate is being established.

On the other hand, semiconductor devices such as ICs and LSIs have come into widespread use as electronic devices have become smaller and more multifunctional, and power lines and signal lines have been conducted from outside the device or propagated in the air. Problems such as malfunction of the equipment and destruction of semiconductor elements occurred due to intruding noise, surge and static electricity charged on the human body. As one of the countermeasures, a bypass capacitor is used in the power supply line of each IC and LSI. Studies have been conducted to use a ferroelectric material as a bypass capacitor.

As a capacitor material for a bypass capacitor, a high dielectric constant paraferroelectric thin film typified by SrTiO ₃ (STO) or a ferroelectric thin film typified by Pb _x Z _1-x TiO ₃ (PZT) is concentrated. It has been studied and it has been found that the frequency dependence is small (up to several GHz) at the high frequency.

[0005]

However, it is not possible to form a capacitor having a small frequency dependency even in a high frequency region by using these dielectric materials. That is, the capacitor has a structure in which the above-mentioned dielectric material is sandwiched between conductors, and the frequency characteristics are influenced by both the ferroelectric material and the conductor.

As an electrode material used when the above-mentioned high dielectric constant paraelectric thin film or ferroelectric thin film is formed as a capacitor on a Si substrate, a refractory metal such as platinum is more resistant than Al, which is a main material. Since the ratio is high, the resistance of the electrode portion when forming the capacitor becomes high. Therefore, the frequency characteristic of the capacitor becomes lower than the frequency characteristic of the ferroelectric material itself.

Further, the capacitor has a three-layer structure of a conductor, a ferroelectric substance, and a conductor, and the area of the conductor must be increased in order to increase the capacitance. This shows that the resistance of the electrode part of the capacitor increases as the capacitance increases. Therefore, it can be said that a capacitive capacitor such as a bypass capacitor has a relatively deteriorated frequency characteristic as compared with a small capacitor.

The present invention has been made in consideration of such circumstances, and by reducing the resistance component of the electrode material,
It is an object of the present invention to provide a dielectric capacitor that effectively utilizes the frequency characteristic of the dielectric material.

[0009]

According to the invention of the present application, in a dielectric capacitor having a plurality of electrode layers and a plurality of ferroelectric layers, the plurality of electrode layers and the plurality of ferroelectric layers alternate with each other. The even-numbered electrode layers and the odd-numbered electrode layers of the plurality of electrode layers are electrically connected to each other, and the even-numbered electrode layers and the odd-numbered electrode layers are electrically insulated from each other. Is.

Further, the present invention is a dielectric capacitor in which at least one of the plurality of ferroelectric layers has a film thickness different from that of the other ferroelectric layers. Furthermore, it is a dielectric capacitor in which the dielectric constant of at least one of the plurality of ferroelectric layers is different from the dielectric constant of the other ferroelectric layers.

[0011]

1 is a conceptual diagram of the present invention, C ₁ , C ₂ , C
_This is a structure in which a plurality of capacitors C ₃ and C ₄ are connected in parallel. In FIG. 1, reference numeral 1 is a substrate, reference numeral 2 is a lower electrode,
3a to 3d are the first layer, the second layer, the third layer, and the fourth layer, respectively, reference numeral 5 is an upper electrode, reference numerals 6a to 6c are contact holes, reference numerals 7a to 7c are insulating layers, and reference numerals 8a to 8b are respectively. Indicates a conductor. Here, it is obvious that the capacitance C is generally defined by the following equation.

C = ε ₀ · ε (S / d) where ε _{0 is the} relative permittivity, ε is the permittivity of vacuum, S is the area of the electrode, and d is the thickness of the dielectric. Here, in the thin film capacitor of the present invention for obtaining the same capacitance C as the thin film capacitor of the conventional structure, it is sufficient that C = C ₁ + C ₂ + C ₃ + C ₄ . Here, since ε ₀ , ε, and d in the above equation are common, C
The electrode area of each of _{1 to} C ₄ may be 1/4 of the electrode area of the ferroelectric thin film capacitor having the conventional structure, for example. At the same time, the resistance value of each electrode decreases.

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. (Example 1) Referring to FIG. Reference numeral 31 in the figure is a p-type S
It is an i substrate and its surface is 200 nm thick due to thermal oxidation.
SiO ₂ film (not shown) is formed. The substrate
A lower electrode 32 having a thickness of 200 nm is formed on 31. The lower electrode 31 is formed, for example, by forming a platinum film by a sputtering method. After that, the substrate is prebaked at 700 ° C. for 30 minutes in an oxygen atmosphere.

Next, a 200 nm-thick first layer 33a forming a part of the ferroelectric film is formed on the lower electrode 32 by a sol-gel method. Here, as the ferroelectric material, lead acetate, titanium isopropoxide, and zirconium isopropoxide were dissolved in 2-methoxyethanol corresponding to the target PZT composition to prepare a sol-gel precursor solution. The target film composition is Pb _1.0 (Zr _0.4 Ti _0.6 ) O ₃
And

A first intermediate electrode 34a is formed on the first layer 33a,
Second layer 33b forming a part of the ferroelectric film, second intermediate electrode
34b, a third layer 33c forming a part of the ferroelectric film, a third intermediate electrode 34c, a fourth layer 33d forming a part of the ferroelectric film, and an upper electrode 35 are sequentially formed.

A first contact hole 36a for connecting the lower electrode 32 and the second intermediate electrode 34b is provided in the first layer 33a, the first intermediate electrode 34a and the second layer 33b. A first conductor 38a is provided in the first contact hole 36a to connect the lower electrode 32 and the second intermediate electrode 34b through the insulating layer 37a.

The first intermediate electrode 34a and the third intermediate electrode 34c are formed on the second layer 33b, the second intermediate electrode 34b and the third layer 33c.
A second contact hole 36b for connecting the above is provided. The insulating layer 37 is formed in the second contact hole 36b.
A second conductor 38b connecting the first intermediate electrode 34a and the third intermediate electrode 34c via b is provided.

A third contact hole 36c for connecting the second intermediate electrode 34b and the upper electrode 35 is provided in the third layer 33c, the third intermediate electrode 34c and the fourth layer 33d. A third conductor 38c for connecting the second intermediate electrode 34b and the upper electrode 35 via the insulating layer 37c is provided in the third contact hole 36c.

A fourth contact hole 36d is formed in the fourth layer 33d and the upper electrode 35. An interlayer insulating film 39 is formed on the entire surface including the upper electrode 35. A fifth contact hole 36e is formed in the interlayer insulating film 39 on a part of the upper electrode 35, and a wiring electrode 40a is formed in the fifth contact hole 36e. Also, the third intermediate electrode
A sixth contact hole is formed in the interlayer insulating film 39 on a part of 34c.
36f is formed, and the wiring electrode 40b is formed in the sixth contact hole 36f.

The ferroelectric capacitor having such a structure is manufactured as follows. First, a 200 nm-thick SiO ₂ film (not shown) is formed on the surface of a p-type Si substrate by thermal oxidation. Then, a lower electrode 32 having a thickness of 200 nm is formed on the substrate 31 by depositing platinum by, for example, a sputtering method. After this, the substrate is 700 in an oxygen atmosphere.
Pre-bake at 30 ° C. for 30 minutes. Next, the first layer 33a forming a part of the ferroelectric film is formed on the lower electrode 32 by the sol-gel method.

A predetermined amount of water and acetic acid were added to the precursor solution to hydrolyze the solution. The solution after hydrolysis is 1) 15
Spin coating at 00 rpm for 30 seconds, 2) drying on a hot plate, 180 ° C. for 5 minutes, 3) RTP baking, oxygen atmosphere, temperature rising rate of 125 ° C./second, 650 ° C. for 30 seconds. In addition, in order to obtain a film thickness of 300 nm, 1)
The process of ~ 3) was repeated 3 times. Then, annealing in an electric furnace (oxygen atmosphere 1 liter / minute, 700 ° C., 30 minutes) is performed to form a first layer 33a which constitutes a part of the ferroelectric film.

Next, a platinum film is formed on the first layer 33a by a sputtering method to form a first intermediate electrode 34a. Furthermore,
Prebaking treatment is performed at 700 ° C. for 30 minutes in an oxygen atmosphere. Then, the second layer 33b, the first intermediate electrode 34a, the first layer
33a is etched to form a first contact hole 36a up to the surface of the lower electrode 32.

Next, the insulating layer 37a is formed. This is S
OG is applied 1) by spin coating and dried under the following conditions. 2) On a hot plate, 5 minutes at 100 ℃, 5 minutes at 200 ℃
Minutes, 280 ° C. for 5 minutes, and then steps 1) and 2) are repeated until the desired thickness is achieved. After that, annealing in an electric furnace (oxygen atmosphere 1 liter / min, 400 ° C., 3
0 minutes), the temperature inside the furnace is raised by 10 ° C./minute, and further annealing in an electric furnace (oxygen atmosphere 1 liter / minute, 400 ° C.,
For 30 minutes), and after raising the temperature in the furnace by 10 ° C./minute, annealing in an electric furnace (oxygen atmosphere 1 liter / minute, 400
C, 30 minutes).

Next, after forming the insulating layer 37a, RI
A contact hole is formed with E, and the first conductor 38a is further formed.
Further, the second intermediate electrode 34b was formed by forming a platinum film by sputtering.

After that, the same process is repeated to repeat the third layer 33c, the second contact hole 36b, the insulating layer 37b,
The second conductor 38b, the third intermediate electrode 34c, the fourth layer 33d, and the upper electrode 35 are formed.

Next, after forming the upper electrode 35, the upper electrode
Fourth contact hole for wiring electrode on 35 and fourth layer 33d
36d is formed using ion milling. Further, an inter-layer insulating film 37 is formed on the entire surface, the SOG film and N by LPCVD.
It is formed of a stacked film of SG films. Subsequently, the fifth contact hole 36e and the sixth contact hole 36f are formed by RIE, platinum is further deposited by sputtering, and then patterning is performed by using ion milling, whereby the wiring electrode 40a,
40b was formed.

As described above, in the ferroelectric capacitor according to the first embodiment, as shown in FIG. 3, the lower electrode 32 is provided on the p-type Si substrate 31, and the ferroelectric film is formed on the lower electrode 32. Layer 33a, a first intermediate electrode 34a, which constitutes a part of the second layer 33b, a second intermediate electrode 34, which constitutes a part of the ferroelectric film
b, a third layer 33c forming part of the ferroelectric film, a third intermediate electrode 34c, a fourth layer 33d forming part of the ferroelectric film, and an upper electrode 35 are sequentially provided, and the first layer 33a, the first intermediate electrode 34a and the second layer 33b are provided with a first contact hole 36a for connecting the lower electrode 32 and the second intermediate electrode 34b, and an insulating layer 37a is formed in the first contact hole 36a.
A first conductor 38a is provided to connect the lower electrode 32 and the second intermediate electrode 34b via the first conductor 38a, and the second layer 33b, the second intermediate electrode 34b, and the third layer 33c are connected to the first intermediate electrode 34a and the first intermediate electrode 34a. Three
Second contact hole 36 for connecting the intermediate electrode 34c
b is provided, and the first intermediate electrode 34a and the third intermediate electrode 34 are provided in the second contact hole 36b via the insulating layer 37b.
A second conductor 38b for connecting c is provided, and the third layer 33
c, the third intermediate electrode 34c and the fourth layer 33d are provided with a third contact hole 36c for connecting the second intermediate electrode 34b and the upper electrode 35, and an insulating layer 37c is provided in the third contact hole 36c. The second intermediate electrode 34b and the upper electrode
A third conductor 38c for connecting 35 is provided, and the fourth layer 33
d and the upper electrode 35 are provided with a fourth contact hole 36d, the entire surface including the upper electrode 35 is provided with an interlayer insulating film 39, and the interlayer insulating film 39 on a part of the upper electrode 35 is provided with a fifth contact. A hole 36e is provided, a wiring electrode 40a is provided in the fifth contact hole 36e, and the third intermediate electrode
A sixth contact hole is formed in the interlayer insulating film 39 on a part of 34c.
36f is provided, and the wiring electrode 40b is provided in the sixth contact hole 36f. Therefore, according to the above-mentioned embodiment, the area viewed from above the substrate is reduced, which is effective for miniaturization. Further, since the resistance of the electrode is reduced, the frequency characteristic, which is one of the electric characteristics of the capacitor, is improved, and it is possible to realize a ferroelectric capacitor that works effectively as a capacitance up to a high frequency band.

(Embodiment 2) Referring to FIG. However, FIG.
The same members as and are denoted by the same reference numerals, and description thereof will be omitted. Symbols in the figure
43a, 43b, 43c, and 43d are the first layer, the second layer, the third layer, and the fourth layer, respectively, which form the high dielectric film. This high dielectric film was formed by a metal-organic decomposition (MOD) method. As the high dielectric material, lead acetate, titanium isopropoxide, and zirconium isopropoxide were dissolved in 2-methoxyethanol corresponding to the target PZT composition, and a MOD solution prepared by reacting with 2-ethylhexanoic acid was prepared. The target film composition was Pb _1.0 (Zr _0.55 Ti _0.45 ) O ₃ .

The high dielectric film is formed as follows. That is, a predetermined amount of strontium 2-ethylhexanoate was added to the MOD solution to obtain the target composition Pb _0.9 Sr.
_{A 0.1} (Ti _0.55 Zr _0.45 ) O ₃ solution was prepared. This solution is 1) spin coated at 2500 rpm for 30 seconds, 2) dried on a hot plate, 100 ° C. for 3 minutes, 150 ° C. for 3 minutes,
250 ° C. 5 minutes, 3) RTP bake, oxygen atmosphere, temperature rising rate 125 ° C./second, 800 ° C., 30 seconds.
The steps 1) to 3) were repeated three times to obtain a film thickness of 300 nm. Then, annealing in an electric furnace (oxygen atmosphere 2 liter / minute, 700 ° C., 30 minutes) is performed to form a high dielectric film.

According to the second embodiment, the first layer 43a, the second layer
The layer 43b, the third layer 43c, and the fourth layer 43d form a high dielectric film, and the area when viewed from the upper part of the substrate is reduced, which is effective for miniaturization. Further, by reducing the resistance of the electrode, the frequency characteristic, which is one of the electrical characteristics of the capacitor, is improved, and it is possible to realize a ferroelectric capacitor that works effectively as a capacitance up to a high frequency band.
Further, since the high dielectric film is formed by the MOD method, the MOD solution does not react with air.
The MOD solution can be spin-coated stably.

(Embodiment 3) Referring to FIG. However, FIG.
The same members as and are denoted by the same reference numerals, and description thereof will be omitted. Symbols in the figure
53a, 53b, 53c, and 53d are the first layer (thickness 200 nm) and the second layer (thickness 200 n, respectively) forming the ferroelectric film.
m), the third layer (thickness 600 nm), the fourth layer (thickness 600)
nm). The ferroelectric film is made of lead acetate, titanium isopropoxide, and zirconium isopropoxide for the PZ target.
A sol-gel precursor solution was prepared by dissolving in 2-methoxyethanol corresponding to the T composition. The target film composition is Pb
_{It was 1.0} (Zr _0.4 Ti _0.6 ) O ₃ .

The ferroelectric film is formed as follows. That is, a predetermined amount of water and acetic acid were added to the precursor solution to hydrolyze the solution. The solution after hydrolysis is 1) 15
Spin coating at 00 rpm for 30 seconds, 2) drying on a hot plate, 180 ° C. for 5 minutes, 3) RTP baking, oxygen atmosphere, temperature rising rate of 125 ° C./second, 650 ° C. for 30 seconds. In addition, in order to obtain a film thickness of 200 nm, 1)
The process of ~ 3) was repeated 3 times. Then, annealing in an electric furnace (oxygen atmosphere 1 liter / minute, 700 ° C., 30 minutes) is performed to form a ferroelectric film.

When the third layer 53c and the fourth layer 53d are formed, the solution after hydrolysis is 1) 1500 rpm at 3 rpm.
Spin coating for 0 seconds, 2) Dry on hot plate, 18
0 ℃, 5 minutes, 3) RTP bake, oxygen atmosphere, heating rate 1
Formed by the procedure of 25 ℃ / sec, 650 ℃, 30sec 1)
The steps 3 to 3) were repeated 6 times so that the film thickness became 600 nm.

As described above, by stacking the ferroelectric films having different thicknesses, the capacitors having different capacitances are connected in parallel, so that the hysteresis characteristics thereof are as shown in FIG. This makes it possible to perform nondestructive read-out and multilevel recording.

(Fourth Embodiment) Next, a fourth embodiment will be described with reference to FIG. The same members as those in FIG. 3 are designated by the same reference numerals, and detailed description thereof will be omitted. First, a p-type Si substrate was thermally oxidized to form a SiO ₂ film with a thickness of 200 nm (31), and a lower electrode 32 was formed thereon. The lower electrode 32 is formed by sputtering with a thickness of 200 nm of SiO 2.
_A platinum film was formed on ₂ . Then, the substrate was pre-baked at 700 ° C. for 30 minutes in an oxygen atmosphere, and then a high dielectric film 63a was formed on the lower electrode 32 by a metal-organic decomposition (MOD) method. The high dielectric film 63a is formed by
Specifically, it carried out as follows.

The high dielectric materials are lead acetate, titanium isopropoxide, and zirconium isopropoxide for the PZ target.
Dissolve in 2-methoxyethanol corresponding to T composition,
A MOD solution reacted with 2-ethylhexanoic acid was prepared. The target film composition is Pb _1.0 (Zr _0.55 Ti _0.45 ) O ₃
And A predetermined amount of strontium 2-ethylhexanoate was added to the MOD solution to obtain a target film composition Pb _0.9 Sr.
A solution of _0.1 (Ti _0.55 Zr _0.45 ) O ₃ was prepared. Using this solution, 1) spin coating at 2500 rpm for 30 seconds, 2) drying on a hot plate (3 minutes at 100 ° C., 15 seconds)
A high dielectric film was formed by the procedure of 3 minutes at 0 ° C., 5 minutes at 250 ° C.), and 3) RTP baking (oxygen atmosphere, temperature rising rate 125 ° C./second, 800 ° C., 30 seconds). In addition, 300n
The steps 1) to 3) were repeated three times to obtain a film thickness of m.

Next, annealing in an electric furnace (oxygen atmosphere 2 liters / minute, 700 ° C., 30 minutes) is performed, and the composition formula Pb
Ferroelectric film 63a containing _1.0 (Ti _0.55 Zr _0.45 ) O ₃
Was deposited. Then, 200 nm by sputtering method
A platinum film was formed on the high dielectric film 63a to form the first intermediate electrode 34b. Furthermore, in an oxygen atmosphere, 700 ° C, 3
A pre-bake treatment for 0 minutes was performed.

After that, a high dielectric film 63b was formed on the first intermediate electrode 34b as follows. First, the MO
A predetermined amount of barium 2-ethylhexanoate was added to the solution D to obtain a target film composition Pb _0.9 Ba _0.1 (Ti _0.55 Zr _0.45 ).
A solution of O ₃ was made. 1) 2500 using this solution
Spin coating at rpm for 30 seconds, 2) Dry on hot plate (1O0 ° C for 3 minutes, 150 ° C for 3 minutes, 250 ° C for 5 minutes)
Min), 3) RTP bake (oxygen atmosphere, heating rate 125 ° C)
/ Sec, 800 ° C., 30 seconds) to form a high dielectric film. The steps 1) to 3) were repeated three times to obtain a film thickness of 300 nm. Next, annealing in an electric furnace (oxygen atmosphere 2 liter / minute, 700 ° C., 30 minutes) is performed, and the high dielectric film 63b having a dielectric constant about twice that of the high dielectric film 63a.
Was deposited.

Here, the high dielectric film is formed by ion milling.
63b, the first intermediate electrode 34a, and the high dielectric film 63a are etched to form a contact hole 36a up to the surface of the lower electrode 32, and an insulating film 37a is formed. This is formed by applying SOG by 1) spin coating and then drying it under the following conditions. That is, 2) 100 ° C 5 on a hot plate
Baking at 200 ° C. for 5 minutes and 280 ° C. for 5 minutes. After repeating steps 1) and 2) until the desired thickness is reached, annealing in an electric furnace (oxygen atmosphere 1 liter /
Min., 400 ° C., 30 minutes), the temperature inside the furnace is raised at 10 ° C./minute, and further annealing in an electric furnace (oxygen atmosphere 1 liter / minute, 600 ° C., 30 minutes) is performed. The internal temperature is raised at 10 ° C./minute, and further annealing in an electric furnace (oxygen atmosphere 1 liter / minute, 600 ° C., 30 minutes) is performed. Then, after forming the insulating film, a contact hole was formed by RIE, and the contact 38a and the second intermediate electrode 34b were formed by forming platinum by sputtering.

Thereafter, the same process is repeated, and the high dielectric film 63b, contact hole 36b, insulating film 37b, contact 38b, third intermediate electrode 34c, high dielectric film 63d, contact hole 37c, insulating film 36c, contact. 38c, the upper electrode 35 is formed. The high dielectric film 63c is a high dielectric film.
Material similar to 63a (compositional formula: Pb _1.0 (Zr _0.55 Ti
_0.45 ) O ₃ ) and the method, the high dielectric film 63d is made of the same material (composition Pb _0.9 Ba _0.1 (Ti _0.55) as the high dielectric film 63b.
Zr _0.45 ) O ₃ ) and method.

After forming the electrodes and the high-dielectric film in the above process, contact holes 36d for wiring electrodes are formed by using the ion milling. Further, the interlayer insulating film 39 is formed by stacking the SOG film and the NSG film by LPCVD. After that, contact holes 36e and 36f are formed by RIE, platinum is formed on the wiring electrode layer by sputtering, and then patterned by using ion milling to form wiring electrodes 40a and 40b.

As described above in detail, the high dielectric film 63a and
63c has the composition formula Pb _1.0 (Zr _0.55 Ti _0.45 ) O ₃ , and the high dielectric constant films 63b and 63d have the composition formula Pb _0.9 Ba.
_{It has 0.1} (Ti _0.55 Zr _0.45 ) O ₃ and has different dielectric constants. As described above, by stacking high-dielectric-constant films having different permittivities, capacitors having different capacities are connected in parallel. Therefore, the hysteresis characteristic thereof is as shown in FIG. In the curve, there is an inflection point in the portion corresponding to the portion where the polarization rises and falls with respect to the applied electric field,
This is a so-called twisted hysteresis curve, which enables nondestructive read-out and multilevel recording.

Although the description has been given based on the embodiments, the present invention includes the following inventions. 1. (Configuration) In a dielectric capacitor having a plurality of electrode layers and a plurality of ferroelectric layers, the plurality of electrode layers and the plurality of ferroelectric layers are alternately laminated, and A dielectric capacitor, wherein even-numbered electrodes and odd-numbered electrodes are electrically connected to each other, and even-numbered and odd-numbered electrode layers are electrically insulated.

(Function) Since a plurality of capacitors are connected in parallel, by applying a voltage between the uppermost layer electrode and the lowermost layer electrode, charges are accumulated in each of the plurality of ferroelectric layers. , Functions as a capacitor.

(Effect) By stacking capacitors and connecting them in parallel, a large-capacity capacitor can be realized in a small area, and since the capacitor has a small area, the resistance of the electrode becomes small, so that the capacitance up to a high frequency band is obtained. It is possible to provide a dielectric capacitor that effectively functions as.

2. (Structure) The dielectric capacitor according to the above 1, wherein the film thickness of at least one of the plurality of ferroelectric layers is different from the film thickness of the other ferroelectric layers.

(Operation) As a result of the ferroelectric layers having different film thicknesses being connected in parallel, the hysteresis curve of the capacitor is
It becomes a so-called twisted hysteresis curve having inflection points at portions corresponding to rising and falling portions of polarization with respect to an applied electric field of a normal hysteresis curve of a dielectric.

(Effect) Since the hysteresis characteristic of the capacitor has a twisted hysteresis curve, it is possible to provide a ferroelectric capacitor capable of nondestructive read and multi-value recording.

3. (Structure) The dielectric capacitor according to any one of 1 or 2 above, wherein at least one of the plurality of ferroelectric layers has a dielectric constant different from that of other ferroelectric layers. .

(Operation) As a result of the ferroelectric layers having different permittivities being connected in parallel, the hysteresis curve of the capacitor corresponds to the rising and falling portions of the polarization with respect to the applied electric field of the hysteresis curve of the normal dielectric. This is a so-called twisted hysteresis curve having an inflection point in the part to be turned.

(Effect) Since the hysteresis characteristic of the capacitor has a twisted hysteresis curve, it is possible to provide a ferroelectric capacitor capable of nondestructive read and multi-value recording.

4. (Structure) Even-numbered ones among the plurality of electrode layers, odd-numbered ones are electrically connected through openings provided in the electrode layer and the ferroelectric layer,
4. The dielectric capacitor according to any one of 1 to 3 above, wherein an insulating layer for electrically insulating even-numbered electrodes and odd-numbered electrodes is provided in the opening.

(Function) Since a plurality of capacitors are connected in parallel, by applying a voltage between the uppermost layer electrode and the lowermost layer electrode, charges are accumulated in each of the plurality of ferroelectric layers. , Functions as a capacitor.

(Effect) By stacking capacitors and connecting them in parallel, a large-capacity capacitor can be realized in a small area, and the small area of the capacitor reduces the resistance of the electrodes, so that the capacitance up to the high frequency band is obtained. It is possible to provide a dielectric capacitor that effectively functions as.

5. (Configuration) In a dielectric capacitor having a plurality of electrode layers and a plurality of high dielectric layers, the plurality of electrode layers and the plurality of high dielectric layers are alternately laminated,
A dielectric capacitor, wherein even-numbered electrodes and odd-numbered electrodes of the plurality of electrode layers are electrically connected to each other, and even-numbered and odd-numbered electrode layers are electrically insulated.

(Function) A plurality of capacitors are connected in parallel, and a voltage is applied between the uppermost layer electrode and the lowermost layer electrode, whereby charges are accumulated in each of the plurality of high dielectric layers. , Functions as a capacitor.

(Effect) By stacking the capacitors and connecting them in parallel, a large-capacity capacitor can be realized in a small area, and the small area of the capacitor reduces the resistance of the electrodes, so that the capacitance up to a high frequency band is obtained. It is possible to provide a dielectric capacitor that effectively functions as.

6. (Structure) The ferroelectric capacitor according to the above 5, wherein the film thickness of at least one of the plurality of high dielectric layers is different from the film thickness of the other high dielectric layers.

(Function) As a result of the high dielectric layers having different film thicknesses being connected in parallel, the hysteresis curve of the capacitor is
The so-called twisted hysteresis curve has an inflection point at a portion corresponding to a rising portion and a falling portion of polarization with respect to an applied electric field of a hysteresis curve of a normal dielectric.

(Effect) Since the hysteresis characteristic of the capacitor becomes a twisted hysteresis curve, it is possible to provide a high dielectric capacitor capable of nondestructive read and multi-value recording.

7. (Structure) At least one of the plurality of high dielectric layers has a dielectric constant different from that of other high dielectric layers.
A ferroelectric capacitor according to item.

(Function) As a result of the high-dielectric layers having different dielectric constants being connected in parallel, the hysteresis curve of the capacitor corresponds to the rising portion and the falling portion of the polarization with respect to the electric field applied by the hysteresis curve of the normal dielectric. This is a so-called twisted hysteresis curve having an inflection point in the part to be turned.

(Effect) Since the hysteresis characteristic of the capacitor becomes a twisted hysteresis curve, it is possible to provide a high dielectric capacitor capable of nondestructive read and multi-value recording.

8. (Structure) Even-numbered ones among the plurality of electrode layers, odd-numbered ones are electrically connected through openings provided in the electrode layer and the high dielectric layer,
8. The dielectric capacitor as described in any one of 5 to 7 above, wherein an insulating layer for electrically insulating even-numbered electrodes and odd-numbered electrodes is provided in the opening.

(Operation) A plurality of capacitors are connected in parallel, and a voltage is applied between the uppermost layer electrode and the lowermost layer electrode, whereby charges are accumulated in each of the plurality of high dielectric layers. , Functions as a capacitor.

(Effect) By stacking the capacitors and connecting them in parallel, a large-capacity capacitor can be realized in a small area, and the small area of the capacitor reduces the resistance of the electrodes, so that the capacitance up to a high frequency band is obtained. It is possible to provide a dielectric capacitor that effectively functions as.

[0067]

As described above in detail, according to the present invention, by reducing the resistance component of the electrode material, it is possible to provide a dielectric capacitor which can effectively utilize the frequency characteristic peculiar to the dielectric material.

[Brief description of drawings]

FIG. 1 is an explanatory diagram of a thin film capacitor according to the present invention.
1A is a cross-sectional view, and FIG. 1B is a circuit diagram in FIG.

2 is an explanatory view of a conventional thin film capacitor, FIG.
Is a cross-sectional view and FIG. 2B is a circuit diagram of FIG.

FIG. 3 is a sectional view of the ferroelectric capacitor according to the first embodiment of the present invention.

FIG. 4 is a sectional view of a high-ferroelectric capacitor according to a second embodiment of the present invention.

FIG. 5 is a sectional view of a ferroelectric capacitor according to a third embodiment of the present invention.

FIG. 6 is a sectional view of a ferroelectric capacitor according to a fourth embodiment of the present invention.

FIG. 7 is a hysteresis characteristic diagram of the ferroelectric capacitor according to the fourth embodiment.

[Explanation of symbols]

31 ... Substrate, 32 ... Bottom electrode,
33a, 43a, 53a ... First layer, 33b, 43b, 53
b ... 2nd layer, 33c, 43c, 53c ... 3rd layer, 33
d, 43d, 53d ... fourth layer, 34a ... first intermediate electrode, 34b
... second intermediate electrode, 34c ... third intermediate electrode, 35 ... upper electrode, 36a, 36b, 36c, 36d, 36e ... contact hole, 37a, 37b, 37c, 37d ... insulating layer, 38a, 38
b, 38c, 38d ... conductor, 39 ... interlayer insulating film,
40a, 40b ... Wiring electrodes.

Claims (3)

[Claims] 1. A dielectric capacitor having a plurality of electrode layers and a plurality of ferroelectric layers, wherein the plurality of electrode layers and the plurality of ferroelectric layers are alternately stacked, and the plurality of electrode layers are provided. A dielectric capacitor, wherein even-numbered electrodes and odd-numbered electrodes are electrically connected to each other, and even-numbered and odd-numbered electrode layers are electrically insulated. 2. The dielectric capacitor, wherein the film thickness of at least one of the plurality of ferroelectric layers is different from the film thickness of the other ferroelectric layers. 3. The dielectric constant of at least one of the plurality of ferroelectric layers is different from the dielectric constant of another ferroelectric layer. The dielectric capacitor described.