JPH08255811A - Connection device of electronic part - Google Patents
Connection device of electronic partInfo
- Publication number
- JPH08255811A JPH08255811A JP5702895A JP5702895A JPH08255811A JP H08255811 A JPH08255811 A JP H08255811A JP 5702895 A JP5702895 A JP 5702895A JP 5702895 A JP5702895 A JP 5702895A JP H08255811 A JPH08255811 A JP H08255811A
- Authority
- JP
- Japan
- Prior art keywords
- electronic component
- semiconductor chip
- wiring board
- shield member
- connecting device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/303—Surface mounted components, e.g. affixing before soldering, aligning means, spacing means
Landscapes
- Wire Bonding (AREA)
Abstract
Description
【0001】[0001]
【産業上の利用分野】この発明は、半導体チップあるい
は表面が平坦性を有する複合部品などを、フェースダウ
ンにより配線基板に接続するフリップチップ電子部品の
接続装置に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a flip chip electronic component connecting device for connecting a semiconductor chip or a composite component having a flat surface to a wiring substrate by face down.
【0002】[0002]
【従来の技術】近年、高度情報化社会の進展に伴ない、
通信分野においては、携帯電話などの移動体通信機器が
急速に普及し、またデータ通信や画像通信が発展してき
た。これらは、今後ますます高速・高機能化、高周波化
が進むことが予想され、また機器の小型化も急速に進む
と考えられる。これらに対応するため、特に半導体を配
線基板に実装する方法としては、半導体チップをフェー
スダウンにより配線基板に接続するフリップチップ接続
が、小型化・高速化に有効な実装方法として用いられて
いる。2. Description of the Related Art In recent years, with the progress of advanced information society,
In the communication field, mobile communication devices such as mobile phones have rapidly spread, and data communication and image communication have been developed. It is expected that these devices will continue to have higher speeds, higher functionality, and higher frequencies in the future, and the miniaturization of devices will also progress rapidly. In order to cope with these, particularly as a method of mounting a semiconductor on a wiring board, flip-chip connection in which a semiconductor chip is connected to the wiring board face down is used as a mounting method effective for downsizing and speeding up.
【0003】図7を用い、従来のフリップチップ部品の
接続方法について説明する。アルミナ、ガラスエポキシ
などの絶縁基板1上にエッチング法などにより形成され
た銅などの配線パターン2を固着して配線基板3を形成
する。ボンディングパッド4上に半田などの金属突起
(バンプ)5を形成された半導体チップ6を、リフロー
半田付け法、熱圧着法などの手法を用いてフェースダウ
ンで接続し、最後に半導体チップ6の耐湿性の向上、機
械的強度の向上を目的として、エポキシなどの樹脂7に
より封止を行うものである。A conventional method for connecting flip-chip components will be described with reference to FIG. A wiring pattern 2 such as copper formed by an etching method or the like is fixed on an insulating substrate 1 such as alumina or glass epoxy to form a wiring substrate 3. A semiconductor chip 6 having metal bumps (bumps) 5 such as solder formed on the bonding pad 4 is connected face down using a method such as a reflow soldering method or a thermocompression bonding method, and finally the moisture resistance of the semiconductor chip 6 is obtained. The resin 7 such as epoxy is used for sealing for the purpose of improving the mechanical properties and the mechanical strength.
【0004】ここで、特に通信機器のような高速・高周
波回路においては、ノイズの発生が問題となる。半導体
チップ6から引き出された信号線などの配線パターン2
が、放射ノイズのアンテナとして作用することが知られ
ている。10MHz以上の高周波領域においては、空間
での結合が急激に増加するため、高周波回路からの結合
によって電源系にノイズが放出されやすい。In particular, noise is a problem in high-speed and high-frequency circuits such as communication equipment. Wiring pattern 2 such as a signal line drawn from the semiconductor chip 6
However, it is known to act as an antenna for radiation noise. In the high frequency region of 10 MHz or more, the coupling in the space rapidly increases, so that the coupling from the high frequency circuit easily emits noise to the power supply system.
【0005】このようなノイズの対策としては、図7に
示したように、半導体チップ6から引き出された信号線
などの配線パターン2に対して直列に、フェライトビー
ズフィルタ8を介挿接続する方法が行われている。高周
波におけるフェライトの透磁率は、複素量として表すこ
とができるが、周波数が高くなるにつれて透磁率μ′成
分の分散現象を生じ、その値は低下してくる。それに伴
い、虚数部である透磁率μ″が相対的に高くなり、μ″
/μ′で表されるコア損失(tanδ)が増大する。こ
れを利用し、高周波の伝導ノイズをμ′成分によりフェ
ライトコア内に誘導し、その誘導された高周波ノイズを
μ″成分によりコア内で吸収し、放射ノイズを抑制する
ものである。As a countermeasure against such noise, as shown in FIG. 7, a ferrite bead filter 8 is connected in series to a wiring pattern 2 such as a signal line drawn from a semiconductor chip 6. Is being done. The magnetic permeability of ferrite at high frequencies can be expressed as a complex quantity, but as the frequency increases, a dispersion phenomenon of the magnetic permeability μ ′ component occurs and its value decreases. Along with that, the magnetic permeability μ ″, which is the imaginary part, becomes relatively high, and μ ″
The core loss (tan δ) represented by / μ 'increases. By utilizing this, high-frequency conduction noise is induced in the ferrite core by the μ ′ component, and the induced high-frequency noise is absorbed in the core by the μ ″ component to suppress radiation noise.
【0006】図7においては、チップタイプのフェライ
トビーズフィルタ8を例に挙げて説明したが、その他、
コンデンサ、インダクタを使用しても、同様の効果を得
ることができる。この場合、一般的にはコンデンサとイ
ンダクタを組み合わせたフィルタを構成して用いる場合
が多い。In FIG. 7, the chip-type ferrite bead filter 8 has been described as an example.
The same effect can be obtained by using a capacitor and an inductor. In this case, generally, there are many cases in which a filter including a capacitor and an inductor is configured and used.
【0007】このように、高速や高周波回路において
は、ノイズ対策は不可欠であり、従来はノイズを抑制す
るためのノイズ除去部品を用いることにより、その対応
を行ってきた。従って、半導体チップ6をフリップチッ
プ実装法を用いて高密度に実装しても、部品点数の増大
から回路基板の小型化には限界があり、通信機器などに
おける小型化の妨げとなっていた。また、半導体チップ
6の実装構造に限らず、高速や高周波回路においては、
他の電子部品でも同様の不具合があった。As described above, countermeasures against noise are indispensable in high-speed and high-frequency circuits, and conventionally, such measures have been taken by using noise removing parts for suppressing noise. Therefore, even if the semiconductor chips 6 are mounted at high density using the flip-chip mounting method, there is a limit to the size reduction of the circuit board due to the increase in the number of parts, which hinders the size reduction of communication devices and the like. Further, not only in the mounting structure of the semiconductor chip 6, but also in high-speed and high-frequency circuits,
Other electronic parts also had the same problem.
【0008】[0008]
【発明が解決しようとする課題】上記した従来の電子部
品の接続装置では、ノイズの発生を防止することができ
ず、所望の回路に加えて、ノイズ除去部品を用いる必要
があり、回路基板の小型化の妨げになる、という問題が
あった。In the above-mentioned conventional connecting device for electronic parts, it is not possible to prevent the generation of noise, and it is necessary to use a noise removing part in addition to the desired circuit. There was a problem that it hinders miniaturization.
【0009】この発明は、ノイズ除去部品を用いること
なく、耐ノイズ性に優れた電子部品の接続装置を提供す
ることを目的とする。An object of the present invention is to provide a connecting device for electronic parts which is excellent in noise resistance without using noise removing parts.
【0010】[0010]
【課題を解決するための手段】この発明による電子部品
の接続装置は、絶縁基板に回路パターンを固着した配線
基板と、主面に前記回路パターンの所望箇所に電気的に
接続するためのボンディングパッドを有する電子部品
と、フェースダウンにより前記電子部品を前記回路パタ
ーンの所望箇所に電気的に接続するための接続部材と、
前記電子部品と前記配線基板の間隙内に配置された電波
吸収または電波反射を行うためのシールド部材とからな
ることを特徴とする。An electronic component connecting device according to the present invention is a wiring board having a circuit pattern fixed to an insulating substrate, and a bonding pad for electrically connecting a main surface to a desired portion of the circuit pattern. An electronic component having, and a connecting member for electrically connecting the electronic component to a desired portion of the circuit pattern by face down,
It is characterized by comprising a shield member arranged in a gap between the electronic component and the wiring board for absorbing or reflecting radio waves.
【0011】[0011]
【作用】上述した構成により、電子部品のボンディング
パッドの周囲が、絶縁性を有するシールド部材により覆
われるため、高周波用の電子部品のボンディングパッド
から発生する放射ノイズが吸収できる。これにより新た
なノイズ除去部品を用いることなく、耐ノイズ性に優
れ、かつ小型な電子部品の接続装置を実現することがで
きる。With the above structure, the periphery of the bonding pad of the electronic component is covered with the insulating shield member, so that the radiation noise generated from the bonding pad of the high frequency electronic component can be absorbed. As a result, it is possible to realize a small-sized electronic component connecting device having excellent noise resistance without using a new noise removing component.
【0012】[0012]
【実施例】以下、この発明の実施例について図面を参照
しながら詳細に説明する。図1は、この発明の一実施例
を説明するための構成図である。図1において、アルミ
ナ、ガラスエポキシ樹脂などの絶縁基板11上にエッチ
ング法などにより形成された銅などの配線パターン12
を固着して配線基板13を形成する。次に、ボンディン
グパッド14上に金などのバンプ15がメッキ法、ボー
ルバンプ法などにより形成された半導体チップ16を、
導電性接着剤17により、配線基板13の所定の位置に
フェースダウンで接続する。その後に、フェライトなど
の絶縁性を有する磁性体粉末18が分散・混入されたエ
ポキシ樹脂などの封止樹脂19を用いて、半導体チップ
16と配線基板13の間隙および半導体チップ16の側
面を覆うようにして封止を行う。Embodiments of the present invention will now be described in detail with reference to the drawings. FIG. 1 is a block diagram for explaining an embodiment of the present invention. In FIG. 1, a wiring pattern 12 made of copper or the like formed on an insulating substrate 11 made of alumina, glass epoxy resin or the like by an etching method or the like.
Are fixed to form the wiring board 13. Next, a semiconductor chip 16 in which bumps 15 of gold or the like are formed on the bonding pads 14 by a plating method, a ball bump method, or the like,
The conductive adhesive 17 is used to connect the wiring board 13 at a predetermined position face down. After that, the gap between the semiconductor chip 16 and the wiring board 13 and the side surface of the semiconductor chip 16 are covered with a sealing resin 19 such as an epoxy resin in which a magnetic powder 18 having an insulating property such as ferrite is dispersed and mixed. Then, sealing is performed.
【0013】このような接続構造をとることにより、半
導体チップ16のボンディングパッド14の周囲が、絶
縁性を有する磁性体粉末18により覆われるため、例え
ば高周波半導体チップを用いた場合に、ボンディングパ
ッド14から発生する放射ノイズが、従来例に記載した
フェライトのノイズ吸収の原理から、封止樹脂19中に
分散・混入された磁性体粉末18によって吸収できる。
また、1つの半導体チップが複数の回路ブロックにより
構成されている場合、ボンディングパッドから発生する
放射ノイズ以外に、各回路ブロック間の干渉を防止する
という効果も得られる。By adopting such a connection structure, the periphery of the bonding pad 14 of the semiconductor chip 16 is covered with the magnetic powder 18 having an insulating property. Therefore, for example, when a high frequency semiconductor chip is used, the bonding pad 14 is used. Radiation noise generated from the above can be absorbed by the magnetic powder 18 dispersed / mixed in the sealing resin 19 based on the principle of ferrite noise absorption described in the conventional example.
In addition, when one semiconductor chip is composed of a plurality of circuit blocks, in addition to the radiation noise generated from the bonding pad, an effect of preventing interference between the circuit blocks can be obtained.
【0014】ここで、フェライトのノイズ吸収効果につ
いて実験した結果を述べる。50MHz〜1800MH
zの高周波信号の入出力端子を、それぞれ特性インピー
ダンス50Ωで終端し、入力端子から出力端子までの距
離を約20mm離して配置した。その一端の周囲を一面
のみ解放して金属板で囲み、解放部に被測定物を配置し
てノイズ除去効果を調べた。Here, the results of experiments on the noise absorption effect of ferrite will be described. 50MHz ~ 1800MH
The input / output terminals for the high frequency signal of z were terminated with a characteristic impedance of 50Ω, respectively, and the input terminal and the output terminal were arranged with a distance of about 20 mm. The noise removal effect was investigated by surrounding the one end only on one surface and surrounding it with a metal plate, and arranging the object to be measured at the opening.
【0015】フェライト粉末が分散・混入されたエポキ
シ樹脂を約1mmの厚さで配置した場合、解放状態に比
べて、特に900MHz以上で約10dBノイズレベル
を低減することができた。また、厚さ約1mmのフェラ
イト焼結体を配置した場合は、1GHz以下で約10d
Bノイズレベルを低減することができ、それ以上の高周
波領域では効果が得られなかった。When the epoxy resin in which ferrite powder is dispersed and mixed is arranged with a thickness of about 1 mm, the noise level can be reduced by about 10 dB especially at 900 MHz or more as compared with the released state. When a ferrite sintered body having a thickness of about 1 mm is arranged, it is about 10 d at 1 GHz or less.
It was possible to reduce the B noise level, and no effect was obtained in the higher frequency region.
【0016】これは、焼結体のフェライトの透磁率が通
常600〜1000なのに対し、粉末形状のフェライト
の場合は、10前後まで大幅に低下するため、ノイズ吸
収効果が、 μ(透磁率)×f(周波数)=一定 の関係にあることから、粉末形状はGHz帯域で、焼結
体はMHz帯域でそれぞれ効果が現れた。This is because the ferrite of the sintered body usually has a magnetic permeability of 600 to 1000, whereas in the case of powder-form ferrite, it is significantly reduced to about 10, so that the noise absorption effect is μ (magnetic permeability) × Since the relationship of f (frequency) = constant was established, the effect was exhibited in the powder band shape in the GHz band and in the sintered body in the MHz band.
【0017】この実施例の構造においては、フェライト
が粉末形状となるため、特にGHz帯域の高周波領域で
より大きなノイズ吸収効果が得られるが、配線基板13
全体のシールドを考えた場合は、例えば金属キャップで
覆うなどの簡易的なシールド構造と併用することで、十
分なシールド効果を得ることができる。In the structure of this embodiment, since the ferrite is in the form of powder, a larger noise absorbing effect can be obtained especially in the high frequency region of the GHz band.
When considering the whole shield, a sufficient shield effect can be obtained by using it together with a simple shield structure such as covering with a metal cap.
【0018】ここで、封止樹脂19中に分散・混入した
磁性体粉末18の大きさは、バンプ15の高さにより異
なるが、封止樹脂19の流動性を考慮すると、バンプ1
5の高さの約1/3以下の粒径が望ましい。また、封止
樹脂19中に磁性体粉末18を混入する割合は、多いほ
どノイズ吸収効果が高まるが、封止樹脂19の流動性が
損なわれない程度に抑える必要がある。Here, the size of the magnetic powder 18 dispersed / mixed in the sealing resin 19 varies depending on the height of the bump 15, but in consideration of the fluidity of the sealing resin 19, the bump 1
A particle size of about 1/3 or less of the height of 5 is desirable. Further, the larger the ratio of the magnetic powder 18 mixed into the sealing resin 19, the higher the noise absorbing effect, but it is necessary to suppress the fluidity of the sealing resin 19 to the extent that it is not impaired.
【0019】また、この実施例において、半導体チップ
16の接続方法として導電性接着剤17を用いて説明し
たが、この接続方法についてはこの限りではなく、例え
ば半田バンプを用いた半田接続、封止樹脂の収縮力を利
用した圧接による接続など、いかなる接続法であっても
かまわない。Further, in this embodiment, the conductive adhesive 17 is used as the connecting method of the semiconductor chip 16, but the connecting method is not limited to this, and for example, solder connection using solder bumps or sealing is performed. Any connection method may be used, such as connection by pressure contact using the shrinkage force of the resin.
【0020】次に、図2を用いこの発明の他の実施例に
ついて説明する。アルミナ、ガラスエポキシなどの絶縁
基板11上に、エッチング法などにより形成された銅な
どの配線パターン12を固着して配線基板13を形成す
る。さらに、ボンディングパッド14上に金などのバン
プ15がメッキ法、ボールバンプ法などにより形成され
た半導体チップ16を、導電性接着剤17により、配線
基板13の所定の位置にフェースダウンで接続する。Next, another embodiment of the present invention will be described with reference to FIG. A wiring pattern 12 such as copper formed by an etching method or the like is fixed on an insulating substrate 11 such as alumina or glass epoxy to form a wiring substrate 13. Further, a semiconductor chip 16 having bumps 15 made of gold or the like formed on the bonding pads 14 by a plating method, a ball bump method or the like is connected to a predetermined position of the wiring board 13 face down by a conductive adhesive 17.
【0021】このとき、図3に示す半導体チップ16の
ボンディングパッド14に対向する位置に開口部20を
有するフェライトなどの絶縁性を有する磁性体薄板21
を、半導体チップ16と配線基板13の間に介在させ、
磁性体薄板21に形成された開口部20を通して、半導
体チップ16と配線基板13の間を電気的に接続する。
この接続を行うとき、開口部20にあらかじめ導電性接
着剤などの導電性材料を印刷法などにより充填させてお
くと、より信頼性の高い接続が可能となる。その後に、
エポキシ樹脂などの封止樹脂19を用いて、半導体チッ
プ16と配線基板13の間隙および半導体チップ16の
側面を覆うように封止を行う。At this time, an insulating magnetic thin plate 21 such as ferrite having an opening 20 at a position facing the bonding pad 14 of the semiconductor chip 16 shown in FIG.
Is interposed between the semiconductor chip 16 and the wiring board 13,
Through the opening 20 formed in the magnetic thin plate 21, the semiconductor chip 16 and the wiring board 13 are electrically connected.
When making this connection, if the opening 20 is filled with a conductive material such as a conductive adhesive in advance by a printing method or the like, more reliable connection can be achieved. After that,
A sealing resin 19 such as an epoxy resin is used to perform sealing so as to cover the gap between the semiconductor chip 16 and the wiring board 13 and the side surface of the semiconductor chip 16.
【0022】このような接続構造をとることにより、上
記した実施例と同様の効果を得ることができるが、ここ
では薄板状のフェライトを用いたため、特に上述した実
験結果から、MHz帯域でより大きな効果が得られる。By adopting such a connection structure, it is possible to obtain the same effect as that of the above-mentioned embodiment, but since a thin plate-like ferrite is used here, especially from the above-mentioned experimental results, a larger value is obtained in the MHz band. The effect is obtained.
【0023】図4は、この発明のもう一つの他の実施例
を説明するための断面図である。この実施例は図2の実
施例での、絶縁性を有する磁性体薄板の変えて、磁性体
膜を配線基板上に形成したものである。FIG. 4 is a sectional view for explaining another embodiment of the present invention. This embodiment is different from the embodiment of FIG. 2 in that the magnetic thin plate having an insulating property is changed, and a magnetic film is formed on the wiring board.
【0024】図4において、配線基板13上の半導体チ
ップ16が接続されるランド部以外の部分に、印刷法な
どを用いてフェライトなどの絶縁性を有する磁性体膜4
1を形成する。次にボンディングパッド14上に金など
のバンプ15がメッキ法、ボールバンプ法などにより形
成された半導体チップ16を、導電性接着剤17によ
り、配線基板13の所定の位置にフェースダウンで接続
し、最後に、エポキシ樹脂などの封止樹脂19を用い
て、半導体チップ16と配線基板13の間隙および半導
体チップ16の側面を覆うように封止を行ったものであ
る。In FIG. 4, a magnetic film 4 having an insulating property such as ferrite is formed by a printing method or the like on a portion other than the land portion to which the semiconductor chip 16 is connected on the wiring substrate 13.
1 is formed. Next, a semiconductor chip 16 having bumps 15 made of gold or the like formed on the bonding pads 14 by a plating method, a ball bump method or the like is connected face down to a predetermined position of the wiring board 13 by a conductive adhesive 17. Finally, a sealing resin 19 such as an epoxy resin is used for sealing so as to cover the gap between the semiconductor chip 16 and the wiring board 13 and the side surface of the semiconductor chip 16.
【0025】このような構造によっても、上記した各実
施例と同様の効果を得ることができる。なお、ここでは
磁性体膜41を配線基板13上に形成した例を示した
が、半導体チップ上に印刷法などで形成してもよい。With such a structure, the same effects as those of the above-described embodiments can be obtained. Although the magnetic film 41 is formed on the wiring substrate 13 here, it may be formed on the semiconductor chip by a printing method or the like.
【0026】上記した各実施例では半導体チップ16の
接続方法として導電性接着剤17を用いて説明したが、
これに限らず半田による接続などでも可能であり、接続
方法についてはこの限りではない。また、各実施例にお
いては、半導体チップ16と配線基板13の間に絶縁性
を有する磁性体を介在させた例を述べたが、例えば接
地、電源などの基準電位を有する金属などの電波反射部
材を介在させても、放射ノイズの防止効果をえることが
できる。In each of the above-described embodiments, the conductive adhesive 17 is used as the method of connecting the semiconductor chips 16, but
The connection method is not limited to this, and connection by soldering is also possible, and the connection method is not limited to this. In each of the embodiments, an example in which a magnetic material having an insulating property is interposed between the semiconductor chip 16 and the wiring board 13 has been described. The effect of preventing radiation noise can be obtained even by interposing.
【0027】図5は、この発明のさらにもう一つの他の
実施例を示すものである。この実施例は、半導体チップ
16と配線基板13とを接続する接続部材に電波吸収部
材を被着したものである。FIG. 5 shows still another embodiment of the present invention. In this embodiment, a radio wave absorbing member is attached to a connecting member for connecting the semiconductor chip 16 and the wiring board 13.
【0028】すなわち、半導体チップ16を配線基板1
3上に、図6に示すエポキシ樹脂などの絶縁層52中に
分散配置された金、半田などの金属粉末53の表面に、
フェライトなどの絶縁性を有する磁性体膜54を蒸着法
などにより被着させた異方性導電膜51を介在させ、熱
圧着法などにより接続を行う。半導体チップ16と配線
基板13の電気的接続は、加圧により金属粉末53の表
面に被着された磁性体膜54の一部を破壊して、金属部
分を露出させることにより、電気的な接続を行う。That is, the semiconductor chip 16 is connected to the wiring board 1
3, on the surface of the metal powder 53 such as gold or solder dispersed in the insulating layer 52 such as epoxy resin shown in FIG.
Connection is made by a thermocompression bonding method or the like with an anisotropic conductive film 51 having a magnetic film 54 having an insulating property such as ferrite deposited by a deposition method or the like interposed. The electrical connection between the semiconductor chip 16 and the wiring substrate 13 is made by destroying a part of the magnetic film 54 deposited on the surface of the metal powder 53 by applying pressure to expose the metal part. I do.
【0029】このような接続構造をとることにより、半
導体チップ16のボンディングパッド14の周囲が、絶
縁性を有する磁性体膜54により覆われるため、上記し
た各実施例と同様の効果を得ることができる。By adopting such a connection structure, the periphery of the bonding pad 14 of the semiconductor chip 16 is covered with the magnetic film 54 having an insulating property, so that the same effect as each of the above-described embodiments can be obtained. it can.
【0030】なお、ここでは金属粉末の表面に磁性体膜
54を形成したが、金属粉末の表面に磁性体微粉末また
は、絶縁性樹脂中に磁性体微粉末を混入された磁性体膜
を被着させても同様の効果が得られる。また、接続部材
として異方性導電膜を用いずに、金属粉末のみで接続を
行う場合においても可能であり、同様の効果が得られ
る。Although the magnetic substance film 54 is formed on the surface of the metal powder here, a magnetic substance fine powder or a magnetic substance film in which the magnetic substance fine powder is mixed in the insulating resin is coated on the surface of the metal powder. The same effect can be obtained by wearing it. This is also possible when the connection is made only with the metal powder without using the anisotropic conductive film as the connecting member, and the same effect can be obtained.
【0031】上記した各実施例は、半導体チップを例に
とって説明をしてきたが、例えば表面が平坦性を有し、
かつ表面に配線基板との接続用パッドを有する素子内蔵
基板などの複合部品であっても、同様の構造、効果を得
ることが可能であり、用いる電子部品は半導体チップに
限るものではない。Although each of the above-described embodiments has been described by taking the semiconductor chip as an example, for example, the surface has flatness,
Moreover, even if it is a composite component such as a device-embedded substrate having a pad for connection with a wiring substrate on the surface, the same structure and effect can be obtained, and the electronic component used is not limited to the semiconductor chip.
【0032】このような構成にすることにより、半導体
チップなど電子部品の接続端子部の周囲に電波吸収部材
または電波反射部材が配置されているため、接続端子部
から発生する放射ノイズを吸収することができ、電気特
性に優れ、かつ小型な電子部品の接続を得ることができ
る。With such a structure, since the radio wave absorbing member or the radio wave reflecting member is arranged around the connection terminal portion of the electronic component such as the semiconductor chip, the radiation noise generated from the connection terminal portion can be absorbed. Therefore, it is possible to obtain a connection of a small electronic component having excellent electric characteristics.
【0033】[0033]
【発明の効果】以上説明したように、この発明の電子部
品の接続装置によれば、ノイズ除去部品を用いることな
く、電気特性に優れ、かつ小型な電子部品の接続を得る
ことができる。As described above, according to the electronic component connecting device of the present invention, it is possible to obtain a connection of a small electronic component having excellent electric characteristics without using a noise removing component.
【図面の簡単な説明】[Brief description of drawings]
【図1】この発明の一実施例を説明するための断面図。FIG. 1 is a sectional view for explaining an embodiment of the present invention.
【図2】この発明の他の実施例を説明するための断面
図。FIG. 2 is a sectional view for explaining another embodiment of the present invention.
【図3】図2の主要部の部品を説明するための斜視図。FIG. 3 is a perspective view for explaining components of a main part of FIG.
【図4】この発明のもう一つの他の実施例を説明するた
めの断面図。FIG. 4 is a sectional view for explaining another embodiment of the present invention.
【図5】この発明のさらにもう一つの他の実施例を説明
するための断面図。FIG. 5 is a sectional view for explaining still another embodiment of the present invention.
【図6】図6の実施例の主要部分の一部を拡大して示し
た断面図。FIG. 6 is an enlarged sectional view showing a part of a main part of the embodiment shown in FIG.
【図7】従来のフリップチップ部品の接続方法について
説明するための断面図。FIG. 7 is a sectional view for explaining a conventional method for connecting flip-chip components.
11…絶縁基板、12…配線パターン、13…配線基
板、14…ボンディングパッド、15…バンプ、16…
半導体チップ、17…導電性接着剤、18…磁性体粉
末、19…封止樹脂、20…開口部、21…磁性体薄
板、41…磁性体膜、51…異方性導電膜。11 ... Insulating substrate, 12 ... Wiring pattern, 13 ... Wiring substrate, 14 ... Bonding pad, 15 ... Bump, 16 ...
Semiconductor chip, 17 ... Conductive adhesive, 18 ... Magnetic powder, 19 ... Sealing resin, 20 ... Opening part, 21 ... Magnetic thin plate, 41 ... Magnetic film, 51 ... An anisotropic conductive film.
───────────────────────────────────────────────────── フロントページの続き (72)発明者 吉岡 心平 神奈川県横浜市磯子区新杉田町8番地 株 式会社東芝マルチメディア技術研究所内 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Shinpei Yoshioka, 8 Shinshinsita-cho, Isogo-ku, Yokohama, Kanagawa Prefecture
Claims (13)
してなる配線基板と、 主面に前記回路パターンの所望箇所に電気的に接続する
ためのボンディングパッドを有する電子部品と、 フェースダウンにより前記電子部品を前記回路パターン
の所望箇所に電気的に接続するための接続部材と、 前記電子部品と前記配線基板の間隙内に配置された電波
吸収または電波反射を行うためのシールド部材とから構
成してなることを特徴とする電子部品の接続装置。1. A wiring board formed by fixing a circuit pattern to an insulating substrate, an electronic component having a bonding pad on its main surface for electrically connecting to a desired portion of the circuit pattern, and a face down A connection member for electrically connecting the electronic component to a desired portion of the circuit pattern, and a shield member disposed in a gap between the electronic component and the wiring board for absorbing or reflecting a radio wave. A connecting device for electronic parts, which is characterized in that
は、前記電子部品を前記配線基板に固着するための固着
部材内に分散配置してなることを特徴とする請求項1記
載の電子部品の接続装置。2. The electronic component according to claim 1, wherein the shield member for absorbing the radio waves is dispersed and arranged in a fixing member for fixing the electronic component to the wiring board. Connection device.
のシールド部材は、前記配線基板上または内部の、少な
くとも前記電子部品が搭載される位置に、膜状に形成し
てなることを特徴とする請求項1記載の電子部品の接続
装置。3. The shield member for absorbing or reflecting radio waves is formed in a film shape on or inside the wiring board at least at a position where the electronic component is mounted. The device for connecting electronic components according to claim 1.
のシールド部材は、前記電子部品上または内部に、膜状
に形成してなることを特徴とする請求項1記載の電子部
品の接続装置。4. The electronic component connecting device according to claim 1, wherein the shield member for absorbing or reflecting the radio wave is formed in a film shape on or inside the electronic component.
のシールド部材は、前記配線基板と前記電子部品の間
に、薄板状部材として介在してなることを特徴とする請
求項1記載の電子部品の接続装置。5. The electronic component according to claim 1, wherein the shield member for absorbing or reflecting the radio wave is provided as a thin plate member between the wiring board and the electronic component. Connection device.
ルド部材の、前記電子部品のボンディングパッド部に対
応する位置に、開口部を有してなることを特徴とする請
求項3または請求項4または請求項5記載の電子部品の
接続装置。6. The shield member formed in the shape of a film or a thin plate has an opening at a position corresponding to a bonding pad portion of the electronic component. The connection device for an electronic component according to claim 4 or claim 5.
は、前記接続部材に被着してなることを特徴とする請求
項1記載の電子部品の接続装置。7. The electronic component connecting device according to claim 1, wherein the shield member for absorbing the radio wave is adhered to the connecting member.
特徴とする請求項7記載の電子部品の接続装置。8. The electronic component connecting device according to claim 7, wherein the connecting member is a metal powder.
は、絶縁性を有する磁性体であることを特徴とする請求
項1記載の電子部品の接続装置。9. The connecting device for electronic parts according to claim 1, wherein the shield member for absorbing the radio wave is a magnetic material having an insulating property.
イトであることを特徴とする請求項10記載の半導体チ
ップの接続装置。10. The semiconductor chip connecting device according to claim 10, wherein the magnetic material having an insulating property is ferrite.
材は、基準電位を有する金属であることを特徴とする請
求項1記載の電子部品の接続装置。11. The electronic component connecting device according to claim 1, wherein the shield member for reflecting the radio wave is a metal having a reference potential.
ことを特徴とする請求項1記載の電子部品の接続装置。12. The electronic component connecting device according to claim 1, wherein the electronic component is a semiconductor chip.
る複合部品であることを特徴とする請求項1記載の電子
部品の接続装置。13. The electronic component connecting device according to claim 1, wherein the electronic component is a composite component having a plurality of elements.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5702895A JPH08255811A (en) | 1995-03-16 | 1995-03-16 | Connection device of electronic part |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5702895A JPH08255811A (en) | 1995-03-16 | 1995-03-16 | Connection device of electronic part |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH08255811A true JPH08255811A (en) | 1996-10-01 |
Family
ID=13043988
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP5702895A Withdrawn JPH08255811A (en) | 1995-03-16 | 1995-03-16 | Connection device of electronic part |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH08255811A (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2001033623A1 (en) * | 1999-10-29 | 2001-05-10 | Hitachi, Ltd. | Semiconductor device and its manufacturing method |
WO2005022451A1 (en) * | 2003-09-01 | 2005-03-10 | Sony Corporation | Ic card and method for producing the same |
KR100708643B1 (en) * | 2003-11-27 | 2007-04-17 | 삼성에스디아이 주식회사 | Plasma display device |
US7327041B2 (en) | 2001-05-28 | 2008-02-05 | Sharp Kabushiki Kaisha | Semiconductor package and a method for producing the same |
KR101028258B1 (en) * | 2007-02-13 | 2011-04-11 | 가시오게산키 가부시키가이샤 | Semiconductor device mixing magnetic powder and manufacturing method therefor |
-
1995
- 1995-03-16 JP JP5702895A patent/JPH08255811A/en not_active Withdrawn
Cited By (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2001033623A1 (en) * | 1999-10-29 | 2001-05-10 | Hitachi, Ltd. | Semiconductor device and its manufacturing method |
US7327041B2 (en) | 2001-05-28 | 2008-02-05 | Sharp Kabushiki Kaisha | Semiconductor package and a method for producing the same |
WO2005022451A1 (en) * | 2003-09-01 | 2005-03-10 | Sony Corporation | Ic card and method for producing the same |
JP2005078442A (en) * | 2003-09-01 | 2005-03-24 | Sony Corp | Ic card, and its manufacturing method |
US7451934B2 (en) | 2003-09-01 | 2008-11-18 | Sony Corporation | IC card and method for producing the same |
US7883022B2 (en) | 2003-09-01 | 2011-02-08 | Sony Corporation | IC card and manufacturing method of the same |
KR100708643B1 (en) * | 2003-11-27 | 2007-04-17 | 삼성에스디아이 주식회사 | Plasma display device |
KR101028258B1 (en) * | 2007-02-13 | 2011-04-11 | 가시오게산키 가부시키가이샤 | Semiconductor device mixing magnetic powder and manufacturing method therefor |
US8110882B2 (en) | 2007-02-13 | 2012-02-07 | Casio Computer Co., Ltd. | Semiconductor device with magnetic powder mixed therein and manufacturing method thereof |
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