JPH08234175A - Liquid crystal display device and driving method for liquid crystal display element - Google Patents

Abstract

PURPOSE: To prevent the change of display colors due to temp. changes from occurring in a color liquid crystal display device making display colors change in accordance with impressed voltages. CONSTITUTION: The tamp. of a liquid crystal display element 11 is measured by a sensor 43 to be supplied to a display control circuit 31. The display control circuit 31 selects pulse width data indicating pulse widths to be impressed on the liquid crystal element 11 in order to display proper pictures in accordance with the measured temp. to supply them to a gradation signal generating circuit 37 via a signal line in a non-display period. In a display period, the circuit 31 supplies display data to a signal electrode driving circuit 36 via the signal line. The signal electrode driving circuit 36 selects pulse signals having pulse widths corresponding to pulse width setting data according to display data to impress them to the liquid crystal display element 11.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device and a driving method for displaying a gradation or a color according to an applied voltage,
Especially, display gradation or color change (color shift) due to temperature change
The present invention relates to a liquid crystal display device and a driving method capable of reducing power consumption.

[0002]

2. Description of the Related Art A birefringence control type color liquid crystal display device is known in which an electric field is applied to a liquid crystal to deform the alignment of liquid crystal molecules and a color image is displayed by utilizing a change in birefringence generated at that time. There is. This type of liquid crystal display element is generally a PWM
Driving is performed by changing the effective value of the applied voltage by adjusting the pulse width of the pulse voltage applied to the liquid crystal.

[0003]

FIG. 10 shows the relationship between the applied voltage and the display color of this type of color liquid crystal display element, the horizontal axis shows the applied voltage, and the vertical axis shows the display gradation, that is, the change in the display color. Indicates. The solid line shows the color change at 25 ° C., the dotted line shows the color change at 40 ° C., and the alternate long and short dash line shows the color change at 0 ° C. As shown in the figure, the birefringence control type color liquid crystal display element stabilizes a color image in an environment where the temperature changes drastically because the display color changes depending on the temperature even when the same effective voltage is applied. There was a problem that it could not be displayed.

In order to compensate for such color shift, it may be possible to adjust the power supply voltage. However, it is difficult to adjust the power supply voltage each time the temperature changes. Further, in the method of adjusting the power supply voltage, the adjustment is performed at an equal rate for all display colors. However, there is a problem in that the degree of color misregistration due to temperature differs for each color, and it is not possible to perform fine adjustment for each gradation according to the characteristics of the liquid crystal.

The present invention has been made in view of the above circumstances, and an object thereof is to provide a liquid crystal display device in which an applied voltage can be arbitrarily set. Another object of the present invention is to reduce changes in display gradation or display color due to temperature changes in a liquid crystal display device in which display gradation changes according to applied voltage.

[0006]

In order to achieve the above object, a liquid crystal display device according to a first aspect of the present invention includes a liquid crystal display element whose display changes according to an applied voltage, and the liquid crystal display element. A pulse width data storage unit for storing pulse width data indicating the pulse widths of a plurality of pulse signals to be applied, a pulse width data setting unit for setting the pulse width data in the pulse width data storage unit, and a display image are defined. Display data storing means for storing the display data, and driving means for applying to the liquid crystal display element a pulse signal having a pulse width indicated by the pulse width data, the pulse signal corresponding to the display data. The pulse width of the pulse signal applied to the liquid crystal display element can be changed by changing the pulse width data.

In a liquid crystal display device according to a second aspect of the present invention, a liquid crystal display element whose display changes with respect to the same effective applied voltage according to a temperature change, and a temperature measuring means for measuring the temperature of the liquid crystal display element. And output means for outputting pulse width data indicating the pulse width of each pulse signal applied to the liquid crystal display element in accordance with the temperature measured by the temperature measuring means, and storing display data defining a display image. Means, and means for applying a pulse signal corresponding to the display data and having a pulse width indicated by the pulse width data to the liquid crystal display element.

In the liquid crystal display device according to the third aspect of the present invention, an image is displayed by selecting one from pulse signals having a plurality of predetermined pulse widths and applying it to the liquid crystal display element. The liquid crystal display device includes register means for storing display data for at least one scanning line and a memory for storing pulse width data, and generates a pulse signal having a pulse width indicated by the pulse width data stored in the memory. Pulse generating means, selecting means for selecting one of the plurality of pulse signals corresponding to the display data according to the display data stored in the register means, and common to the pulse generating means and the register means. A signal line connected to the pulse generation means is connected to the signal line and is connected to the signal line via the signal line during a non-display period. Transfer the pulse width data, characterized in that it comprises a data supply means for transferring said display data to said register means via the signal lines during the display period.

A liquid crystal display device according to a fourth aspect of the present invention includes a liquid crystal display element, control data storage means for storing control data indicating effective values of a plurality of voltages applied to the liquid crystal display element, and an external device. A control data setting means for setting control data in the control data storage means and a display data storage means for storing display data defining a display image in a non-display period of the liquid crystal display element according to a control signal supplied from Driving means for applying to the liquid crystal of the liquid crystal display element a voltage signal having an effective value indicated by the control data stored in the control data storage means, the voltage signal corresponding to the display data. The effective voltage applied to the liquid crystal display element can be changed by changing the data.

In the method of driving a liquid crystal display element according to a fifth aspect of the present invention, one is selected from a plurality of driving pulse signals having a plurality of predetermined pulse widths and applied to the liquid crystal display element. In the method of driving a liquid crystal display element for displaying gray scale by doing, receiving the control signal, outputting pulse width data according to the control signal,
A step of generating a pulse signal having a pulse width corresponding to the pulse width data, receiving display data, corresponding to the display data, and a pulse corresponding to the display data among the pulse signals generated by the pulse generating step. A step of selecting a signal, a step of applying the pulse signal selected by the selecting step to a liquid crystal display element,
It is characterized by including.

[0011]

With the liquid crystal display device according to the first aspect of the present invention and the driving method according to the fifth aspect, the pulse width of the pulse signal applied to the liquid crystal is arbitrarily set by adjusting the pulse width data. However, the effective value of the applied voltage can be adjusted. Therefore, fluctuations in the alignment of liquid crystal molecules due to external factors, etc.
By appropriately rewriting the pulse width data stored in the pulse width data storage unit, variations and the like can be suppressed, display gradation and display color can be maintained constant, and high quality display can be obtained.

When the temperature of the liquid crystal display element changes, the alignment state of the liquid crystal changes, and the display changes. In this case, the color change due to temperature change can be reduced by adjusting the pulse width of the pulse applied to the liquid crystal so that the desired alignment state can be obtained. Therefore, according to the liquid crystal display element of the second aspect of the present invention, the pulse width data is adjusted according to the temperature, and the pulse width is adjusted so as to compensate the temperature change.

According to the liquid crystal display device of the third aspect of the present invention, the pulse width setting data is transferred from the data supplying means to the pulse generating means via the signal line in the non-display period, and the display period is changed. Then, display data is transferred to the register means via the signal line. Since the signal line is shared, the wiring area can be reduced and CO
This is effective when the arrangement area of G (chip on glass) and the like is limited. Further, since the pulse width data is transferred during the non-display period and the display data is transferred during the display period, it is possible to avoid data collision and prevent the display image from being adversely affected.

Further, according to the liquid crystal display device of the fourth aspect of the present invention, the effective value of the voltage applied to the liquid crystal can be adjusted appropriately by adjusting the control data.

[0015]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A liquid crystal display device and a driving method according to an embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a sectional view showing the structure of a liquid crystal display element 11 of this embodiment. In FIG. 1, the liquid crystal cell 12 is the upper glass substrate 1
3 and the lower glass substrate 14 are arranged so as to face each other with a minute gap (several .mu.m spacing) enclosing the liquid crystal layer therebetween. On the opposing surfaces of the glass substrates 13 and 14, a plurality of scanning electrodes (address lines) X made of a transparent conductive material such as ITO and a plurality of signal electrodes Y are arranged so as to intersect with each other.

The alignment films 17 and 18 are formed on the scanning electrodes X and the signal electrodes Y and have been subjected to an alignment treatment such as rubbing, so that the major axis direction of adjacent liquid crystal molecules is aligned with the alignment treatment direction. . The sealing material 19 is the upper and lower glass substrates 1.
The glass substrates 13 and 1 are arranged in the peripheral portion between 3 and 14.
A space between 4 is maintained at a predetermined interval, and liquid crystal is sealed in that region.

The liquid crystal layer 20 has liquid crystal molecules of 180 ° to 270.
It is twisted and oriented at a twist angle of °. The retardation plate 21 converts linearly polarized light transmitted through the upper polarizing plate 22 into elliptically polarized light, and its optical axis (fast axis or slow axis).
Are arranged so as to be slanted by a predetermined angle with respect to the transmission axis of the upper polarizing plate 22 adjacent to the retardation plate 21.
The upper polarizing plate 22 and the lower polarizing plate 23 block (absorb) the polarization component in the absorption axis direction of the incident light and transmit the polarization component in the transmission axis direction orthogonal thereto. The reflection plate 24 is provided on the lower surface of the lower polarization plate 23, and reflects the light that has entered from the upper polarization plate 22 and transmitted through the liquid crystal cell 12 and the lower polarization plate 23 to the liquid crystal cell 12 side.

FIGS. 2A to 2D show the alignment treatment direction of the liquid crystal cell 12, the optical axis of the retardation plate 21, and the polarizing plates 22 and 23.
An example of a combination of the transmission axes of is schematically shown in a plan view of each component. Straight lines 22a and 23a with double arrows in FIGS. 2A and 2D indicate the transmission axes of the upper polarizing plate 22 and the lower polarizing plate 23, respectively, and the straight line 2 in FIG.
Reference numeral 1a indicates the optical axis of the retardation plate 21.

A straight line 20b with a single arrow in FIG. 2 (C),
20c is the upper alignment film 17 and the lower alignment film 1 respectively.
8 shows the orientation processing direction applied to No. 8. Note that FIG.
The dashed-dotted line S in (D) is a reference line along the left-right direction of the display surface, and is provided for convenience of description. As shown in FIG. 2C, the alignment treatment directions 20b and 20c are different from the reference line S.
Are set in directions opposite to each other by a predetermined angle θ3, whereby the liquid crystal molecules are directed from the lower glass substrate 14 side toward the upper glass substrate 13 side by an arrow θ4.
The twisted orientation is in the angle and direction indicated by.

The optical axis 2 of the retardation plate 21 shown in FIG.
Here, 1a is a slow axis and intersects the reference line S obliquely with a predetermined inclination θ2. Furthermore, FIG.
As shown in (A) and (D), in this embodiment, the transmission axes 22a and 23a of the upper and lower polarizing plates 22 and 23 are
It is inclined by θ1 and θ5 with respect to the reference line S, respectively.

Each of the above angles θ1, θ2, θ3, θ4,
θ5 is, for example, 95 °, 140 °, 35 °, 250
The angle is set to 80 °. The retardation of the retardation plate 21 is set to about 430 nm, and the liquid crystal layer 20
Has an optical anisotropy Δn of about 0.13 and a liquid crystal layer thickness d of 6.8.
About μm (hence the retardation Δn · d is 884n
m)).

Light incident on the liquid crystal display element 11 from above in FIG. 1 is converted to linearly polarized light by passing through the upper polarizing plate 22. In the process of transmitting the linearly polarized light, the linearly polarized light undergoes a birefringence effect according to the optical arrangement conditions such as the position of the optical axis 21a of the retardation plate 21 and the retardation value,
It becomes elliptically polarized light having a different polarization state for each wavelength. While passing through the liquid crystal cell 12, the elliptically polarized light is subjected to a birefringence effect according to the optical arrangement condition and the retardation value of the liquid crystal cell 12, the polarization state of the elliptically polarized light further changes, and the elliptically polarized light is reflected by the lower polarizing plate 23. Incident. Therefore, the linearly polarized light emitted from the lower polarizing plate 23 is in a state of being colored in the color of the wavelength light having a large polarization component in the transmission axis 23a direction of the lower polarizing plate 23. The hue is mainly the retardation value of the retardation plate 21 and the liquid crystal cell 1.
And the retardation value of 2.

The light transmitted through the lower polarizing plate 23 is reflected by the reflecting plate 2.
The light is reflected at 4, and is emitted to the upper surface side of the liquid crystal display element 11 through a route opposite to the above-described optical route, and a display color corresponding to the wavelength distribution of the emitted light is obtained. The retardation value of the liquid crystal cell 12 is determined by the alignment state of liquid crystal molecules. Therefore, it is possible to display an arbitrary color by changing the voltage value applied between the scanning electrode X and the signal electrode Y of the liquid crystal cell 12 to change the alignment state of the liquid crystal molecules.

The alignment state of liquid crystal molecules changes with temperature. Therefore, even when the same effective voltage is applied to the liquid crystal display element 11, the display color varies depending on the temperature, for example, as shown in FIG. In the example of FIG. 3, 2
At around 5 ° C, the effective applied voltage is VB, VG, VR (VB
>VG> VR), blue, green, and red are displayed respectively, and when the temperature rises to 40 ° C., the effective applied voltage is VB ′ (<V
B), VG '(<VG), and VR'(<VR) display blue, green, and red, respectively.

Therefore, for example, when displaying blue, green and red, when the temperature is around 25 ° C., the liquid crystal display element 11 is set so that the effective applied voltage in one frame becomes VB, VG and VR. To drive. When the temperature is around 40 ° C., the effective applied voltage in one frame is VB ′, VG ′, V
By driving the liquid crystal display element 11 so as to be R ′, it is possible to reduce color shift due to temperature change.

Therefore, in this embodiment, by controlling the pulse width of the pulse signal applied to each signal electrode Y of the liquid crystal display element 11 according to the temperature change, the effective applied voltage is increased according to the temperature rise. The color shift is reduced and the color shift is suppressed to such an extent that there is no practical problem.

Next, the structure of the drive circuit for the liquid crystal display element 11 having the above structure will be described with reference to FIG. In FIG.
The liquid crystal display element 11 has the configuration described with reference to FIGS. The display control circuit 31 includes a CPU and its peripheral circuits and controls the operation of the entire liquid crystal display device, and generates display data and various control clock signals. Particularly, as a characteristic configuration of this embodiment,
As shown in FIG. 5, pulse width data indicating pulse widths of gradation signals (driving pulse signals) P _{0 to} P ₃ for obtaining four display gradations is stored for each temperature.

The temperature sensor 43 is composed of a thermistor, a thermocouple, etc., and outputs an analog signal corresponding to the temperature of the liquid crystal display element 11. The output signal of the temperature sensor 43 is amplified by the amplifier 44, converted into digital temperature data by the A / D converter 45, and supplied to the display control circuit 31.

The liquid crystal power supply circuit 32 generates the voltages V1 to V5 necessary for driving the liquid crystal display element 11. The scan electrode drive circuit 33 is for supplying a drive signal to the scan electrodes X, and includes a shift register 34 and an analog multiplexer 35. The shift register 34 has the number of stages corresponding to the number of scan electrodes X, and the display control circuit 3
The vertical scanning start signal SA supplied from 1 is sequentially shifted according to the vertical shift clock SB supplied from the display control circuit 31, and the signals XA _{1 to} XA _m that become H level sequentially for one horizontal scanning period are output. Analog multiplexer 3
5 are signals XA ₁ to XA output from the shift register 34
_{According to m} and the polarity of the frame inversion signal SC supplied from the display control circuit 31, the positive or negative selection voltage or non-selection voltage supplied from the liquid crystal power supply circuit 32 is selected, and the scan electrode X of the liquid crystal display element 11 is selected. _{1 to} X _m .

On the other hand, the signal electrode driving circuit 36 includes a gradation signal generating circuit 37, a shift register 38, a data latch circuit 39, a gradation signal synthesizing circuit 40, and a level shifter 4.
1 and an analog multiplexer 42. The gradation signal generation circuit 37 generates a pulse signal having a different pulse width for each display gradation and temperature. The configuration and operation of the gradation signal generating circuit 37 will be described later with reference to FIG.

The shift register 38 includes the liquid crystal display element 11
The horizontal scanning start signal (sampling start signal) SF supplied from the display control circuit 31 is sequentially shifted in accordance with the data transfer clock SE supplied from the display control circuit 31. And sequentially output signals that become H level for one pixel period. The data latch circuit 39 supplies 2-bit display data D ₀ , which is supplied from the display control circuit 31 and indicates the display gradation of each pixel,
D ₁ is sequentially latched according to the output signal of the shift register 38.

The gradation signal synthesizing circuit 40 is provided with the 2-bit display data D of each pixel latched by the data latch circuit 39.
4 supplied from the gradation signal generating circuit 37 in accordance with ₀ , D ₁
One of the two gradation signals (pulse signals) P _{0 to} P ₃ is selected and output. The level shifter 41 converts the signal of the voltage of the signal processing system output from the gradation signal synthesizing circuit 40 into the voltage of the drive voltage system applied to the liquid crystal display element 11 and outputs it. The analog multiplexer 42 is a level shifter 41.
The voltage output from the liquid crystal power supply circuit 32 is selected in accordance with the output signal of 1 and is applied to the corresponding signal electrode Y of the liquid crystal display element 11.

The gradation signal generating circuit 37, as shown in FIG. 6, has the first to fourth shift registers 5 each having 8 bits.
1 to 54 are provided. A signal line for transferring display data D ₀ is connected to the serial input terminal SI of the second shift register 52. The serial output terminal SO of the second shift register 52 is connected to the serial input terminal SI of the first shift register 51. Further, the display data D ₁ is input to the serial input terminal SI of the fourth shift register 54.
A signal line for transfer is connected. The serial output terminal SO of the fourth shift register 54 is connected to the serial input terminal SI of the third shift register 53. Further, the data transfer clock SE and the shift enable signal SN are supplied from the display control circuit 31 to the first to fourth shift registers 51 to 54.

8-bit pulse width data PD _{0 to} PD ₃ (S ₀ held by the first to fourth shift registers 51 to 54)
_{~S 7, S 8 ~S 15,} S 16 ~S 23, S 24 ~S 31) is supplied to the data input terminal BT of the first to fourth coincidence detecting circuit 55 to 58 in parallel. First to fourth coincidence detection circuits 55
The output of the 8-bit counter 59 is supplied to the data input terminals AT of -58. The counter 59 counts the data transfer clock SE output from the display control circuit 31.

Output terminals of the first to fourth coincidence detection circuits 55 to 58 are connected to reset terminals RT of SR latches (set / reset flip-flops) 61 to 64. SR
The pulse setting signal SH is supplied from the display control circuit 31 to the set terminals ST of the latches 61 to 64. The pulse setting signal SH is a pulse signal output at the start of each horizontal scanning period.

In such a structure, when each horizontal scanning period starts, the display control circuit 31 causes the pulse setting signal SH.
And the first to fourth SR latches 61 to 64 output high level signals. Further, the counter 59 is reset, and thereafter, the data transfer clock SE is counted.
When the pulse width data held in the first to fourth shift registers 51 to 54 and the count value of the counter 59 match, the first to fourth match detection circuits 55 to 58 output match signals. The match signal resets the first to fourth SR latches 61 to 64, and the outputs thereof are at the L level. That is, the first to fourth SR latches 61 to 64
Outputs a pulse signal having a pulse width corresponding to the pulse width data stored in the first to fourth shift registers 51 to 54.

In this embodiment, 2-bit display data D ₀ and D ₁ are supplied to the data latch circuit 39 and the gradation signal generating circuit 37 which transfers the pulse width data by using the signal line. Therefore, it is necessary to avoid collision between the display data and the pulse width data on the signal line. Normal,
Images of several scanning lines at the beginning of each display frame and images of several scanning lines at the end are not displayed. Therefore, in this embodiment, the display control circuit 31 serially transfers and sets the pulse width data to the first to fourth shift registers 51 to 54 during the first horizontal scanning period of each display frame,
In other horizontal scanning periods, 2-bit display data D ₀ and D ₁
In parallel and supplied to the data latch circuit 39.

Next, the operation of the liquid crystal display device having the above structure will be described. The display control circuit 31 supplies a vertical scanning start signal SA having a pulse width of one line period (one horizontal scanning period) as shown in FIG. 7A at the start timing of each display frame. The vertical scanning start signal SA is supplied from the display control circuit 31, and is taken into the shift register 34 and sequentially shifted in response to the vertical shift clock SB shown in FIG. The shift register 34 is (C)
To (E) output selection signals XA _{1 to} XA _m . The analog multiplexer 42 selects _one of the power supply voltages V ₁ , V ₃ , and V ₅ by the selection signals XA _{1 to} XA _m and the frame inversion signal SC shown in (F), and the liquid crystal display element 11 is selected.
Is applied to the scan electrode X of. That is, as shown in (G) to (I), the voltage V ₁ or V ₅ whose polarity is inverted for each frame is applied to the scan electrodes X _{1 to} X _m in the selected state, and the scan electrode X in the non-selected state is applied. Is applied with a non-selection voltage of voltage V ₃ .

Next, the operation of the signal line drive circuit 36 will be described. The shift register 38 has a number of digits corresponding to the number of signal electrodes Y of the liquid crystal display element 11. When each horizontal scanning period starts, the display control circuit 31 sets the vertical shift clock SB to the low level as shown in FIG.
A data transfer start signal having a pulse width of one cycle of the data transfer clock SE is output as shown in FIGS. 8B and 8C. The shift register 38 uses the data transfer clock S
The horizontal scanning start signal SF is sequentially shifted according to E. In addition, the display control circuit 31 synchronizes with the data transfer clock SE, as shown in FIG. 8D, to the 0th pixel, the 1st ... 2-bit display data D ₀ and D ₁ indicating the gradation to be displayed (that is, the voltage applied to each signal electrode Y _{1 to} Y _n ) is output.

According to the output of the shift register 38, the data latch circuit 40 sequentially latches the display data for the 0th to nth pixels shown in FIG. 8D. As described above, the grayscale signal generation circuit 37 has grayscale signals P _{0 to} P having pulse widths necessary for displaying grayscales of four stages instructed by 2-bit display data of D ₀ and D _{1. 3} is output as shown in (E) to (H). Note that in FIG. 8E, the gradation signal P
Pulse width of ₀ is 0. In FIG. 8H, the gradation signal P ₃
Has a pulse width of 1 horizontal scanning period.

When each horizontal scanning period starts, the display data of each pixel latched by the data latch circuit 39 in the immediately preceding horizontal scanning period is latched in parallel by the gradation signal synthesizing circuit 40.

The gradation signal synthesizing circuit 40 selects and outputs the corresponding one of the gradation signals P _{0 to} P ₃ according to the latched display data. The gradation signals P _{0 to} P ₃ output from the gradation signal synthesis circuit 40 are signals having a signal processing system voltage, and the level shifter 41 converts this into a signal having a driving system voltage. The analog multiplexer 42 receives the voltage V supplied from the liquid crystal power supply circuit 32 according to the frame inversion signal SC and the pulse signal supplied from the level shifter 41.
2 or V4 is selected and applied as shown in FIG. The application time is the period of the pulse width of each pulse.

A voltage corresponding to the difference between the voltages of the scan electrodes X _{1 to} X _m and the signal electrodes Y _{1 to} Y _n is applied to the liquid crystal of each pixel,
For example, in the pixel at the intersection of the scan electrode X ₁ and the signal electrode Y ₁ ,
The voltage shown in FIG. 7 (J) is applied.

Next, the setting of pulse width data in the operation of the first horizontal scanning period of each display frame will be described. In the first horizontal scanning period of each display frame, the display control circuit 3
1 is an amplifier 4 for detecting the temperature detected by the temperature sensor 43.
4 and the A / D converter 45. The display control circuit 31 reads out the pulse width data corresponding to the temperature from the table shown in FIG. 5, and serially outputs the data indicating the pulse width via the signal line. Further, the shift enable signal SN is activated.

In this example, the 0th bit (LSB) S ₀ to the 7th bit (MSB) of the pulse width data PD ₀ indicating the pulse width of the gradation signal P ₀ is transmitted via the signal line for transferring the display data D _0. ) Output S ₇ . At the same time, the 0th bit S ₁₆ to the 7th bit S ₂₃ of the pulse width data PD ₂ indicating the pulse width of the gradation signal P ₂ are output via the signal line for transferring the display data D ₁ . Then, the tone signal P ₁ and the 0 bit to the 7-bit S ₈ to S of the pulse width of P ₃ data PD _1, PD _3
15, S ₂₄ ~S ₃₁ to transfer through respective signal lines.

These pulse width data S _{0 to} S ₃₁ are shown in FIG.
As shown in (D), the shift registers 51 to 54 are sequentially transferred in accordance with the data transfer clock SE. When each pulse width data is set at a predetermined position in the shift registers 51 to 54, the display control circuit 31 turns off the shift enable signal SN, puts it in the shift desnable state, and ends the transfer.

When the second scanning period starts, the display control circuit 31 outputs the pulse setting signal SH as shown in FIG. 9F, and the first to fourth SR latches 61 to 64 output the pulse signals and the counter. Reset 59. The counter 59 counts the data transfer clock SE and sequentially updates the count value J. When the count value J matches the pulse width data PD _{0 to} PD ₃ stored in the first to fourth shift registers 51 to 54, the first to fourth match detection circuits 55 to 58 output a match signal, The first to fourth SR latches 61 to 64 are reset, and the gradation signals P _{0 to} P ₃ are turned off (low level). Therefore, the first of each display frame
Grayscale signals P _{0 to} P ₃ having pulse widths corresponding to the pulse width data PD _{0 to} PD ₃ set in the first to fourth shift registers 51 to 54 are output during the scanning period.

For example, the pulse width data is 10 (0A _H ).
In this case, as shown in FIG. 9G, the pulse is continuously output until the ninth clock ends. When the pulse width data is 12 (0C _H ), pulses are continuously output until the 11th clock ends, as shown in FIG. 9H. After that, the same operation is repeated for each horizontal scanning period.

As described above, according to this embodiment, the pulse width of the pulse voltage applied to the scanning electrode X of the liquid crystal display element 11 is adjusted according to the temperature change, so that it is independent of the temperature change. Instead, the desired color indicated by the display data can be displayed. Further, since the pulse width data is set in the gradation signal generating circuit 37 by utilizing the signal line for display data transfer, a liquid crystal display element having a limited wiring area, for example, a COG (chip on glass) system. Is particularly effective for the drive circuit of. Moreover, since the pulse width data is transferred during the non-display period, the pulse width data and the display data do not collide on the signal line.

The pulse width to be set according to the temperature and the display data differs depending on the characteristics of the liquid crystal display element 11, the voltage generated by the liquid crystal power supply circuit 32, etc., and the optimum value is obtained by experiments and the like, and is shown in FIG. Set on the table. In the above embodiment, the display data is 2 bits and the pulse width data has 8 bits, but the number of these bits is arbitrary.

In the above embodiment, the liquid crystal display element 11
Although the pulse width is adjusted according to the temperature, the pulse width may be lengthened, for example, when the voltage of the battery drops in the case of a battery-driven device. In this case, the pulse width data corresponding to the power supply voltage is stored in the table in the display control circuit 31, the power supply voltage detection circuit is arranged, the pulse width data corresponding to the detection value of the power supply voltage detection circuit is read, and the shift register 51 is read. Set to ~ 54. That is, the purpose of pulse width adjustment is not limited to temperature correction, but RG
It can be used for various purposes such as B color correction and retardation correction. It can also be used to correct the transmittance of a color filter of a color liquid crystal display device using the color filter. The pulse width may be set at the time of factory shipment.

In the above-mentioned embodiment, the pulse width data is transferred to the shift registers 51 to 54 during the first horizontal scanning period of each frame.
However, the timing of setting is arbitrary, and it can be set to any non-display period such as the last horizontal scanning period of each frame and the vertical blanking period. Further, in the above embodiment, the effective voltage applied to the liquid crystal is changed by changing the pulse width, but the voltage of the pulse applied to the signal electrodes Y _{1 to} Y _n may be adjusted. Also in this case, the voltage of the pulse applied to the signal electrode X is adjusted according to the data stored in the shift registers 51 to 54.

The structure of the liquid crystal display element 11 illustrated in the above embodiment is an example, and any structure can be adopted. Further, not limited to the twisted nematic liquid crystal display element, it can be widely applied to all liquid crystal display elements of a type in which the display color is changed by controlling the birefringence of light passing through the element by controlling the applied voltage. The liquid crystal cell 12 in the embodiment can be applied to a liquid crystal display element using a liquid crystal cell of vertical molecule alignment type, parallel molecule alignment type, hybrid molecule alignment type, or the like. In the above embodiment, an example of the color display element in which the display color changes as the gradation corresponding to the applied voltage is shown. However, the present invention is a monochrome display in which the hue does not change in response to the applied voltage and only the brightness changes. It is similarly applicable to the type of liquid crystal display element. In the above embodiment, an example of using the reflection type liquid crystal display element 11 provided with the reflection plate 24 has been described, but the present invention is also applicable to a transmission type liquid crystal display element.

[0054]

As described above, according to the present invention, the pulse width can be arbitrarily set by the pulse width data. Therefore, for example, the pulse width can be controlled according to the temperature change, the voltage change, etc. of the liquid crystal display element to stably display an image of high display quality.

[Brief description of drawings]

FIG. 1 is a sectional view of a liquid crystal display element according to an embodiment of the present invention.

FIG. 2 is a diagram showing a relationship between an alignment direction of liquid crystal molecules and a transmission axis direction of a polarizing plate in the liquid crystal display element shown in FIG.

FIG. 3 is a diagram showing a relationship among temperature, applied voltage, and display color of the liquid crystal display element shown in FIG.

FIG. 4 is a diagram showing a configuration of a liquid crystal display device including a drive circuit for the liquid crystal display element shown in FIG.

5 is a diagram showing an example of a table stored in the display control circuit shown in FIG.

FIG. 6 is a diagram showing an example of a circuit configuration of a gradation signal generation circuit.

7A to 7K are timing charts for explaining the operation of the liquid crystal display device shown in FIG.

8A to 8H are timing charts for explaining the operation of the liquid crystal display device shown in FIG.

9A to 9H are timing charts for explaining the operation of the liquid crystal display device shown in FIG.

FIG. 10 is a diagram showing the relationship between temperature, applied voltage, and display color of a color liquid crystal display element using a conventional STN liquid crystal display element.

[Explanation of symbols]

11 ... Liquid crystal display element (liquid crystal panel), 12 ... Liquid crystal cell, 13 ... Upper glass substrate, 14 ... Lower glass substrate,
17 ... Alignment film, 18 ... Alignment film, 19 ... Sealing material, 2
0 ... Liquid crystal layer, 21 ... Retardation plate, 22 ... Upper polarizing plate,
23 ... Lower polarization plate, 24 ... Reflector plate, 31 ... Display control circuit, 32 ... Liquid crystal power supply circuit, 33 ... Scan electrode drive circuit, 34 ... Shift register, 35 ... ..Analog multiplexer, 36 ... Signal electrode drive circuit, 37 ... Gradation signal generating circuit, 38 ... Shift register, 39 ... Data latch circuit, 40 ... Gradation signal synthesizing circuit, 41 ... Level shifter, 42 ... Analog multiplexer, 43 ... Temperature center, 44 ... Amplifier, 45 ... A / D converter, X ... Scan electrode, Y ... Signal electrode, D ₀ , D ₁ ... Display data, SA ...
・ Vertical scan start signal, SB ... Vertical shift clock, SC
... Frame inversion signal, SE ... Data transfer clock, S
F: horizontal scanning start signal, SH: pulse setting signal, SN
... Shift enable signals

Claims (14)

[Claims] 1. A liquid crystal display element whose display changes according to an applied voltage, and pulse width data storage means for storing pulse width data indicating the pulse widths of a plurality of pulse signals applied to the liquid crystal display element. Pulse width data setting means for setting the pulse width data in the pulse width data storage means, display data storage means for storing display data defining a display image, and a pulse having a pulse width designated by the pulse width data A driving means for applying to the liquid crystal display element a signal corresponding to the display data from among the signals; and changing the pulse width data, the pulse width of the pulse signal applied to the liquid crystal display element can be changed. A liquid crystal display device characterized in that 2. The liquid crystal according to claim 1, wherein the pulse width data setting means includes a sensor and means for setting pulse width data corresponding to the output of the sensor in the pulse width data storage means. Display device. 3. The liquid crystal display element is a birefringence control type liquid crystal display element in which a display color changes according to a temperature change, and the sensor is a temperature sensor for measuring temperature. 2. The liquid crystal display device according to item 2. 4. The pulse width data setting means comprises a table that stores a set of pulse width data corresponding to the output of the sensor, reads the pulse width data corresponding to the output of the sensor from the table, and outputs the pulse The liquid crystal display device according to claim 2, wherein the liquid crystal display device is set in the width data storage means. 5. Display data setting means for setting display data in the display data storage means, common to the pulse width data storage means, the display data storage means, the pulse width data setting means and the display data setting means. Further comprising a connected signal line, wherein the pulse width data setting means stores the pulse width data in the pulse width data storage means via the signal line during a non-display period of the liquid crystal display element, 5. The display data setting means stores the display data in the display data storage means via the signal line during the display period of the liquid crystal display element. Liquid crystal display device. 6. The driving means includes a counter for counting a predetermined clock signal, a comparing means for comparing the pulse width data stored in the storing means with the count value of the counter, and a comparing means for comparing the comparing means. Pulse output means for outputting a pulse signal having a pulse width indicated by the pulse width data by controlling on / off of the pulse signal according to a result; and among the pulse signals obtained by the pulse output means, 6. A means for selecting one corresponding to display data and applying the selected one to the liquid crystal display device, the display device further comprising:
Liquid crystal display device according to item 1. 7. The drive means displays the image designated by the display data according to the display data setting means for setting the display data in the display data storage means and the display data stored in the display data storage means. And a means for selecting the pulse signal of the pulse output means from the output pulse signals of the pulse output means, and a means for converting the signal level of the selected pulse signal and applying it to the liquid crystal display element. 7. The liquid crystal display device according to any one of 1 to 6. 8. A liquid crystal display element, the display of which changes with respect to the same effective applied voltage according to a temperature change, temperature measuring means for measuring temperature, and the liquid crystal according to the temperature measured by the temperature measuring means. Output means for outputting pulse width data indicating the pulse width of each pulse signal applied to the display element, means for storing display data defining a display image, and the pulse width data corresponding to the display data Means for applying to the liquid crystal display element a pulse signal having a pulse width instructed by the liquid crystal display device. 9. A liquid crystal display device for displaying an image by selecting one of pulse signals having a plurality of predetermined pulse widths and applying the selected pulse signal to a liquid crystal display element, and displaying at least one scanning line. A register unit for storing data, a memory for storing the pulse width data, a pulse generating unit for generating a pulse signal having a pulse width designated by the pulse width data stored in the memory, and a pulse generating unit for storing the pulse signal in the register unit. Selecting means for selecting one of the plurality of pulse signals corresponding to the display data according to the display data, a signal line commonly connected to the pulse generating means and the register means, and connected to the signal line The pulse width data is transferred to the pulse generating means via the signal line during the non-display period, and the pulse width data is transferred during the display period. The liquid crystal display device characterized by comprising: a data supply means for transferring said display data to said register means via the No. line. 10. A liquid crystal display element, a control data storage means for storing control data indicating effective values of a plurality of voltages applied to the liquid crystal display element, and the liquid crystal display element according to a control signal supplied from the outside. Control data setting means for setting control data in the control data storage means, display data storage means for storing display data defining a display image, and control data stored in the control data storage means Driving means for applying to the liquid crystal of the liquid crystal display element one of the voltage signals having an effective value indicated by the following, by changing the control data to the liquid crystal display element. A liquid crystal display device characterized in that an effective voltage to be applied can be changed. 11. The display data setting means for setting display data in the display data storage means, the control data setting means, the display data setting means, the control data storage means, and the display data storage means in common. And a signal line connected to the control data setting means, wherein the control data setting means stores the control data in the control data storage means via the signal line during a non-display period of the liquid crystal display element, 11. The liquid crystal display device according to claim 10, wherein the means stores the display data in the display data storage means via the signal line during a display period of the liquid crystal display element. 12. The liquid crystal display element is composed of a color liquid crystal display element which controls the birefringence of liquid crystal by an applied voltage to display a color.
12. The liquid crystal display device according to any one of 8, 910 and 11. 13. A method of driving a liquid crystal display element, wherein one of a plurality of driving pulse signals having a plurality of predetermined pulse widths is selected and applied to the liquid crystal display element to display a gray scale. Receiving the control signal and outputting pulse width data according to the control signal; generating a pulse signal having a pulse width corresponding to the pulse width data; receiving display data and corresponding to the display data; A step of selecting a pulse signal corresponding to the display data from the pulse signals generated by the pulse generating step; and a step of applying the pulse signal selected by the selecting step to a liquid crystal display element. And a method for driving a liquid crystal display device. 14. The liquid crystal display element according to claim 13, wherein the liquid crystal display element is composed of a color liquid crystal display element which controls birefringence of liquid crystal by an applied voltage to display a color. Driving method.