JPH0823153A - Formation of interconnection - Google Patents

Abstract

PURPOSE:To reduce the occupying area of interconnection on the surface of a substrate and reduce interconnection resistance by forming a recessed groove on the surface of the substrate, forming a first interconnection layer in the groove and providing a second interconnection layer along the surface of the substrate so as to connect the first interconnection layer with an electronic component element. CONSTITUTION:Insulating SiO2 films are formed on both front and rear planes of a substrate 1, and a base layer 3 for plating films are provided on the SiO2 film. On the base layer 3, a buckling body 4, an interconnection layer 5 and a flattening layer 6 are formed by aligning them almost on the same flat plane. The interconnection layer 5 is formed of a first interconnection layer 5a in a recessed groove 9 formed on the surface of the substrate 1 and a second interconnection layer 5b formed along the surface of the substrate 1, and a spacer layer 7 and a nozzle plate 8 are successively formed on the top plane of the flattening layer 6. Thus, the occupying area of the interconnection on the surface of the substrate 1 is reduced, and the interconnection resistance is reduced.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wiring forming method used for forming a wiring layer on a substrate or the like on which electronic component elements such as ink jet heads are formed.

[0002]

2. Description of the Related Art For example, a solar cell manufactured by using a Si substrate, a bimetal type ink jet head described in Japanese Patent Laid-Open No. 30543/1993, or a buckling structure type ink jet head is formed on a substrate. A wiring layer having a predetermined pattern is provided on the substrate by a planar process in order to take out an electric current from each of the functional element portions to the outside or supply the electric current.

As such a wiring layer, for example, in a solar cell, in order to minimize the loss of generated power,
It is necessary to keep the wiring resistance as low as possible. Further, also in the above inkjet head, it is necessary to similarly reduce the wiring resistance in order to prevent generation of Joule heat in the wiring layer when a relatively large current supplied through the wiring layer flows. .

By the way, in order to reduce the wiring resistance, A
It is conceivable to use a low resistance material such as u, but in this case, the material ratio becomes remarkably expensive, and the resistance can be reduced to about 1/2 of that of a normally used material. Absent.

Therefore, conventionally, the resistance of the wiring layer is reduced by increasing the wiring area. However, in the case of the inkjet head described above,
In order to integrate a large number of heads on the substrate with high density, it is necessary to make the wiring area as small as possible. Further, in the case of a solar cell, there is a trade-off relationship between the wiring area and the execution cell area, and if the wiring area is increased, the execution cell area becomes smaller. Therefore, also in this case, it is necessary to reduce the wiring area in order to secure the cell area.

Therefore, as an electronic component which requires a large current and which can be applied as a countermeasure when the wiring area cannot be secured, for example, "Proceeding of 7th Internatio
nalConference on Solid-State Sensors and Actuators
(Published June 1993); pp. 60-65: "Pol
yimide-Based Processes For the Fablication of Thick
Electroplated Microstructures "discloses a structure in which a wiring for taking out a current on a substrate in a solar cell is formed in a thick film shape having a large aspect ratio.

In this case, a thick film of photosensitive polyimide is patterned on the solar cell by photolithography and then selective electroplating is performed to form a thick film of wiring on the substrate. That is, it is possible to reduce the wiring resistance on the substrate by increasing the thickness and increasing the cross-sectional area while keeping the planar wiring area small.

An example of the buckling structure type ink jet head constituted by increasing the thickness of the wiring layer as described above will be briefly described with reference to FIG.

As shown in the figure, in the ink jet head as an electronic component element, the buckling body 32 located above the ink supply hole 31a formed in the substrate 31 is energized to make the buckling body 32. Heats up and bends (buckles) upward due to thermal expansion. As a result, the ink in the ink chamber 33 above it is ejected from the nozzle 34.

In order to supply a current from the outside to the buckling member 32, a wiring layer 35 is further provided on the substrate 31, and this wiring layer 35 reduces the wiring resistance as described above. It is formed by increasing the thickness as much as possible.

[0011]

However, in the above ink jet head, as shown in FIG. 11, it is necessary to seal the front surface side of the ink chamber 33 with the nozzle plate 36 having the nozzle 34 formed therein. When the height of the wiring layer 35 is high, a step is formed in the spacer layer 37 that covers the wiring layer 35.

The formation of such a step reduces the patterning accuracy in photolithography when the spacer layer 37 is formed into a predetermined pattern, and as a result,
For example, the degree of integration is restricted. Further, a gap is likely to be formed on the lower surface of the nozzle plate 36 assembled on the spacer layer 37, making it difficult to completely seal the ink chamber 33. As a result, workability in the assembling process and the like is reduced so that the above-described gap is not generated.

As described above, when a wiring layer having a high height is formed on the surface of the substrate in a micromachine or the like, the workability and accuracy as described above in the subsequent post-process are deteriorated, which in turn lowers the productivity. Will cause the problem of doing.

On the other hand, also in the above-mentioned solar cell, when the wiring layer having a high height is provided on the surface of the substrate, there is no problem when the light is vertically irradiated, but when the light is obliquely incident. Naturally, the higher the height of the wiring layer, the more easily shadows are formed, and the efficiency of the solar cell decreases.

The present invention has been made in view of the above-mentioned conventional problems, and an object thereof is to occupy a small area on the surface of a substrate, reduce wiring resistance, and flatten the entire surface of the substrate. The present invention provides a wiring forming method which can improve the degree of integration of electronic component elements, productivity, and reduction of manufacturing cost.

[0016]

In order to achieve the above object, a wiring forming method according to claim 1 of the present invention provides a wiring for electrically connecting an electronic component element formed on a substrate to the outside. In the wiring forming method for forming on the substrate, a groove having a concave shape is formed on the surface of the substrate, a first wiring layer is formed in the groove, and then the first wiring layer is formed along the substrate surface. It is characterized in that a second wiring layer for connecting to is provided.

According to a second aspect of the present invention, there is provided a wiring forming method according to the first aspect.
In the method described above, a flattening layer having substantially the same thickness is formed at the same time as the formation of the second wiring layer in a region separated from the electronic component element region and the first and second wiring layer forming regions on the substrate surface. Is characterized by.

The wiring forming method according to claim 3 is the method according to claim 1.
Alternatively, the method described in 2 is characterized in that the substrate is single crystal silicon.

The wiring forming method according to claim 4 is the method according to claim 1.
Alternatively, the method described in 2 is characterized in that the substrate is a photosensitive glass.

[0020]

According to the wiring forming method of the first aspect, the first wiring layer provided in the concave groove formed on the substrate surface,
The second wiring layer provided along the surface of the substrate electrically connects the electronic component element formed on the substrate to the outside. Therefore, particularly in the first wiring layer, even when the wiring occupying area on the substrate surface is small, it is possible to increase the cross-sectional area and reduce the resistance according to the depth of the recessed groove. Accordingly, even if the area occupied by the entire wiring layer on the substrate surface is reduced and the height dimension of the second wiring layer is reduced, the wiring resistance of the entire wiring layer can be further reduced.

Further, since the height dimension of the second wiring layer located above the surface of the substrate can be made as small as possible, workability and productivity in the post-process such as assembly of the micromachine can be improved.

According to the method of claim 2, since the flattening layer having the same thickness is formed in the region other than the second wiring layer provided on the surface of the substrate when the second wiring layer is formed, the entire substrate is formed. There is no large step in the area. As a result, workability and productivity when assembling in a later step in the micromachine or the like can be further improved.

According to the method of claim 3, since the single crystal silicon is used as the substrate, the crystal orientation is set so that the etching rate from the surface to the depth direction is maximized, whereby the first wiring layer is formed. When the recessed groove for forming the is formed by etching, the side etch amount is suppressed,
As a result, since the deep recessed groove can be formed in an accurate pattern, the useless area on the substrate can be reduced and the element density can be increased.

According to the method of claim 4, since the photosensitive body glass is used as the substrate, a photoresist is applied when forming the concave groove for providing the first wiring layer having a predetermined pattern by, for example, photolithography. The step of patterning this later is not required, and it becomes possible to directly expose and pattern the substrate surface, and then perform etching to form a groove. As a result, the number of steps is reduced, and the overall manufacturing cost can be reduced.

[0025]

【Example】

[Embodiment 1] One embodiment of the present invention will be described with reference to FIGS.
The explanation is based on the following.

As shown in FIG. 1, a buckling structure type ink jet head H as an electronic component element according to this embodiment is formed on a substrate 1 made of single crystal Si [100]. SiO ₂ for insulation is formed on both front and back surfaces of this substrate 1.
The film 2 is formed, and S on the surface side (upper surface side in the figure)
A base layer 3 for forming a plated film is provided on the iO ₂ film 2. The buckling body 4, the wiring layer 5, and the flattening layer 6 are formed on the underlying layer 3 with their respective upper surfaces substantially on the same plane. Further, the buckling body 4, the wiring layer 5, and the flattening layer are formed. A spacer layer 7 and a nozzle plate 8 are sequentially provided on the upper surface of 6.

The substrate 1 and the Si on both front and back sides are formed on the substrate 1.
The ink supply port 1a penetrating the O ₂ film 2.2 is formed,
In the spacer layer 7 above the ink supply port 1a, an ink chamber 7a communicating with the ink supply port 1a is formed. Further, a nozzle plate 8 that closes the ink chamber 7a from above is provided with a nozzle hole 8a for ejecting ink that communicates with the ink chamber 7a.

The underlayer 3 is a layer provided to form the buckling body 4 and the wiring layer 5 by electroplating, and
It is made of a material such as i / Ta. The buckling body 4 is, for example, N
It is made of i or the like, and is provided at a position that partitions the ink supply port 1a and the ink chamber 7a. This buckling body 4 is shown in FIG.
As shown in, when the buckling member 4 is electrically connected to the wiring layer 5 and the buckling member 4 is energized from the outside through the wiring layer 5, the buckling member 4 causes a temperature rise due to Joule heat. As a result, upward bending deformation occurs.

The wiring layer 5 is composed of a first wiring layer 5a in a groove 9 formed in a concave shape on the surface of the substrate 1 and a second wiring layer 5b formed along the surface of the substrate 1. . The flattening layer 6 is a layer provided to reduce a step between the second wiring layer 5b and the surface of the substrate 1 after the second wiring layer 5b is formed. The flattening layer 6 will be described later. To do the second
It is formed of the same material as the wiring layer 5b. The spacer layer 7 is a layer for forming the ink chamber 7a, and is made of a high-viscosity resin such as polyimide.

As shown in FIG. 3, a large number of ink jet heads H are provided adjacent to each other on the same substrate 1 (for convenience, a structure having five ink jet heads H is shown in FIG. 3). Exemplify). In addition, as shown in FIG.
The wiring layers 5 are linearly provided on both sides of the wiring layer 5 and are connected to an external power source (not shown) at both ends of the wiring layer 5.

On the other hand, as shown in FIG. 4, the planarizing layer 6 surrounds the buckling body 4 and the wiring layer 5, and corresponds to a region other than the region where the buckling body 4 and the wiring layer 5 are formed. It is provided in a shape.

When an electric current is applied to the buckling body 4 from the outside through the wiring layer 5 in the ink jet head having the above structure, Joule heat is generated in the buckling body 4 and the temperature rises.
The buckling body 4 thermally expands due to this temperature rise. As a result, the portion of the buckling body 4 inside the ink chamber 7a is instantaneously curved (buckled) upward. As a result, the ink in the ink chamber 7a is ejected from the nozzle hole 8a.

Next, the manufacturing process of the ink jet head having the above structure will be described in order with reference to FIGS.

Step 1 ( Step of Forming Groove 9) First, as shown in FIG. 5A, single crystal Si [100]
The SiO ₂ films 11 and 11 (thickness 1 to 3 μm) are formed on both the front and back surfaces of the substrate 1 made of SiO ₂ by thermal oxidation. Next, a photoresist 12 is applied on the SiO ₂ film 11 on the front surface side of the substrate 1, and a groove forming pattern 12a is formed in the photoresist 12 by photolithography (FIG. 2B). After that, dry etching is performed to form the mask holes 11a at the time of anisotropic etching, which will be described later, in the SiO 2 film.
₂ Formed on the film 11 ((c) of the same figure).

After removing the photoresist 12, the substrate 1 is etched using the KOH aqueous solution through the mask holes 11a to form the wiring embedding grooves 9 (depth 5 to 100 microns). ((D) in the figure). Then, buffered hydrofluoric acid (BHF; H ₂ 0: H
F = 5 to 10: 1), and Si on both front and back surfaces of the substrate 1
The O ₂ films 11 and 11 are once removed ((e) in the figure).

In the etching of the substrate 1, the etching rate in the depth direction is higher than that in the side direction because the substrate 1 is single crystal Si having the [100] crystal orientation. As a result, side etching is suppressed and so-called anisotropic etching is performed. Therefore, as schematically shown in the figure, the mask hole 11a in the SiO ₂ film 11 is formed in a pattern that closely follows the pattern, and side etching hardly occurs.

Step 2 ( Step of forming SiO ₂ film 2 and ink supply port 1a) The SiO ₂ film 2 as an insulating film is formed on both front and back surfaces of the substrate 1.
2 (thickness 2 to 3 μm) is formed again by thermal oxidation ((f) in the same figure). After that, a photoresist 13 is applied to the back surface of the substrate 1, and a pattern 13a for an ink supply port is formed on the photoresist 13 by photolithography.
Are formed ((g) in the figure). Then, dry etching is performed using the photoresist 13 as a mask to open a mask hole 2a for etching the ink supply port in the SiO ₂ film 2, and the KOH aqueous solution is used to leave the rest of the substrate 1 in the same manner as described above. Until the thickness becomes 25 to 100 μm, anisotropic etching is performed on the substrate 1 through the mask hole 2a to form the ink supply hole 1a (FIG. 2H), and then the photoresist 13 is removed. .

Step 3 ( Step of forming sacrificial layer and base layer 3) For example, aluminum (thickness: 300 to 10000Å) is formed on the front surface side SiO ₂ film 2 of the substrate 1 by sputtering, and the buckling body described later is formed. 4 The movable sacrificial layer 14 is formed (FIG. 6A).

After that, a photoresist is applied on the sacrificial layer 14, and the photoresist 15 is patterned by photolithography (FIG. 7B). Using the photoresist 15 as a mask, wet etching is performed using, for example, an Al etchant to form the sacrificial layer 14 in a pattern shape corresponding to the buckling body 4 described later (FIG. 7C). Next, after removing the photoresist 15, a plating underlayer 3 made of, for example, Ni / Ta is formed on the entire surface of the substrate 1 by sputtering (FIG. 3D).

Step 4 ( Step of Forming First Wiring Layer 5a) Photoresist 1 is formed on the substrate 1 in a region other than the groove 9.
Cover with 6 ((e) in the figure). Then, the groove 9 is electroplated to form the first wiring layer 5a (FIG. 6 (f)). As this electroplating material, a material capable of thick film plating such as Au or Ni is selected. When performing the plating at this time, a leveling agent such as 2 butyne 1-4 diol is added to the plating bath for the purpose of flattening the plating surface. By this electroplating, the first wiring layer 5a
After forming, the photoresist 16 is removed.

Step 5 ( Step of forming buckling body 4, second wiring layer 5b and flattening layer 6) A photoresist is applied again, and the buckling body 4, second wiring layer 5b and flattening layer are formed by photolithography. The separation pattern 17 of No. 6 is formed ((g) in the same figure). Then, electroplating is performed again to form the buckling member 4, the second wiring layer 5b, and the flattening layer 6 between the separation patterns 17 (FIG. 7H). The material at this time is Ni, Ni alloy, Cu, C
o, etc. are selected from the viewpoint of generated energy and process.

By this step, the flattening layer 6 having almost the same thickness is formed in the region other than the buckling body 4 and the second wiring layer 5b except for these regions.

After that, the separation pattern 17 made of photoresist is peeled off, and then the underlayer 3 is further formed.
The portion exposed after the removal of the separation pattern 17 is removed by ion milling (FIG. 7A).
As a result, the flattening layer 6 includes the buckling body 4 and the second wiring layer 5b.
Electrically separated from.

Step 6 (Removal Step of Remaining Ink Supply Port 1a and Sacrificial Layer 14) From the back side of the substrate 1, the remaining part of the ink supply port 1a is removed, and the sacrificial layer 14 is removed (see FIG. b)). As a result, the buckling body 4 is floated from the surface of the substrate 1, and a space that allows the bending deformation of the buckling body 4 is formed on the lower side. As the sacrificial layer 14, in addition to the above-mentioned aluminum, a material having etching selectivity with a substrate material such as a metal such as zinc or an inorganic film such as silicate glass (PSG) containing phosphorus as an impurity. Can be used.

Step 7 (spacer layer 7 and ink chamber 7
Step of forming a) A polyimide resin is applied to the entire front surface of the substrate 1 to form a spacer layer 7 (FIG. 7C). Next, a photoresist 18 is applied to the surface, and the spacer layer 7 is patterned by photolithography ((d) in the same figure), whereby the ink chamber 7a is formed above the ink supply port 1a. After that, the portion of the SiO ₂ film 2 that closes the surface side of the ink supply port 1a is etched and removed using HF (FIG. 8E).

Step 8 ( Step of Bonding Nozzle Plate 8) After the photoresist 18 on the spacer layer 7 is peeled off, a nozzle plate 8 for ejecting ink is bonded on the spacer layer 7 (FIG. 6 (f)). ).

Through the above steps 1 to 8, the ink jet head according to this embodiment is formed. According to such a forming method, each inkjet head provided on the substrate 1 is integrated with the first wiring layer 5a provided in the groove 9 and the first wiring layer 5a, and at the same time, the first wiring layer 5a is formed. Wiring layer 5 for connecting the to the buckling member 4 of the inkjet head
It is electrically connected to the outside through the wiring layer 5 composed of b.

In this case, the first wiring layer 5a can increase the cross-sectional area according to the depth of the groove 9 to reduce the resistance even if the surface area of the substrate 1 is small.
As a result, even if the area occupied by the entire wiring layer 5 on the surface of the substrate 1 is reduced and the height dimension of the second wiring layer 5b is reduced, the wiring resistance of the entire wiring layer 5 is sufficiently small. It is possible.

In the conventional wiring layer, since the buckling body is usually a thick film having a thickness of several microns, it is produced together with this buckling body by the electroplating method. Assuming that they are the same, the wiring resistance may increase, and the wiring itself may generate thermal stress and be curved.

On the other hand, in the present embodiment, since the wiring resistance can be sufficiently reduced as described above, the temperature rise in the wiring layer 5 is suppressed and the malfunction of the ink jet head is prevented. Therefore, a more stable operation state can be secured. Further, since the area occupied by the wiring layer 5 on the surface of the substrate 1 can be reduced, the integration degree of the inkjet head can be increased.

Further, since the height dimension of the second wiring layer 5b located above the surface of the substrate 1 can be made as small as possible, the ink chamber 7a can be surely sealed in the final step of attaching the nozzle plate 8. Can be easily performed, which improves workability and thus productivity.

Further, in the above method, since the flattening layer 6 having the same thickness is formed in the area other than the second wiring layer 5b provided on the surface of the substrate 1 when the second wiring layer 5b is formed, 1 has almost no step. This further improves workability and productivity.

Further, since the single crystal Si is used as the substrate, the crystal orientation is set so that the etching rate from the surface is larger in the depth direction, so that the side wall is formed when the groove 9 is formed by etching. The amount of etching is suppressed, so that the deep groove 9 can be formed in an accurate pattern. As a result, the wasted area on the substrate 1 is reduced, and the integration degree of the inkjet head can be further improved.

When a driver IC is further formed on the substrate 1 made of single crystal Si and wiring is formed on this IC, and then wiring is formed by the above method, the underlying layer is not already Si alone. Further, since the IC cannot withstand the high temperature treatment, the SiO ₂ film 11 for the mask at the time of forming the groove 9 is formed by the CVD method.

[Embodiment 2] Another embodiment of the present invention will be described below with reference to FIGS. 8 to 9. For convenience of explanation, members having the same functions as those of the members shown in the drawings of the above-described embodiment are designated by the same reference numerals, and the description thereof will be omitted.

As shown in FIG. 8, a large number of buckling structure type microactuators M as electronic component elements according to this embodiment are arranged in parallel on the surface of a substrate 1 made of photosensitive glass. ing. Each of these actuators M has a buckling body 4 in the central portion thereof, which is substantially the same as that of the above-described embodiment, and the same first wiring layer 5a and second wiring layer 5b are provided on both sides of the buckling body 4 as described above. Are connected to each other.

In order to form the first wiring layer 5a in the wiring layer 5 on the substrate 1, as shown in FIG.
The recessed grooves 9 ... Which are substantially the same as those in the above-mentioned embodiment are formed in advance, and the forming method will be described later.

The operation of the microactuator M having the above structure will be described below. This actuator M
When an electric current is applied to the buckling body 4 constituting the above, Joule heat is generated and the temperature of the buckling body 4 rises. The buckling body 4 thermally expands as the temperature rises and bends upward. Therefore, when a predetermined time difference is sequentially applied to a large number of buckling elements 4 arranged in parallel and a current is applied, the bending portion moves in accordance with the time difference. By utilizing the movement of this bending portion, the buckling body 4
It is possible to move the object placed on. In addition,
In the microactuator M that operates in this way, if the upper surface of the wiring layer 5 is located above the buckling body 4, it will be an obstacle when moving an object. It is necessary to make the surface of the buckling body 4 or less.

Next, the manufacturing process of the microactuator M having the above structure will be described in order with reference to FIG.

Step 1 ( Step of Forming Groove 9) First, as shown in FIG. 1A, a groove pattern is printed on the surface of the substrate 1 made of photosensitive glass through a mask 21 having a groove pattern formed therein. Next, after baking the substrate 1 at a predetermined temperature, etching is performed using HF to form a groove 9 for embedding the wiring (FIG. 9B).

Step 2 ( Step of Forming Sacrificial Layer) Almost the same as step 3 in the above-described embodiment, the sacrificial layer 14 for moving the buckling body is formed by sputtering aluminum or the like (see FIG. (C)). Then, a photoresist is applied on the sacrificial layer 14, and the photoresist 22 is patterned by photolithography (FIG. 7D), and then the sacrificial layer 14 is buckled to be described later by wet etching. It is formed into a pattern shape corresponding to the body 4 (FIG. 8E), and then the photoresist 22 is removed.

Step 3 (Underlayer 3 and first wiring layer 5a
Forming step) A plating underlayer 3 made of, for example, Ni / Ta is formed on the surface of the substrate 1 by sputtering, and then the region other than the groove 9 is covered with a photoresist 23 (FIG. 7F). Next, the groove 9 is electroplated to form a first wiring layer 5a (FIG. 9 (g)). As the plating material in this case, a material capable of thick film plating of Au, Ni, etc. is selected as in the above-mentioned embodiment, and when this electroplating is performed, 2 butyne 1 is used for the purpose of flattening the plating surface. -4 A leveling agent such as diol is added to the plating bath in advance. After forming the first wiring layer 5a, the photoresist 23 is removed.

Step 4 ( Step of forming buckling body 4, second wiring layer 5b, flattening layer 6) The photoresist is applied again, and the buckling body 4 and the second buckling body 4 are formed by photolithography as in the above embodiment. A separation pattern 24 for the wiring layer 5b and the flattening layer 6 is formed (FIG. 7 (h)). After that, electroplating is performed to form the buckling member 4, the second wiring layer 5b, and the flattening layer 6 between the separating patterns 24 (FIG. 9 (i)). The plating material at this time is also
Similar to the above-mentioned embodiment, Ni, Ni alloy, Cu, Co, etc. are selected from the viewpoint of generated energy and manufacturing process.

Step 5 (separation pattern 24 / base layer 3
-Step of Removing Sacrificial Layer 14) The separation pattern 24 is removed, and the portion of the underlying layer 3 exposed after the removal of the separation pattern 24 is removed by ion milling (FIG. 7 (j)). afterwards,
The sacrificial layer 14 below the buckling body 4 is removed (FIG. 9 (k)).

The microactuator M is manufactured through the above manufacturing steps.

As described above, in this embodiment, the photosensitive glass is used as the substrate 1. Therefore, the first wiring layer 5a
The step of coating a photoresist and then patterning this is not necessary in forming the recessed groove 9 for forming the groove. The surface of the substrate 1 is directly exposed and patterned, and then etched to form the groove. It can be carried out. As a result, the number of steps is reduced, and the overall manufacturing cost can be reduced.

[0067]

As described above, in the wiring forming method according to the first aspect of the present invention, the wiring for electrically connecting the electronic component element formed on the substrate to the outside is formed on the substrate. In the method, a concave groove is formed on the surface of the substrate, a first wiring layer is formed in the groove, and a second wiring layer for connecting the first wiring layer to the electronic component element is formed along the surface of the substrate. This is a configuration in which a wiring layer is provided.

Thus, since the first wiring layer whose cross-sectional area can be increased according to the depth of the recessed groove is provided, the area occupied on the substrate surface is small and the height of the second wiring layer is high. Even if the size is reduced, the wiring resistance of the entire wiring layer can be further reduced.

Further, since the height dimension of the second wiring layer can be made as small as possible, the surface of the substrate becomes flatter, thereby improving workability and productivity in the subsequent steps such as assembly in the micromachine or the like. There is an effect that can be.

According to a second aspect of the present invention, there is provided a wiring forming method in which a second wiring layer is formed on a surface of the substrate, which is divided from the electronic component element area and the first and second wiring layer forming areas, to have substantially the same thickness. In this configuration, the flattening layer is formed.

As described above, since the flattening layer having the same thickness is provided when the second wiring layer is formed, a large step portion does not occur on the entire substrate, so that workability and productivity in the micromachine are further improved. There is an effect that can be done.

In the wiring forming method according to the third aspect, single crystal silicon is used as the substrate.

As a result, when the concave groove for forming the first wiring layer is formed by etching, it is possible to form a deep groove in which the amount of side etching is suppressed.
Since the deep groove can be formed in an accurate pattern, the wasteful area on the substrate is reduced, and the degree of integration of elements can be increased.

According to a fourth aspect of the present invention, there is provided a wiring forming method in which a photosensitive glass is used as the substrate.

Thus, in forming the concave groove by photolithography, it is possible to directly expose and pattern the substrate surface, and then perform etching to form the groove, and the number of steps can be reduced. This has the effect of reducing the overall manufacturing cost.

[Brief description of drawings]

FIG. 1 is an enlarged schematic cross-sectional view showing the structure of a substrate provided with an inkjet head of a buckling structure system as an example manufactured by applying the present invention.

FIG. 2 is an enlarged schematic sectional view of a substrate structure shown along the longitudinal direction of a buckling body in the inkjet head.

FIG. 3 is a plan view of a substrate provided with the inkjet head.

FIG. 4 is an exploded perspective view showing the shapes of a flattening layer, a spacer layer, and a nozzle plate that are sequentially laminated on the substrate and the surface thereof.

5A to 5H are schematic cross-sectional views showing the substrate structure in each step of the first half of the manufacturing process, showing the manufacturing process of the inkjet head.

6A to 6H are schematic cross-sectional views showing the substrate structure in each step of the steps following the manufacturing step shown in FIG.

7A to 7F are schematic cross-sectional views showing the substrate structure in each step in the process from the continuation to the end of the manufacturing process shown in FIG.

FIG. 8 is a plan view showing a structure of a substrate provided with a buckling structure type microactuator as another embodiment manufactured by applying the present invention.

FIG. 9 is a perspective view at a stage where a groove is formed on the surface of the substrate.

FIG. 10 is a view showing a manufacturing process of the microactuator, and FIGS. 10A to 10K are schematic sectional views showing a substrate structure in each process of the manufacturing process.

FIG. 11 is an enlarged schematic cross-sectional view showing the structure of a substrate provided with a conventional buckling structure type inkjet head.

[Explanation of symbols]

 1 Substrate 5 Wiring Layer 5a First Wiring Layer 5b Second Wiring Layer 6 Flattening Layer 9 Groove

 ─────────────────────────────────────────────────── ─── Continuation of front page (72) Inventor Tetsuya Inui, 22-22 Nagaike-cho, Abeno-ku, Osaka-shi, Osaka Within Sharp Corporation (72) Inventor Shingo Abe 22-22, Nagaike-cho, Abeno-ku, Osaka, Osaka Incorporated (72) Inventor Kenji Ota 22-22 Nagaike-cho, Abeno-ku, Osaka-shi, Osaka

Claims (4)

[Claims] 1. A wiring forming method for forming wiring on the substrate for electrically connecting an electronic component element formed on the substrate to the outside, wherein a concave groove is formed on the surface of the substrate, and the inside of the groove is formed. A method for forming a wiring, comprising forming a first wiring layer on the substrate, and then providing a second wiring layer for connecting the first wiring layer to the electronic component element along the surface of the substrate. 2. An area defined by the electronic component element area and the first and second wiring layer forming areas on the substrate surface,
The wiring forming method according to claim 1, wherein the flattening layer having substantially the same thickness is formed simultaneously with the formation of the second wiring layer. 3. The wiring forming method according to claim 1, wherein the substrate is single crystal silicon. 4. The wiring forming method according to claim 1, wherein the substrate is photosensitive glass.