JPH08212138A - Information processor - Google Patents

Abstract

PURPOSE: To prevent a program to be remained from being destroyed when down loading a program, etc., from a host computer to a reloadable memory. CONSTITUTION: When executing version up of an image forming device, a host computer 8 reloads the program stored in a flash ROM 1 by down loading it and when reloading the contents of the flash ROM 1, a memory controller 2 performs control such as the applying of a reloading voltage based on a disable signal from a protection circuit 9. When the host computer 8 accesses a basic program stored in the flash ROM 1 by bug of a load program, the protection circuit 9 inhibits the applying of the reloading voltage due to the memory controller 2.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an information processing apparatus in which a program in a memory can be rewritten to upgrade, for example, an information processing apparatus particularly suitable for upgrading an image forming apparatus such as a copying machine. Regarding

[0002]

2. Description of the Related Art Generally, when a program stored in a memory is changed, a method of replacing a non-rewritable ROM itself and a method of downloading it to a rewritable RAM are known. For example, in FIG. 5, the CPU for the address bus 5, data bus 6 and control line 7
3, the RAM 4, the IC socket 11 are connected, and the ROM 12 storing the program of the CPU 3 is the IC socket 11
ROM12 if detachably connected to
The program can be changed by replacing the with a new program stored.

However, according to this method, it is impossible to selectively rewrite a part of a program, for example, a basic program, while leaving another program unchanged. For example, when the peripheral device is upgraded by applying it to an image forming apparatus such as a copying machine, it is not possible to change the control program for the peripheral device without changing the basic program. Moreover, since the IC socket 11 is required to replace the ROM 12, the cost is naturally increased.

On the other hand, in FIG. 5, a rewritable memory is used instead of the ROM 12 and the IC socket 11, and a part of the program is selectively rewritten by downloading the program from the host computer 8 to this memory. There is also such a method.

A method using a rewritable memory is disclosed in Japanese Patent Application Laid-Open Nos. 4-181427 and 4-283837. In the former publication, a processing program for executing a main operation is stored in a rewritable nonvolatile memory, and an update processing program for updating the processing program in this nonvolatile memory is stored in a read-only memory, and an external interface is used. There is proposed a method of updating the processing program in the non-volatile memory by executing the updating processing program in the read-only memory according to the program rewriting instruction input via.

Further, in the latter publication, a processing program for executing a main operation is stored in a rewritable nonvolatile memory, and a program loader and a memory card storing an update program are connected to each other to connect the memory card to the memory card. A method of storing the stored update program in a non-volatile memory has been proposed.

[0007]

However, when a part of a program, for example, the basic program remains unchanged and another program is selectively rewritten by downloading to a rewritable memory, an error or the like of the load program may occur. There is a problem that the program to be left is destroyed.

In view of the above conventional problems, the present invention provides an information processing apparatus capable of preventing a program to be left from being destroyed when the program or the like is downloaded from a host computer to a rewritable memory. The purpose is to provide.

[0009]

In order to achieve the above object, a first means is a second area in which a program in which rewriting is prohibited is stored and a second area in which rewriting is permitted is stored. A rewritable memory having an area, a memory rewriting means for rewriting a program stored in the second area of the memory, and the memory rewriting means when access to the first area is detected during rewriting of the memory And a rewrite prohibition unit that prohibits rewriting by the.

The second means is characterized by further comprising a releasing means for manually releasing the rewriting prohibition by the rewriting prohibiting means in the first means.

[0011]

In the first means, the program whose rewriting is prohibited is stored in the first area of the rewritable memory,
The rewritable program is stored in the second area, and rewriting is prohibited when access to the first area is detected during rewriting. Therefore, when the program or the like is downloaded from the host computer to the rewritable memory, it is possible to prevent the program to be left stored in the first area from being destroyed.

In the second means, since the release means for manually releasing the rewrite prohibition is further provided, all the programs stored in the memory can be rewritten.

[0013]

Embodiments of the present invention will be described below with reference to the drawings. 1 is a block diagram showing an embodiment of an information processing apparatus according to the present invention, and FIG. 2 is a flash ROM and R of FIG.
3 is an explanatory diagram showing an AM address map, FIG. 3 is a circuit diagram showing the protection circuit of FIG. 1 in detail, and FIG. 4 is a circuit diagram showing a modification of the protection circuit of FIG.

In FIG. 1, for the address bus 5 formed of address lines A1 to A23, the data bus 6 formed of data lines D0 to D7, and the control line 7 of one line, the CPU 3 is provided.
And a RAM4 used as a work area for the CPU3
A flash ROM (EEPROM) 1 in which a program of the CPU 3 and the like are stored, a protection circuit 9 and a host computer 8 are connected.

When this apparatus is applied to an image forming apparatus,
The CPU 3 controls the image forming apparatus by using the program stored in the flash ROM 1 and the work area of the RAM 4. The host computer 8 rewrites the program stored in the flash ROM 1 by downloading when the image forming apparatus is upgraded, and the memory controller 2 sets the rewrite voltage based on the disable signal from the protection circuit 9 when rewriting the content of the flash ROM 1. Control such as application. The protection circuit 9 prohibits the application of the rewriting voltage by the memory controller 2 when the host computer 8 accesses the basic program stored in the flash ROM 1 due to a bug in the load program.

If the CPU 3 is, for example, a Motorola 68000 series CPU, then the CPU 3 as shown in FIG.
Can access the flash ROM1 and RAM4 from "000000h" to "FFFFFF"
up to the h "address. FIG. 2 shows, as an example, a flash ROM 1 and R when applied to an image forming apparatus such as a copying machine.
The area of AM4 is shown, and the area of the flash ROM1 is "0.
A basic program storage area for operating the image forming apparatus from the address "00000h" to the address "00FFFFh" and the address "0FFFFFh" from the address "010000h"
It is composed of a program storage area for controlling peripheral devices up to the address. Further, in the example shown in FIG.
RAM from "00h" to "FFFFFFh"
4 and the I / O area of the CPU 3 and the like.

In such a configuration, when the host computer 8 rewrites the contents of the flash ROM 1 other than the basic program storage area, the designated address is sent to the address lines A1 to A23 and the rewrite data is sent to the data bus 6. By doing so, the program and data at the specified address can be rewritten.

In this case, the values on the upper address lines A16 to A23 of the address bus 5 are all "0" when accessing the basic program storage area from the address "000000h" to the address "00FFFFh", and other " When accessing from the address "010000h" to the address "FFFFFFh", any one becomes "1".

Therefore, the protection circuit 9 has an O level as shown in FIG.
Address line A16 of address bus 5
When any of A23 to A23 is "1", the application of the rewriting voltage by the memory controller 2 is permitted. That is,
When a basic program storage area that should not be accessed is accessed due to a bug in the load program of the host computer 8, all of the address lines A16 to A23 become "0", so the protection circuit 9 causes the memory controller 2 to rewrite the voltage. Can be prohibited, thus preventing the basic program from being destroyed.

When applied to the image forming apparatus, this subroutine is stored in the peripheral program area when the linear speed and the clutch on / off timing data are upgraded as the parameters of the peripheral equipment.
The image forming apparatus can be efficiently upgraded.

In the protection circuit 9 having the configuration shown in FIG. 3, the basic program cannot be rewritten when the version upgrade including the rewriting of the basic program is performed. Therefore, as shown in FIG. 4, the basic program can be rewritten by adding the DIP switch 13 and the pull-up resistor 14 between the protection circuit 9 and the memory controller 2.

That is, in FIG. 4, the DIP switch 13 is normally set to the ON state, and the operation is the same as that shown in FIG. On the other hand, when rewriting the basic program, D
When the IP switch 13 is operated to the off side, the control signal to the memory controller 2 is always in the high state by the pull-up resistor 14, and the application of the rewriting voltage is permitted. Therefore, by providing a circuit as shown in FIG. 4, rewriting other than the basic program and rewriting including the basic program can be selectively performed. Note that D
It is desirable to arrange the IP switch 13 at a position where the user cannot easily operate it.

[0023]

As described above, according to the first aspect of the invention, the program whose rewriting is prohibited is stored in the first area of the memory, and the program whose rewriting is permitted is stored in the second area. Since rewriting is prohibited when access to the first area is detected during rewriting,
When a program or the like is downloaded from the host computer to the rewritable memory, it is possible to prevent the program to be left stored in the first area from being destroyed.

According to the second aspect of the present invention, further provided is a releasing means for manually releasing the rewriting prohibition, so that all the programs stored in the memory can be rewritten.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of an information processing apparatus according to the present invention.

FIG. 2 is an explanatory diagram showing an address map of a flash ROM and a RAM of FIG.

FIG. 3 is a circuit diagram showing the protection circuit of FIG. 1 in detail.

FIG. 4 is a circuit diagram showing a modified example of the protection circuit of FIG.

FIG. 5 is a block diagram showing an embodiment of a conventional information processing apparatus.

[Explanation of symbols]

 1 Flash ROM 2 Memory controller 8 Host computer 9 Protection circuit 13 DIP switch 14 Pull-up resistor

Claims (2)

[Claims] 1. A rewritable memory having a first area for storing a program for which rewriting is prohibited and a second area for storing a program for which rewriting is permitted, and a second area of the memory. An information processing apparatus comprising: a memory rewriting unit that rewrites a program stored in the memory; and a rewriting prohibiting unit that prohibits rewriting by the memory rewriting unit when an access to the first area is detected when rewriting the memory. 2. The information processing apparatus according to claim 1, further comprising a releasing unit that manually releases the rewriting prohibition by the rewriting prohibition unit.