JPH08204550A - Pll device, amplifier and integrated circuit - Google Patents

Abstract

PURPOSE: To prevent the occurrence of distortion or error owing to fluctuation in power supply voltage in a control input of a voltage controlled oscillator by suppressing a DC voltage fluctuation of the control input owing to the fluctuation in the power supply voltage. CONSTITUTION: A resistance division ratio of resistors R4, R5 and a resistance division ratio of resistors R6, R7 are selected so that the base potential of transistors(TRs) Q9, Q10 is equal to the base potential of TRs Q11, Q12. A collector current 17/4 is supplied to the TRs Q9, Q10. When a power supply voltage rises by ΔV, the base potential of the TRs Q9, Q10 gets higher than that of the TRs Q11, Q12, the collector current of the TRs Q9, Q10 is increased, the voltage drop of a resistor R2 is increased to cancel a DC voltage rise at an output terminal P1 owing to the voltage increase ΔV. When the voltage is decreased by ΔV, a voltage drop across the resistor R2 is smaller conversely to cancel the DC voltage reduction. Thus, the DC voltage at the output terminal P1 is constant even when the power supply voltage is fluctuated and distortion and an error in a control signal S5 owing to the power supply voltage fluctuation are prevented.

Description

Detailed Description of the Invention

[0001]

[Table of Contents] The present invention will be described in the following order. Field of Industrial Application Conventional Technology (FIGS. 5 to 8) Problems to be Solved by the Invention (FIGS. 5 to 8) Means for Solving the Problems (FIGS. 1 and 2) Operation (FIGS. 1 and 2) ) Example (FIGS. 1 to 4) Effect of the invention

[0002]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a PLL device, an amplifier and an integrated circuit, and can be applied to, for example, a satellite broadcast receiving device for receiving satellite broadcast.

[0003]

2. Description of the Related Art Conventionally, satellite broadcast receiving devices of this type are
Some demodulate by a phase lock loop (hereinafter referred to as PLL) system. As shown in FIG. 5, the satellite broadcast receiving apparatus 1
Supplies the FM video signal S1 obtained by receiving the broadcast radio wave by the antenna unit 2 and converting it to the first intermediate frequency to the tuner unit 3.
The tuner unit 3 PLs the FM video signal S2 obtained by converting the FM video signal S1 into the second intermediate frequency (400 [MHz] band).
It is given to the L-system demodulation unit 4.

The demodulation section 4 includes an FM video signal S2 and an oscillation signal S output from a voltage controlled oscillator (hereinafter referred to as VCO) 6.
3 and 3 are applied to the phase comparator 5. The phase comparator 5 amplifies the error signal S4 corresponding to the phase difference between the FM video signal S2 and the oscillation signal S3 by the DC amplifier 7, and outputs the control signal S5 to the VCO.
6 and the video signal processing unit 8.

The oscillation frequency of the VCO 6 changes according to the control signal S5, and the PLL is formed so as to have the same frequency as the FM video signal S2 input to the phase comparator 5. V
The voltage of the control signal S5 becomes the same as the FM-modulated original signal because the CO6 changes the oscillation signal S3 following the frequency change of the FM video signal S2. That is, the control signal S5 becomes a demodulated signal of the FM video signal S2, and when the control signal S5 is given to the video signal processing unit 8, the video signal S6 is obtained.

As shown in FIG. 6, the VCO 6 changes the capacitance value of the varactor diode 9 by the voltage V _CONT of the control signal S5 (hereinafter referred to as the control voltage) V _CONT to form a series circuit composed of a coil L ₁ and a capacitor C _1. Change the frequency. As shown in FIG. 7, the relationship between the control voltage V _CONT and the oscillation frequency at this time is that the control voltage V _CONT increases as the oscillation frequency increases.
_CONT increases exponentially and does not become a perfect straight line.
When this relationship is applied to the demodulation of the FM video signal S2 in the demodulation unit 4, a portion having as good linearity as possible is selected as the operating point.

As shown in FIG. 8, the DC amplifier 7 outputs the differential error signal S4 to the transistors Q1 and Q of the input stage 11.
2 and the differential outputs S7 and S8 whose level is shifted by transistors Q3 and Q4 to adjust the DC operating point, respectively.
To the differential amplification stage 12. The differential amplifier stage 12 supplies the differential outputs S7 and S8 to the transistors Q5 and Q6 of the differential pair, and outputs the differential outputs S9 and S10 from the respective collectors.
To the output stage 13. The output stage 13 provides differential outputs S9 and S10 to transistors Q7 and Q8, respectively.
A differential control signal S5 is output from each emitter.

Incidentally, in the transistors Q3 to Q8, the respective emitters are connected to the ground line via the constant current sources 14 to 19, and the constant currents I _{1 to} I ₆ flow respectively. Further, in the transistors Q5 and Q6, the emitters are commonly connected through the resistor R ₁ and the collectors are connected to the power supply voltage V _CC through the resistors R ₂ and R ₃ , respectively.

Assuming that the base-emitter voltage of the transistor Q7 is V _{BE (Q7)} , the DC voltage V _OUT1 appearing at _one output terminal P ₁ of the output stage 13 is given by the following equation:

[Equation 1] Is required.

[0010]

However, according to the above equation (1), when the power supply voltage V _CC changes, the DC voltage V _OUT1 also changes. When the power supply voltage V _CC fluctuates and the DC voltage V _OUT1 of the DC amplifier 7 changes, the operating point changes and the control signal S5, which is a demodulation signal, is distorted. In addition, the fluctuation of the power supply voltage V _CC causes the DC amplifier 7
There is a problem that the appearance itself in the output of the above becomes an error of the control signal S5.

In satellite broadcasting, a video signal is FM-modulated and has a frequency shift of about 30 [MHz]. Therefore, when designing the power supply voltage V _CC (operating voltage) at 5 [V], VC
The characteristic of O6 requires a frequency change of about 20 [MHz / V], and the output of the DC amplifier 7 requires linearity in a voltage section of about 2 [V].

To avoid the fluctuation of the power supply voltage V _CC, a voltage regulator is generally added. However, the voltage regulator causes a voltage drop between the input voltage and the output voltage. Therefore, when the power supply voltage V _CC is 5 [V], 2
There was no voltage margin to satisfy the linearity of [V]. Therefore, it has been difficult to suppress the fluctuation of the power supply voltage V _{CC by} the voltage regulator or the like.

The present invention has been made in consideration of the above points, and it is possible to prevent a distortion and an error from occurring in the control input for controlling the voltage controlled oscillator due to the fluctuation of the power supply voltage.
It is intended to propose an L device, an amplifier and an integrated circuit.

[0014]

In order to solve such a problem, according to the present invention, a voltage controlled oscillator (6) for controlling an oscillation frequency according to a voltage of a control input (S5) and a voltage controlled oscillator (6) are provided. A phase comparator (5) that compares the phase between the oscillation output (S3) and a predetermined external input (S2), and a control input (S5) by amplifying the output (S4) of the phase comparator (5) in a DC manner. And a DC amplifier (22) for outputting
In the LL device (21), the DC amplifier (22) detects a fluctuation component of the power supply voltage (V _CC ) and corrects the DC voltage of the control input (S5) according to the fluctuation component. ) Is provided.

[0015] In the present invention, the collector is connected to the resistor power supply voltage via a (R ₂₎ (V _CC), first for outputting an output signal (S9) from a portion of the collector or the resistance (R ₂₎ Amplifier circuit (1) having a transistor (Q5) of
2) and a resistor (R ₂ ) are connected so that a part or all of them function as a load, a fluctuation component of the power supply voltage (V _CC ) is detected, and a current according to the detection result is passed through the load (R ₂ ). Second transistor (Q
And a voltage correction circuit (23) having 9).

Further, in the present invention, the control input (S
5) A voltage controlled oscillator (6) for controlling the oscillation frequency according to the voltage of 5), and an oscillation output (S3) of the voltage controlled oscillator (6)
And a predetermined external input (S2) phase comparator (5), and a DC amplifier for amplifying the output (S4) of the phase comparator (5) in a DC manner and outputting a control input (S5). (2
2) and a DC amplifier (2) of a PLL device (21) having
In the integrated circuit having 2) in the semiconductor integrated circuit, the DC amplifier (22) detects the fluctuation component of the power supply voltage (V _CC ) and corrects the DC voltage of the control input (S5) according to the fluctuation component. A control voltage correction circuit (23) is provided.

[0017] Furthermore, in the present invention, in the semiconductor integrated circuit, a collector connected to the resistor power supply voltage via a (R ₂₎ (V _CC), a collector or resistance (R ₂₎ a portion from the output signal of the (S9 ) Is connected to an amplifier circuit (12) having a first transistor (Q5) for outputting a part of or all of a resistor (R ₂ ) is a load, and a fluctuation component of a power supply voltage (V _CC ) is detected. and a current according to the detection result provided the load voltage correction circuit (23) having a second transistor for correcting (Q9) the DC voltage (R ₂₎ into the sink by an output signal (S9).

[0018]

[Function] The control voltage correction circuit (2
3) is provided to suppress the fluctuation of the DC voltage of the control input (S5) due to the fluctuation of the power supply voltage (V _CC ), so that the control input (S5) for controlling the voltage controlled oscillator (6) is connected to the power supply. It is possible to prevent the occurrence of distortion or error due to the fluctuation of the voltage (V _CC ).

[0019]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described in detail below with reference to the drawings.

In FIG. 1 in which parts corresponding to those in FIG. 5 are designated by the same reference numerals, numeral 20 indicates a satellite broadcast receiving apparatus for receiving satellite broadcasts as a whole, in place of the conventional demodulation section 4 having an integrated circuit configuration. The demodulation unit 21 is provided. Demodulator 2
1, a DC amplifier 22 is provided instead of the conventional DC amplifier 7. As shown in FIG.
In addition to the conventional configuration, the variation suppressing stage 23 is provided, and the differential outputs S9 and S10 of the differential amplifier stage 12 are provided to the output stage 13 via the variation suppressing stage 23.

The fluctuation suppressing stage 23 is provided with a differential pair of transistors Q9 and Q10 and Q11 and Q12 whose emitters are commonly connected to each other.
A collector current corresponding to the comparison result is caused to flow through the transistors Q9 and Q10 based on _CC and the reference constant voltage V ₁ .
The common emitter of the transistors Q9 and Q10 is the resistor R
It is connected to the ground line via a parallel circuit composed of ₄ and R ₅ and a constant current source 24 for flowing a constant current I ₇ . The common emitter of the transistors Q11 and Q12 is connected to the ground line via the parallel circuit composed of the resistors R ₆ and R ₇ and the constant current source 24.

The collector of the transistor Q9 is connected to the collector of the transistor Q5 and the base of the transistor Q7, and is provided with a differential output S9. Transistor Q1
The collector of 0 is connected to the collector of the transistor Q6 and the base of the transistor Q8, and is provided with the differential output S10. The common base of the transistors Q9 and Q10 includes a resistor R ₈ whose one end is connected to the power source voltage V _CC, one end is connected to a connection midpoint of the series circuit composed of a resistor R ₉ connected to the ground line, The fluctuation of the power supply voltage V _CC is detected.

The common collectors of the transistors Q11 and Q12 are connected to the power supply voltage V _CC . The common base of the transistors Q11 and Q12 has a constant voltage V at one end.
_The reference voltage is set by connecting the resistor R ₁₀ connected to ₁ and the resistor R ₁₁ having one end connected to the ground line to the connection midpoint of the series circuit.

In the above structure, the power supply voltage V _CC is 5
When V, so that the base potential of the transistor Q9 and Q10, and the base potential of the transistor Q11 and Q12 becomes equal, and the resistance division ratio of the resistors R ₄ and R _5, the resistance of the resistor R _6, R ₇ Set the division ratio and.

In this set state, the transistor Q9
And the Q10, respectively flows a collector current of I _7/4. The DC voltage V _{OUT1 at} the output terminal P ₁ at this time is _calculated by the following equation:

[Equation 2] Is required.

When the power supply voltage V _CC rises by ΔV, the base potentials of the transistors Q9 and Q10 are higher than the base potentials of the transistors Q11 and Q12. As a result, the collector currents of the transistors Q9 and Q10 increase, and the voltage drop across the resistor R ₂ due to the collector current of the transistor Q9 increases. Therefore, the rise of the DC voltage V _OUT1 due to the increase of ΔV is canceled.

On the other hand, when the power supply voltage V _CC decreases by ΔV, the collector current of the transistor Q9 decreases and the voltage drop of the resistor R ₂ decreases. This gives Δ
The decrease in DC voltage V _OUT1 due to the decrease in V is canceled out.
Accordance connexion, as shown in solid line in FIG. 3, the DC voltage V _OUT1 of the output terminal P ₁ is, even if the power supply voltage V _CC is varied, for example, about 4.
It becomes constant from 4 [V] to 5.6 [V]. As a result, the demodulation unit 21 can prevent the distortion and error of the control signal S5 due to the fluctuation of the power supply voltage V _CC . Incidentally, the broken line shows the DC voltage at the output terminal of the conventional DC amplifier 7,
It linearly increases in proportion to the increase of the power supply voltage V _CC .

According to the above configuration, the fluctuation suppressing stage 23 is provided in the DC amplifier 22 to suppress the fluctuation of the DC voltage of the control signal S5 due to the fluctuation of the power supply voltage V _CC , and
It is possible to prevent the control signal S5 for controlling the CO6 from being distorted or generated due to the fluctuation of the power supply voltage V _CC .

When not used for FM demodulation, it is possible to cancel the fluctuation of the oscillation frequency of the VCO 6 due to the fluctuation of the power supply voltage V _CC . This is particularly effective when the power supply voltage V _CC is low and the fluctuation of the power supply voltage V _CC cannot be suppressed by a voltage regulator or the like.

In the above embodiment, the output stage 13
The case where the fluctuations of the differential outputs S9 and S10 due to fluctuations of the power supply voltage V _CC are suppressed by giving the differential outputs S9 and S10 to the fluctuation suppression stage 23 connected in parallel with each other has been described. Is not limited to this, but by adjusting the power supply voltage supplied to the differential amplification stage 12, the power supply voltage V
_It can also be applied to the case of suppressing the fluctuation of the differential outputs S9 and S10 due to the fluctuation of _CC . Also in this case, the same effect as described above can be obtained.

As shown in FIG. 7, the DC amplifier 25 is provided with a differential amplification stage 26 and a fluctuation suppression stage 27 in place of the differential amplification stage 12 and the fluctuation suppression stage 23 in the configuration of the DC amplifier 22. ing. The differential amplifier stage 26 connects the resistors R ₂ and R ₃ of the differential amplifier stage 12 to the power supply voltage V _CC via the resistor R ₁₂ . The fluctuation suppression stage 27 includes transistors Q9 and Q1.
Instead of 0 and the transistors Q11 and Q12, a transistor Q13 and a transistor Q14 are provided, respectively. Further, the fluctuation suppressing stage 27 is provided with resistors R ₁₃ and R ₁₄ instead of the parallel circuit formed of the resistors R ₄ and R ₅ and the parallel circuit formed of the resistors R ₆ and R ₇ .

The transistor Q13 is also supplied with the output at the midpoint of connection between the resistors R ₂ and R _{3 of the} differential amplification stage 26 and the resistor R ₁₂ . As a result, the fluctuation suppressing stage 27 can prevent the fluctuations of the differential outputs S9 and S10 by causing the collector current according to the result of comparison with the set voltage to flow in the transistor Q13.

Further, in the above-mentioned embodiments, the case where the transistors Q9 to 12 are constructed by the NPN type has been described, but the present invention is not limited to this, and can be applied to the case where the transistors Q9 to 12 are constructed by the PNP type. .

[0034]

As described above, according to the present invention, the DC voltage amplifier is provided with the control voltage correction circuit to suppress the fluctuation of the DC voltage of the control input due to the fluctuation of the power supply voltage, and thus the voltage controlled oscillator is realized. A PL that can prevent distortion and errors due to fluctuations in power supply voltage from occurring in the control input to be controlled.
L devices, amplifiers and integrated circuits can be realized.

[Brief description of drawings]

FIG. 1 is a connection diagram showing a satellite broadcast receiver according to an embodiment of a PLL device, an amplifier and an integrated circuit according to the present invention.

FIG. 2 is a connection diagram showing a DC amplifier according to an embodiment.

FIG. 3 is a schematic diagram showing an output voltage when the power supply voltage changes according to the embodiment and a conventional output voltage when the power supply voltage changes.

FIG. 4 is a connection diagram showing a DC amplifier according to another embodiment.

FIG. 5 is a connection diagram for explaining a conventional satellite broadcast receiving device.

FIG. 6 is a connection diagram showing a configuration of a general VCO.

FIG. 7 is a curve diagram showing a control voltage-frequency characteristic of a VCO.

FIG. 8 is a connection diagram showing a configuration of a conventional DC amplifier.

[Explanation of symbols]

1, 20 ... Satellite broadcasting receiver, 2 ... Antenna section, 3
…… Tuner section, 4, 21 …… Demodulation section, 5 …… Phase comparator, 6 …… VCO, 7, 22, 25 …… DC amplifier, 8
...... Video signal processing unit, 9 ... Varactor diode, 11
...... Input stage, 12, 26 ...... differential amplification stage, 13 …… output stage, 14 to 19, 24 …… constant current source, 23,27 …… variation suppression stage.

Claims (5)

[Claims] 1. A voltage-controlled oscillator that controls an oscillation frequency according to a voltage of a control input, a phase comparator that compares the phase of an oscillation output of the voltage-controlled oscillator with a predetermined external input, and a phase comparator of the phase comparator. In a PLL device having a DC amplifier that amplifies an output in a DC manner and outputs the control input, a fluctuation component of a power supply voltage is detected in the DC amplifier, and a DC voltage of the control input is detected according to the fluctuation component. A PLL device comprising a control voltage correction circuit for correcting 2. The direct current amplifier, wherein a collector is connected to a power supply voltage via a resistor, and a first transistor for outputting an output signal based on the output of the phase comparator from the collector or a part of the resistor. An amplifier circuit is provided, and the control voltage correction circuit is connected such that a part or all of the resistance serves as a load,
The PLL according to claim 1, further comprising a second transistor that detects a fluctuation component of the power supply voltage and causes a current corresponding to the detection result to flow in the load to correct the DC voltage of the control input. apparatus. 3. An amplifier circuit having a first transistor whose collector is connected to a power supply voltage through a resistor and which outputs an output signal from the collector or a part of the resistor, and a part or all of the resistor is a load. Connected so that
And a voltage correction circuit having a second transistor for detecting a fluctuation component of the power supply voltage and flowing a current corresponding to the detection result to the load to correct the DC voltage of the output signal. amplifier. 4. A voltage controlled oscillator for controlling an oscillation frequency according to a voltage of a control input, a phase comparator for comparing the phase of an oscillation output of the voltage controlled oscillator with a predetermined external input, and a phase comparator for the phase comparator. In an integrated circuit having the DC amplifier of a PLL device having a DC amplifier for amplifying an output in a direct current and outputting the control input in a semiconductor integrated circuit, the DC amplifier detects a fluctuation component of a power supply voltage. An integrated circuit comprising a control voltage correction circuit for correcting the DC voltage of the control input according to the fluctuation component. 5. An amplifier circuit having a first transistor in which a collector is connected to a power supply voltage through a resistor and which outputs an output signal from the collector or a part of the resistor in the semiconductor integrated circuit; Some or all are connected so as to be a load,
And a voltage correction circuit having a second transistor for detecting a fluctuation component of the power supply voltage and flowing a current corresponding to the detection result to the load to correct the DC voltage of the output signal. Integrated circuit.