JPH08190812A - Flat shielding circuit body and its manufacture - Google Patents

Flat shielding circuit body and its manufacture

Info

Publication number
JPH08190812A
JPH08190812A JP264395A JP264395A JPH08190812A JP H08190812 A JPH08190812 A JP H08190812A JP 264395 A JP264395 A JP 264395A JP 264395 A JP264395 A JP 264395A JP H08190812 A JPH08190812 A JP H08190812A
Authority
JP
Japan
Prior art keywords
circuit
conductive layer
circuits
shield
conductive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP264395A
Other languages
Japanese (ja)
Inventor
Shuji Takiguchi
修司 滝口
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Yazaki Corp
Original Assignee
Yazaki Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Yazaki Corp filed Critical Yazaki Corp
Priority to JP264395A priority Critical patent/JPH08190812A/en
Publication of JPH08190812A publication Critical patent/JPH08190812A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0216Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/0218Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/0393Flexible materials

Landscapes

  • Insulated Conductors (AREA)
  • Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
  • Structure Of Printed Boards (AREA)

Abstract

PURPOSE: To provide a manufacture of a flat shielding circuit body and by which the flat shielding circuit body is easily manufactured. CONSTITUTION: In one half portion of the conductive layer of a base film 1 plural circuits 14 to 16 are formed by etching, while in the other half a circuit plate 21 is formed leaving a shielding conductive layer 17. A conductive adhesive 19 is applied to an outside earth circuit 15, while an insulating adhesive 20 is applied to the other circuits, and the circuit plate 21 is folded back in the center. The shielding conductive layer 17 is connected to the earth circuit 15, and is bonded with the other circuits via the insulating adhesive.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、ベースフィルムの導電
層をエッチングして回路とシールド用導電層を形成した
回路板を折り返して、回路の電気的シールドとアースを
同時に行うフラットシールド回路体及びその製造方法に
関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a flat shield circuit body for simultaneously electrically shielding and grounding a circuit by folding back a circuit board on which a circuit and a conductive layer for shielding are formed by etching a conductive layer of a base film. The present invention relates to a manufacturing method thereof.

【0002】[0002]

【従来の技術】図10は実開平6−2516号公報に記
載された従来のフラットシールド回路体を示すものであ
る。このフラットシールド回路体31は、偏平な絶縁被
覆32の間に複数の導体33を並列に有するフラットケ
ーブル34の外周に金属テープ等の導電シールド層35
を設け、該導電シールド層35にアース線36を接続し
て成るものである。該フラットケーブル34の両端部に
は導体33の端末部が突出して、相手側回路体に対する
接続部を構成する。該導電シールド層35によりフラッ
トケーブル34に対する外部からの電気ノイズが遮断さ
れる。
2. Description of the Related Art FIG. 10 shows a conventional flat shield circuit body disclosed in Japanese Utility Model Laid-Open No. 6-2516. The flat shield circuit body 31 includes a conductive shield layer 35 such as a metal tape on the outer circumference of a flat cable 34 having a plurality of conductors 33 in parallel between flat insulating coatings 32.
And a ground wire 36 is connected to the conductive shield layer 35. The end portions of the conductor 33 project from both ends of the flat cable 34 to form a connection portion for the counterpart circuit body. The conductive shield layer 35 shields electric noise from the outside to the flat cable 34.

【0003】[0003]

【発明が解決しようとする課題】しかしながら、上記従
来の構造にあっては、フラットケーブル34の外周に導
電シールド層35としての金属テープ等を巻き付けて、
さらに導電シールド層35にアース線36を接続するた
めに、製造に多くの手間がかかり、それにより生産性が
悪化し、製品がコスト高になるという問題があった。
However, in the above-mentioned conventional structure, a metal tape or the like as the conductive shield layer 35 is wound around the outer periphery of the flat cable 34,
Further, since the ground wire 36 is connected to the conductive shield layer 35, it takes a lot of time and labor for manufacturing, which deteriorates productivity and increases the cost of the product.

【0004】本発明は、上記した点に鑑み、導電シール
ド層及びアース線を簡単に設けることができて、生産性
の向上やコストの低減を可能とするフラット回路体及び
その製造方法を提供することを目的とする。
In view of the above points, the present invention provides a flat circuit body in which a conductive shield layer and a ground wire can be easily provided, and productivity can be improved and cost can be reduced, and a manufacturing method thereof. The purpose is to

【0005】[0005]

【課題を解決するための手段】上記目的を達成するため
に、本発明は、ベースフィルム上に形成された導電層に
エッチングレジストを付着させて該導電層の片半部にお
いて回路予定部を形成し、該導電層をエッチングして該
回路予定部に複数の回路を形成させると共に、該導電層
の他の片半部においてシールド用導電層を残存させて回
路板を形成し、該複数の回路のうちの外側のアース回路
に導電性接着剤を塗布し、他の回路に絶縁性接着剤を塗
布して、該回路板を中央から折り返して、該シールド用
導電層を該アース回路に接着接続させると共に、他の回
路に絶縁性接着剤を介して被着させるフラットシールド
回路体の製造方法、及び、中央から折り返されたベース
フィルムと、該ベースフィルムの表面の片半部に形成さ
れた複数の回路と、該表面の他の片半部に形成され、該
複数の回路に対向するシールド用導電層と、該複数の回
路のうちの外側のアース回路に塗布された導電性接着剤
と、該アース回路を除く他の回路に塗布された絶縁性接
着剤とで構成され、該シールド用導電層が導電性接着剤
で該アース回路に接続し、且つ該絶縁性接着剤を介して
他の回路に被着したフラットシールド回路体をそれぞれ
採用する。
In order to achieve the above-mentioned object, the present invention attaches an etching resist to a conductive layer formed on a base film to form a predetermined circuit portion in one half of the conductive layer. Then, the conductive layer is etched to form a plurality of circuits in the circuit planned portion, and the shield conductive layer is left in the other half of the conductive layer to form a circuit board. Conductive adhesive is applied to the ground circuit on the outer side of the above, insulating adhesive is applied to other circuits, the circuit board is folded back from the center, and the conductive layer for shielding is adhesively connected to the earth circuit. And a method of manufacturing a flat shield circuit body in which another circuit is adhered via an insulating adhesive, and a base film folded back from the center, and a plurality of films formed on one half of the surface of the base film. Circuit of A shield conductive layer formed on the other half of the surface and facing the plurality of circuits, a conductive adhesive applied to an outer ground circuit of the plurality of circuits, and the ground circuit. Except for the insulating adhesive applied to the other circuit, the shield conductive layer is connected to the ground circuit with the conductive adhesive, and is adhered to the other circuit via the insulating adhesive. Adopt the flat shield circuit body.

【0006】[0006]

【作用】回路板を中央で折り返すことにより、シールド
用導電層が導電性接着剤でアース回路に接続し、且つ絶
縁性接着剤を介して他の回路上に被着する。これにより
複数の回路がシールド用導電層で覆われ、電気的にシー
ルドされる。外側のアース回路はシールド回路体を閉塞
させ、補助的にシールドする。
By folding back the circuit board at the center, the conductive layer for shielding is connected to the ground circuit with a conductive adhesive and is adhered to another circuit via the insulating adhesive. As a result, the plurality of circuits are covered with the conductive layer for shielding and electrically shielded. The outer ground circuit closes the shield circuit body and shields it auxiliary.

【0007】[0007]

【実施例】図1〜9は本発明に係るフラット回路体の製
造方法の一実施例を示すものである。この方法は、先ず
図1の如く合成樹脂製の柔軟なベースフィルム1の表面
上に導電層としての銅箔2を接着して銅箔付きフィルム
3を形成する。次いで図2の如く該銅箔付きフィルム3
の銅箔2の表面上にパワー回路形成予定部4を除いてメ
ッキレジスト5を印刷塗布する。
1 to 9 show one embodiment of a method for manufacturing a flat circuit body according to the present invention. In this method, first, as shown in FIG. 1, a copper foil 2 as a conductive layer is adhered onto the surface of a flexible base film 1 made of synthetic resin to form a film 3 with a copper foil. Then, as shown in FIG.
A plating resist 5 is printed and applied on the surface of the copper foil 2 except for the power circuit formation planned portion 4.

【0008】該パワー回路形成予定部4は銅箔2の左半
部6の範囲内で設定する。該パワー回路形成予定部4に
は図3の如く高速電解Cuメッキを施して、メッキレジ
スト5の溝8内で銅箔2上に重合層7を厚膜に鍍着させ
る。
The power circuit formation scheduled portion 4 is set within the range of the left half portion 6 of the copper foil 2. As shown in FIG. 3, the power circuit formation-scheduled portion 4 is subjected to high-speed electrolytic Cu plating, and a thick layer of the polymer layer 7 is plated on the copper foil 2 in the groove 8 of the plating resist 5.

【0009】次いで図4の如く前記メッキレジスト5を
除去して、銅箔層2と重合層7とを露出させる。さらに
図5の如く銅箔層2の左半部6の重合層7と薄膜の信号
回路及びアース回路の形成予定部9,10と、該銅箔層
2の右半部11とにエッチングレジスト12を印刷塗布
する。該銅箔層2の右半部11はシールド層として作用
する。
Then, as shown in FIG. 4, the plating resist 5 is removed to expose the copper foil layer 2 and the polymerized layer 7. Further, as shown in FIG. 5, an etching resist 12 is formed on the polymerized layer 7 in the left half portion 6 of the copper foil layer 2, the thin film signal circuit and ground circuit formation planned portions 9 and 10, and the right half portion 11 of the copper foil layer 2. Apply by printing. The right half 11 of the copper foil layer 2 acts as a shield layer.

【0010】次いでエッチングレジスト12のない銅箔
部分13をエッチングで除去して、図6の如くベースフ
ィルム1上の左半部6において厚膜のパワー回路14
と、薄膜のアース回路15及び信号回路16を形成さ
せ、右半部11において電磁シールド用銅箔層17を残
存させる。エッチングレジスト12は除去する。なお、
上記した回路14,16の形成方法は特願平5−115
747号で提案済である。
Then, the copper foil portion 13 without the etching resist 12 is removed by etching, and a thick film power circuit 14 is formed in the left half portion 6 on the base film 1 as shown in FIG.
Then, a thin-film ground circuit 15 and a signal circuit 16 are formed, and the electromagnetic shield copper foil layer 17 is left in the right half portion 11. The etching resist 12 is removed. In addition,
The method of forming the circuits 14 and 16 is described in Japanese Patent Application No. 5-115.
No. 747 has already been proposed.

【0011】そして図7においてシールド用銅箔層17
とベースフィルム1との回路長手方向の前後端部18,
18を一体にトリミングして一定幅で除去する。さらに
図8の如く最外側のアース回路15の表面上に導電性接
着剤19を塗布し、他のパワー回路14と信号回路16
とに絶縁性接着剤20を印刷塗布する。
Then, in FIG. 7, the copper foil layer 17 for shielding is used.
Front and rear end portions 18 in the circuit longitudinal direction between the base film 1 and the base film 1,
18 is integrally trimmed and removed with a constant width. Further, as shown in FIG. 8, a conductive adhesive 19 is applied on the surface of the outermost earth circuit 15, and another power circuit 14 and signal circuit 16 are provided.
The insulating adhesive 20 is applied by printing.

【0012】最後にシールド用銅箔層17を有する回路
板21の右半部11をベースフィルム1の中央(図の鎖
線イ部)から各回路14〜16上に向けて折り返して、
該シールド用銅箔層17を絶縁層(絶縁性接着剤)20
を介してパワー回路14と信号回路16上に被着させる
と共に、該シールド用銅箔層17の側端部を導電性接着
剤19でアース回路15に接着接続させる。
Finally, the right half portion 11 of the circuit board 21 having the shielding copper foil layer 17 is folded back from the center of the base film 1 (the portion indicated by the chain line a in the figure) toward the respective circuits 14 to 16.
The shielding copper foil layer 17 is replaced with an insulating layer (insulating adhesive) 20.
The power circuit 14 and the signal circuit 16 are adhered to the grounding circuit 15 by means of a conductive adhesive 19 and the side ends of the copper foil layer 17 for shielding are bonded and connected to the ground circuit 15 with a conductive adhesive 19.

【0013】これにより図9のようなフラットシールド
回路体22が完成する。各回路14〜16の端末は前記
トリミングで外部に露出して端子部14a〜16aを構
成する。該シールド用銅箔層17は導電性接着剤19で
アース回路15に接着接続すると共に、絶縁性接着剤2
0を介してパワー回路14及び信号回路16上に被着す
る。そしてパワー回路14と信号回路16とはシールド
用銅箔層17で覆われて電気的に遮蔽され、アース回路
15の端子部15aを経て外部に電気ノイズが逃がされ
る。
As a result, the flat shield circuit body 22 as shown in FIG. 9 is completed. The terminals of the circuits 14 to 16 are exposed to the outside by the trimming to form the terminal portions 14a to 16a. The shielding copper foil layer 17 is adhesively connected to the ground circuit 15 with a conductive adhesive 19, and the insulating adhesive 2
It is deposited on the power circuit 14 and the signal circuit 16 through 0. The power circuit 14 and the signal circuit 16 are covered with the copper foil layer 17 for shielding and electrically shielded, and electric noise is released to the outside through the terminal portion 15a of the earth circuit 15.

【0014】[0014]

【発明の効果】以上の如くに、本発明によれば、シール
ド用導電層の形成とアース回路の形成とが同時に行わ
れ、且つ回路板を折り返すことにより、アース回路とシ
ールド用導電層との接続と、シールド用導電層による他
の回路の電気的シールドとが同時に行われるから、フラ
ットシールド回路体を少ない工数で簡単に製造でき、し
かも製造の自動化が可能であるから、それにより生産性
が向上し、コストも低減される。
As described above, according to the present invention, the formation of the conductive layer for shield and the formation of the ground circuit are simultaneously performed, and the circuit board is folded back so that the ground circuit and the conductive layer for the shield are formed. Since the connection and the electrical shielding of other circuits by the conductive layer for shielding are performed at the same time, the flat shield circuit body can be easily manufactured with a small number of steps, and the manufacturing can be automated, thereby improving the productivity. Better, cost is reduced.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明に係るフラットシールド回路体の製造方
法の一段階としての銅箔付きフィルムを示す側面図であ
る。
FIG. 1 is a side view showing a film with a copper foil as one step of a method for manufacturing a flat shield circuit body according to the present invention.

【図2】同じく銅箔付きフィルムにメッキレジストを印
刷した状態の側面図である。
FIG. 2 is a side view showing a state in which a plating resist is printed on a film with copper foil.

【図3】回路予定部に重合層を鍍着させた状態の側面図
である。
FIG. 3 is a side view showing a state in which a polymer layer is plated on a predetermined portion of the circuit.

【図4】メッキレジストを除去した状態の側面図であ
る。
FIG. 4 is a side view showing a state where the plating resist is removed.

【図5】回路予定部とシールド用導電層にエッチングレ
ジストを印刷した状態の側面図である。
FIG. 5 is a side view showing a state in which an etching resist is printed on a planned circuit portion and a conductive layer for shielding.

【図6】エッチングで各回路を形成した状態の側面図で
ある。
FIG. 6 is a side view showing a state where each circuit is formed by etching.

【図7】回路板のシールド用導電層側の端部をトリミン
グする状態の斜視図である。
FIG. 7 is a perspective view showing a state in which an end portion of the circuit board on the side of the conductive layer for shielding is trimmed.

【図8】回路に導電及び絶縁性の接着剤を塗布した状態
の斜視図である。
FIG. 8 is a perspective view showing a state in which a conductive and insulating adhesive is applied to the circuit.

【図9】回路板を中央から折り返してフラットシールド
回路体を形成した状態の斜視図である。
FIG. 9 is a perspective view of a state where the circuit board is folded back from the center to form a flat shield circuit body.

【図10】従来例を示す平面図である。FIG. 10 is a plan view showing a conventional example.

【符号の説明】[Explanation of symbols]

1 ベースフィルム 2 銅箔 4,9,10 回路予定部 12 エッチングレジスト 15 アース回路 17 シールド用銅箔層 19 導電性接着剤 20 絶縁性接着剤 21 回路板 22 フラットシールド回路体 1 Base Film 2 Copper Foil 4, 9, 10 Planned Circuit Area 12 Etching Resist 15 Earth Circuit 17 Copper Foil Layer for Shield 19 Conductive Adhesive 20 Insulating Adhesive 21 Circuit Board 22 Flat Shield Circuit Body

フロントページの続き (51)Int.Cl.6 識別記号 庁内整理番号 FI 技術表示箇所 H05K 9/00 R Continuation of the front page (51) Int.Cl. 6 Identification number Office reference number FI technical display location H05K 9/00 R

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 ベースフィルム上に形成された導電層に
エッチングレジストを付着させて該導電層の片半部にお
いて回路予定部を形成し、該導電層をエッチングして該
回路予定部に複数の回路を形成させると共に、該導電層
の他の片半部においてシールド用導電層を残存させて回
路板を形成し、該複数の回路のうちの外側のアース回路
に導電性接着剤を塗布し、他の回路に絶縁性接着剤を塗
布して、該回路板を中央から折り返して、該シールド用
導電層を該アース回路に接着接続させると共に、他の回
路に絶縁性接着剤を介して被着させることを特徴とする
フラットシールド回路体の製造方法。
1. An etching resist is adhered to a conductive layer formed on a base film to form a predetermined circuit portion in one half of the conductive layer, and the conductive layer is etched to form a plurality of portions in the predetermined circuit portion. A circuit is formed and a shield conductive layer is left in the other half of the conductive layer to form a circuit board, and a conductive adhesive is applied to an outer ground circuit of the plurality of circuits, An insulating adhesive is applied to another circuit, the circuit board is folded back from the center so that the shield conductive layer is adhesively connected to the ground circuit, and the other circuit is attached via the insulating adhesive. A method for manufacturing a flat shield circuit body, comprising:
【請求項2】 中央から折り返されたベースフィルム
と、該ベースフィルムの表面の片半部に形成された複数
の回路と、該表面の他の片半部に形成され、該複数の回
路に対向するシールド用導電層と、該複数の回路のうち
の外側のアース回路に塗布された導電性接着剤と、該ア
ース回路を除く他の回路に塗布された絶縁性接着剤とで
構成され、該シールド用導電層が導電性接着剤で該アー
ス回路に接続し、且つ該絶縁性接着剤を介して他の回路
に被着したことを特徴とするフラットシールド回路体。
2. A base film folded back from the center, a plurality of circuits formed on one half of the surface of the base film, and a plurality of circuits formed on the other half of the surface, facing the plurality of circuits. A conductive layer for shielding, a conductive adhesive applied to an outer earth circuit of the plurality of circuits, and an insulating adhesive applied to other circuits except the earth circuit, A flat shield circuit body characterized in that a conductive layer for shielding is connected to the earth circuit with a conductive adhesive and is adhered to another circuit via the insulating adhesive.
JP264395A 1995-01-11 1995-01-11 Flat shielding circuit body and its manufacture Withdrawn JPH08190812A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP264395A JPH08190812A (en) 1995-01-11 1995-01-11 Flat shielding circuit body and its manufacture

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP264395A JPH08190812A (en) 1995-01-11 1995-01-11 Flat shielding circuit body and its manufacture

Publications (1)

Publication Number Publication Date
JPH08190812A true JPH08190812A (en) 1996-07-23

Family

ID=11535055

Family Applications (1)

Application Number Title Priority Date Filing Date
JP264395A Withdrawn JPH08190812A (en) 1995-01-11 1995-01-11 Flat shielding circuit body and its manufacture

Country Status (1)

Country Link
JP (1) JPH08190812A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2518736A1 (en) * 2011-04-29 2012-10-31 Tyco Electronics Nederland B.V. Cable assembly comprising a flexible support made from a textile material
KR101909832B1 (en) * 2017-09-14 2018-10-18 김애경 Manufacturing method of film type data communication cable and its products

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2518736A1 (en) * 2011-04-29 2012-10-31 Tyco Electronics Nederland B.V. Cable assembly comprising a flexible support made from a textile material
WO2012146578A3 (en) * 2011-04-29 2012-12-27 Tyco Electronics Nederland Bv Cable assembly comprising a flexible support made from a textile material
KR101909832B1 (en) * 2017-09-14 2018-10-18 김애경 Manufacturing method of film type data communication cable and its products

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