JPH08172419A - Cdma transmitter-receiver - Google Patents

Cdma transmitter-receiver

Info

Publication number
JPH08172419A
JPH08172419A JP33441394A JP33441394A JPH08172419A JP H08172419 A JPH08172419 A JP H08172419A JP 33441394 A JP33441394 A JP 33441394A JP 33441394 A JP33441394 A JP 33441394A JP H08172419 A JPH08172419 A JP H08172419A
Authority
JP
Japan
Prior art keywords
complex
imaginary
real
signal
spread
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP33441394A
Other languages
Japanese (ja)
Other versions
JP2655116B2 (en
Inventor
Takashi Ando
毅史 安藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP33441394A priority Critical patent/JP2655116B2/en
Publication of JPH08172419A publication Critical patent/JPH08172419A/en
Application granted granted Critical
Publication of JP2655116B2 publication Critical patent/JP2655116B2/en
Priority to US09/874,227 priority patent/US20010026578A1/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Filters That Use Time-Delay Elements (AREA)

Abstract

PURPOSE: To eliminate inter-code interference and to correct frequency deviation by turning the real number part and imaginary number part of complex numbers to the product of the complex numbers by non-correlated random complex spreading codes and spreading and modulating transmission data. CONSTITUTION: At the ti.me of transmission, the transmission data D are distributed for each data cycle in a serial/parallel converter 10 and real number part modulation input waves R1 and imaginary number part modulation input waves C1 are outputted to a spread modulation part 13. Simultaneously, PN signal generation parts 11 and 12 output real number complex spreading codes R2 and imaginary number complex spreading codes C2 to the modulation part 13. Then, the input waves R1 and the codes R2 and the input waves C1 and the codes C2 are subtracted after multiplication and turned to real number signals R3, the codes R2 and the input waves C1 and the codes C2 and the input waves R1 are added after the multiplication and turned to imaginary number signals C3 and a receiver 20 receives modulation signals S synthesized in a vector synthesizer 14. Then, sampling is performed by the double of a spread rate in the sampling part 40 of a fractional interval type equalizer 22 and further, the signals S are demodulated in a waveform equalizer 23.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、符号間干渉を除去する
ことが可能なCDMA送受信機に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a CDMA transceiver capable of eliminating intersymbol interference.

【0002】[0002]

【従来の技術】セルラー方式デジタル移動通信の周波数
利用効率を改善するためには、同一チャンネル干渉波の
除去を行う必要がある。そして、セルラーシステムで干
渉キャンセラを使用するためには、アクセスチャンネ
ル,ユーザパケット等のランダムアクセス信号を受信で
きなければならない。また、マルチパス環境下でユーザ
キャパシティが減らないようにするためには、マルチパ
スに追従しなければならない。
2. Description of the Related Art In order to improve the frequency utilization efficiency of cellular digital mobile communications, it is necessary to remove co-channel interference waves. In order to use an interference canceller in a cellular system, it is necessary to be able to receive a random access signal such as an access channel and a user packet. Further, in order to prevent the user capacity from decreasing in a multipath environment, it is necessary to follow the multipath.

【0003】セルラーシステムの信号伝送においては、
マルチパス伝幡路で発生する符号間干渉歪を除去する技
術として、適応型等化方式があり、いろいろな適応アル
ゴリズムと組み合わせた線形等化,判定帰還型等化(D
FE),最尤系列推定(MLSE)等がある。符号間干
渉の除去を目的とした復調は、これらの技術を組み合わ
せて行っている。また、マルチパス環境下でのデータ伝
送における伝送障害の要因には、キャリアの位相ずれ,
タイミング位相ずれ,キャリア周波数ずれ,タイミング
周波数ずれ等がある。したがって、このような周波数ず
れを補正しなければならない。
In the signal transmission of a cellular system,
As a technique for removing intersymbol interference distortion generated in a multipath propagation path, there is an adaptive equalization method, and linear equalization and decision feedback equalization (D
FE), maximum likelihood sequence estimation (MLSE), and the like. Demodulation for the purpose of removing intersymbol interference is performed by combining these techniques. In addition, the causes of transmission failure in data transmission under multipath environment include carrier phase shift,
There are timing phase shift, carrier frequency shift, timing frequency shift and the like. Therefore, such frequency deviation must be corrected.

【0004】上記したような符号間干渉の除去や周波数
ずれ補正を行う従来の技術としては、特開平4−352
523号公報に記載されたデータ伝送復調器がある。図
2はその構成を示すブロック図である。この技術は、判
定器100に与える加算器101からの加算出力に対し
ては、その位相変動量に応じて位相変動量を補償するよ
うに位相回転を与えるようになっている。
As a conventional technique for removing the intersymbol interference and correcting the frequency shift as described above, Japanese Patent Laid-Open No. 4-352 is known.
No. 523 discloses a data transmission demodulator. FIG. 2 is a block diagram showing the configuration. According to this technique, a phase rotation is given to an addition output from an adder 101 to be given to a determiner 100 so as to compensate for the amount of phase fluctuation according to the amount of phase fluctuation.

【0005】また、判定器100の後方にあり、シフト
レジスタ102と乗算器103とで構成される後方フィ
ルタに与える判定器100からの判定出力とタップ係数
制御部104に与える誤差とに対しては、位相制御部1
05,複素共役部106,乗算器107によって、位相
変動量に応じた位相変動量を付加するように位相回転を
与える構成になっている。
[0005] In addition, a decision output from the decision unit 100 to be provided to a rear filter constituted by a shift register 102 and a multiplier 103, which is located after the decision unit 100, and an error to be given to the tap coefficient control unit 104 are as follows. , Phase control unit 1
05, the complex conjugate unit 106, and the multiplier 107 provide a phase rotation so as to add a phase fluctuation amount corresponding to the phase fluctuation amount.

【0006】このような構成により、周波数オフセット
等の位相変動が生じた場合に、収束、速度を低下させる
ことなく、符号間干渉の除去と周波数ずれの補正を行う
ことができるようになっている。
With this configuration, when a phase variation such as a frequency offset occurs, it is possible to remove intersymbol interference and correct a frequency shift without lowering convergence and speed. .

【0007】[0007]

【発明が解決しようとする課題】しかし、上記した従来
の技術では、速度を低下させることなく、符号間干渉の
除去と周波数ずれの補正を行うことができるが、位相回
転を与えるために、減算器108や、シフトレジスタ1
02及び乗算器103や、位相制御部105,複素共役
部106及び乗算器107等の多数の部品で回路構成を
する必要であるので、回路構成が複雑になり、装置全体
が大型化してしまうという問題がある。
However, according to the above-described conventional technique, it is possible to remove intersymbol interference and correct a frequency shift without lowering the speed. Unit 108 and shift register 1
02 and the multiplier 103, the phase control unit 105, the complex conjugate unit 106, the multiplier 107, and a number of other components, which requires a circuit configuration, which complicates the circuit configuration and increases the size of the entire device. There's a problem.

【0008】本発明は上記問題点にかんがみてなされた
もので、簡単な構成で符号間干渉の除去と周波数ずれの
補正とを行うことができるCDMA送受信機の提供を目
的とする。
The present invention has been made in view of the above problems, and an object of the present invention is to provide a CDMA transceiver capable of removing intersymbol interference and correcting frequency shift with a simple structure.

【0009】[0009]

【課題を解決するための手段】上記目的を達成するた
め、本発明のCDMA送受信機は、複素数の実数部及び
虚数部がそれぞれ無相関かつランダムな複素拡散符号を
用いて、複素数の積として送信データを拡散変調する送
信手段と、分数間隔形等化器と複素数型RLS適応アル
ゴリズムを用いた波形等化器とで上記送信データを復調
する受信手段とを備えた構成としてある。
In order to achieve the above object, a CDMA transceiver according to the present invention transmits as a product of complex numbers by using a complex spreading code in which real and imaginary parts of a complex number are uncorrelated and random. The transmission means for spreading and modulating the data, and the reception means for demodulating the transmission data by a fractional interval type equalizer and a waveform equalizer using a complex number type RLS adaptive algorithm are provided.

【0010】請求項2の発明は、上記送信手段が、上記
送信データを実数部の変調入力波と虚数部の変調入力波
を発生する直並列変換器と、実数部と虚数部がそれぞれ
無相関でかつランダムな実数の複素拡散符号及び虚数の
複素拡散符号を発生するPN信号発生器と、上記直並列
変換器からの実数部変調入力波及び虚数部変調入力波と
上記PN信号発生器からの実数複素拡散符号及び虚数複
素拡散符号との複素積によるスペクトル拡散変調を行う
拡散変調部と、この拡散変調部からの実数信号と虚数信
号とのベクトル合成を行うベクトル合成部と、ベクトル
合成部の出力信号の帯域制限を行う送信フィルタとを備
え、上記受信手段が、受信信号の帯域制限を行う受信フ
ィルタと、分数間隔形等化を行い受信信号を拡散レート
の2倍でサンプリングする分数間隔形等化器と、フィル
タの係数更新アルゴリズムにRLS適応アルゴリズムを
用いたトランスバーサル形デジタルフィルタである波形
等化器とを備える構成としてある。
According to a second aspect of the present invention, the transmitting means generates the modulated input wave of the real number part and the modulated input wave of the imaginary number part of the transmission data, and the serial-parallel converter has no correlation between the real number part and the imaginary number part. PN signal generator for generating a real complex random spread code and an imaginary complex spread code, and a real part modulated input wave and an imaginary part modulated input wave from the serial-parallel converter and the PN signal generator. A spread modulation unit that performs spread spectrum modulation by a complex product of a real complex spread code and an imaginary complex spread code, a vector synthesis unit that performs vector synthesis of a real signal and an imaginary signal from this spread modulation unit, and a vector synthesis unit A receiving filter for limiting the band of the output signal is provided, and the receiving means performs a sampling filter for limiting the band of the receiving signal and a sampling filter for the received signal at twice the spreading rate by performing fractional interval equalization. A fractionally spaced equalizer that graying is configured to include a waveform equalizer is transversal digital filter using the RLS adaptive algorithm coefficient update algorithm of the filter.

【0011】[0011]

【作用】請求項1のCDMA送受信機によれば、送信手
段において、複素数の実数部及び虚数部がそれぞれ無相
関かつランダムな複素拡散符号を用いて、複素数の積と
して送信データが拡散変調され、受信手段において、分
数間隔形等化器と複素数型RLS適応アルゴリズムを用
いた波形等化器とで送信データが復調される。
According to the CDMA transceiver of the first aspect, in the transmitting means, transmission data is spread-modulated as a product of complex numbers using a complex spreading code in which a real part and an imaginary part of a complex number are respectively uncorrelated and random, In the receiving means, the transmission data is demodulated by a fractionally spaced equalizer and a waveform equalizer using a complex RLS adaptive algorithm.

【0012】請求項2のCDMA送受信機によれば、送
信手段の直並列変換器から送信データを実数部の変調入
力波と虚数部の変調入力波とが発生し、PN信号発生器
から実数部と虚数部がそれぞれ無相関でかつランダムな
実数の複素拡散符号,虚数の複素拡散符号が発生する。
そして、拡散変調部において、直並列変換器からの実数
部変調入力波及び虚数部変調入力波とPN信号発生器か
らの実数複素拡散符号及び虚数複素拡散符号との複素積
によるスペクトル拡散変調が行われる。
According to the CDMA transceiver of the present invention, the serial-parallel converter of the transmitting means generates the modulated input wave of the real part and the modulated input wave of the imaginary part of the transmission data, and the PN signal generator generates the modulated input wave of the real part. And a imaginary part are uncorrelated and random, respectively, and a real complex spreading code and an imaginary complex spreading code are generated.
Then, in the spread modulator, spread spectrum modulation is performed by a complex product of the real part modulated input wave and the imaginary part modulated input wave from the serial-parallel converter and the real complex spread code and the imaginary complex spread code from the PN signal generator. Will be

【0013】しかる後、ベクトル合成部で拡散変調部か
らの実数信号と虚数信号とのベクトル合成が行われ、送
信フィルタによって、ベクトル合成部の出力信号の帯域
制限が行われる。そして、受信時には、受信手段の受信
フィルタで受信信号の帯域制限が行われた後、分数間隔
形等化器において、分数間隔形等化が行われ、受信信号
の拡散レートの2倍でサンプリングされる。そして、波
形等化器によって、RLS適応アルゴリズムを用いて受
信信号が復調される。
Thereafter, the vector synthesis section performs vector synthesis of the real number signal and the imaginary number signal from the spread modulation section, and the transmission filter limits the band of the output signal of the vector synthesis section. Then, at the time of reception, after the band of the received signal is limited by the reception filter of the receiving means, the fractionally-spaced equalizer performs fractional-spaced equalization, and is sampled at twice the spreading rate of the received signal. It The received signal is demodulated by the waveform equalizer using the RLS adaptive algorithm.

【0014】[0014]

【実施例】以下、本発明の実施例について図面を参照し
て説明する。図1は、本発明の一実施例に係るCDMA
送受信機を示すブロック図である。図1において、1は
送信手段としての送信部であり、2は受信手段としての
受信部である。
Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 shows a CDMA according to an embodiment of the present invention.
It is a block diagram which shows a transceiver. In FIG. 1, reference numeral 1 denotes a transmitting unit as a transmitting unit, and 2 denotes a receiving unit as a receiving unit.

【0015】送信部1は、複素数の実数部及び虚数部が
それぞれ無相関かつランダムな複素拡散符号を用いて、
複素数の積として送信データDを拡散変調するための部
分であり、直並列変換器10と、PN信号(疑似雑音信
号)発生器11,12と、拡散変調部13と、ベクトル
合成部14と、送信フィルタ15と、送信器16とを備
えている。
The transmitting unit 1 uses a complex spreading code in which the real part and the imaginary part of a complex number are uncorrelated and random, respectively.
A part for spreading and modulating the transmission data D as a product of complex numbers. The serial / parallel converter 10, PN signal (pseudo noise signal) generators 11 and 12, a spreading modulator 13, a vector synthesizer 14, A transmission filter 15 and a transmitter 16 are provided.

【0016】直並列変換器10は、デジタルデータであ
る送信データDを1データ周期毎に振り分け、実数部
(I相、In−phase)の変調入力波R1と虚数部
(Q相、Quadrature−phase)の変調入
力波C1とを発生する機器である。PN信号発生器1
1,12は、実数部と虚数部がそれぞれ無相関でかつラ
ンダムな実数の複素拡散符号R2,虚数の複素拡散符号
C2を発生する機器である。
The serial-parallel converter 10 distributes the transmission data D, which is digital data, for each data cycle, and the modulated input wave R1 of the real part (I phase, In-phase) and the imaginary part (Q phase, Quadrature-phase). ) Is a device for generating a modulated input wave C1. PN signal generator 1
Reference numerals 1 and 12 denote devices for generating a real complex spreading code R2 and a imaginary complex spreading code C2 in which the real part and the imaginary part are uncorrelated and random, respectively.

【0017】拡散変調部13は、直並列変換器10から
の実数部変調入力波R1及び虚数部変調入力波C1と、P
N信号発生器11,12からの実数複素拡散符号R2及
び虚数複素拡散符号C2とを入力し、これらの複素積に
よるスペクトル拡散変調を行う部分である。具体的に
は、直並列変換器10の出力側に、乗算器31,32と
減算器33とが設けられている。乗算器31は実数部変
調入力波R1と実数複素拡散符号R2との乗算を行い、乗
算器32は虚数部変調入力波C1と虚数複素拡散符号C2
との乗算を行い、減算器33は乗算器31,32からの
出力信号の減算を行うようになっている。
The spread modulation unit 13 includes a real part modulated input wave R 1 and an imaginary part modulated input wave C 1 from the serial-parallel converter 10,
The real number complex spread code R2 and the imaginary complex spread code C2 from the N signal generators 11 and 12 are input, and spread spectrum modulation is performed by a complex product of these. Specifically, multipliers 31 and 32 and a subtractor 33 are provided on the output side of the serial-parallel converter 10. The multiplier 31 multiplies the real part modulated input wave R1 and the real complex spread code R2, and the multiplier 32 calculates the imaginary part modulated input wave C1 and the imaginary complex spread code C2.
, And the subtractor 33 subtracts the output signals from the multipliers 31 and 32.

【0018】また、PN信号発生器11,12の出力側
には、乗算器34,35と加算器36とが設けられてい
る。乗算器34は実数複素拡散符号R2と虚数部変調入
力波C1との乗算を行い、乗算器35は虚数複素拡散符
号C2と実数部変調入力波R1との乗算を行い、加算器3
6は乗算器34,35からの出力信号の加算を行う。
On the output side of the PN signal generators 11, 12, multipliers 34, 35 and an adder 36 are provided. The multiplier 34 multiplies the real complex spreading code R2 by the imaginary part modulated input wave C1, and the multiplier 35 multiplies the imaginary complex spreading code C2 by the real part modulated input wave R1.
Reference numeral 6 adds the output signals from the multipliers 34 and 35.

【0019】ベクトル合成部14は、拡散変調部13の
減算器33からの実数信号R3と加算器36からの虚数
信号C3とのベクトル合成を行う部分である。送信フィ
ルタ15は、いわゆるルートコサインフィルタであり、
ベクトル合成部14からの合成変調信号Sの帯域制限を
行う。送信器16は、送信フィルタ15で帯域制限され
た変調信号Sを送信する機器である。
The vector synthesizing section 14 is a section for performing vector synthesizing of the real number signal R3 from the subtractor 33 of the spread modulation section 13 and the imaginary number signal C3 from the adder 36. The transmission filter 15 is a so-called root cosine filter,
The bandwidth of the combined modulation signal S from the vector combining unit 14 is limited. The transmitter 16 is a device that transmits the modulated signal S band-limited by the transmission filter 15.

【0020】一方、受信部2は、受信器20と、受信フ
ィルタ21と、分数間隔形等化器22と、波形等化器2
3とを備え、分数間隔形等化器22と複素数型RLS
(Recursive Least Square)適
応アルゴリズムを用いた波形等化器23とで送信データ
Dを復調するための部分である。
On the other hand, the receiver 2 includes a receiver 20, a reception filter 21, a fractionally-spaced equalizer 22, and a waveform equalizer 2.
3, a fractionally-spaced equalizer 22 and a complex type RLS
(Recursive Least Square) This is a part for demodulating the transmission data D with the waveform equalizer 23 using an adaptive algorithm.

【0021】受信器20は、送信部1からの変調信号S
を受信して、受信フィルタ21に出力する部分である。
受信フィルタ21は、いわゆるルートコサインフィルタ
であり、受信信号Sの帯域制限を行う。
The receiver 20 receives the modulated signal S from the transmitter 1.
Is received and output to the reception filter 21.
The reception filter 21 is a so-called root cosine filter, and limits the band of the reception signal S.

【0022】分数間隔形等化器22は、分数間隔形等化
を行うサンプリング回路であり、受信信号Sを拡散レー
トの二倍でサンプリングすることができる。具体的に
は、サンプリング部40を介して直列に接続された複数
の遅延素子41−1〜41−n−1と、複数のスイッチ
部42−1〜42−nとが設けられている。そして、サ
ンプリング部40を受信信号Sの拡散レートの二倍で動
作させるクロック信号S1を出力するクロック43が設
けられている。このクロック信号S1は、スイッチ部4
2−1〜42−nへも入力され、スイッチ部42−1〜
42−nがサンプリング部40と同期して動作するよう
になっている。
The fractionally-spaced equalizer 22 is a sampling circuit that performs fractionally-spaced equalization, and can sample the received signal S at twice the spreading rate. Specifically, a plurality of delay elements 41-1 to 41-n-1 connected in series via a sampling section 40 and a plurality of switch sections 42-1 to 42-n are provided. Further, a clock 43 for outputting a clock signal S1 for operating the sampling unit 40 at twice the spreading rate of the received signal S is provided. The clock signal S1 is supplied to the switch unit 4
It is also input to 2-1 to 42-n, and the switch section 42-1 to
42-n operate in synchronization with the sampling section 40.

【0023】波形等化器23は、フィルタの係数更新ア
ルゴリズムにRLS適応アルゴリズムを用いたトランス
バーサル形デジタルフィルタである。具体的には、入力
側にスイッチ部42−1〜42−nが接続された複数の
タップ係数部F1〜Fnを有している。このタップ係数
部F1〜Fnはフィードバックされた後述する差分信号
e(n)が零になるように出力信号を制御する機能を有
している。そして、このようなタップ係数部F1〜Fn
の出力側に、タップ係数部F1〜Fnからの出力信号を
加算する加算器51が設けられている。加算器51の出
力側には、タップ係数部F1〜Fnの出力信号Y(n)
と希望信号d(n)とを減算し、その差分信号e(n)
を各タップ係数部F1〜Fnにフィードバックする減算
器52が設けられている。
The waveform equalizer 23 is a transversal type digital filter using an RLS adaptive algorithm as a filter coefficient updating algorithm. Specifically, it has a plurality of tap coefficient sections F1 to Fn to which the switch sections 42-1 to 42-n are connected on the input side. The tap coefficient units F1 to Fn have a function of controlling the output signal so that the fed back difference signal e (n) described later becomes zero. Then, such tap coefficient parts F1 to Fn
The adder 51 for adding the output signals from the tap coefficient units F1 to Fn is provided on the output side of the. On the output side of the adder 51, output signals Y (n) of the tap coefficient units F1 to Fn are provided.
And the desired signal d (n) are subtracted, and the difference signal e (n) is obtained.
Is provided to each of the tap coefficient units F1 to Fn.

【0024】次に、本実施例の動作について説明する。
送信部1における送信時には、直並列変換器10におい
て、送信データDが1データ周期毎に振り分けられ、実
数部の変調入力波R1と虚数部の変調入力波C1とが拡散
変調部13に出力される。この動作と並行して、PN信
号発生器11,12が、実数複素拡散符号R2,虚数複
素拡散符号C2を発生し、拡散変調部13に出力する。
Next, the operation of this embodiment will be described.
At the time of transmission by the transmitter 1, the serial-parallel converter 10 distributes the transmission data D for each data cycle, and outputs the real number modulated input wave R1 and the imaginary number modulated input wave C1 to the spread modulator 13. It In parallel with this operation, the PN signal generators 11 and 12 generate a real complex spreading code R2 and an imaginary complex spreading code C2 and output them to the spreading modulator 13.

【0025】すると、拡散変調部13の乗算器31にお
いて、実数部変調入力波R1と実数複素拡散符号R2とが
乗算され、乗算器32において、虚数部変調入力波C1
と虚数複素拡散符号C2とが乗算された後、減算器33
において、乗算器31,32からの出力信号が減算され
る。また、この動作と並行して、乗算器34において、
実数複素拡散符号R2と虚数部変調入力波C1とが乗算さ
れ、乗算器35において、虚数複素拡散符号C2と実数
部変調入力波R1とが乗算された後、加算器36におい
て、乗算器34,35からの出力信号が加算される。
Then, the multiplier 31 of the spread modulator 13 multiplies the real part modulated input wave R 1 by the real complex spread code R 2, and the multiplier 32 multiplies the imaginary part modulated input wave C 1
And the imaginary complex spreading code C2,
In, the output signals from the multipliers 31 and 32 are subtracted. In parallel with this operation, the multiplier 34
The real complex spreading code R2 is multiplied by the imaginary part modulation input wave C1, and the imaginary complex spreading code C2 is multiplied by the real part modulation input wave R1 in the multiplier 35. The output signals from 35 are added.

【0026】そして、拡散変調部13から実数信号R3
と虚数信号C3とが出力されると、ベクトル合成部14
において、これらの信号がベクトル合成され、その合成
変調信号Sが送信フィルタ15で帯域制限された後、送
信器16から受信部2に送信される。
Then, the real number signal R3
And the imaginary number signal C3 are output,
, These signals are vector-synthesized, and the synthesized modulated signal S is band-limited by the transmission filter 15, and then transmitted from the transmitter 16 to the receiver 2.

【0027】すると、変調信号Sは、受信部2の受信器
20で受信され、受信フィルタ21で帯域制限された
後、分数間隔形等化器22に入力される。分数間隔形等
化器22に受信信号Sが入力されると、分数間隔形等化
器22のサンプリング部40によって、拡散レートの二
倍でサンプリングされ、各信号が順次遅延素子41−1
〜41−n−1に格納されると共に、スイッチ部42−
1〜42−nを介して波形等化器23のタップ係数部F
1〜Fnに入力される。
Then, the modulated signal S is received by the receiver 20 of the receiving unit 2, band-limited by the reception filter 21, and then input to the fractionally spaced equalizer 22. When the received signal S is input to the fractionally-spaced equalizer 22, the sampling unit 40 of the fractionally-spaced equalizer 22 samples the signal at twice the spreading rate, and each signal is sequentially delayed by the delay element 41-1.
To 41-n-1 and a switch unit 42-n-1.
1 to 42-n, the tap coefficient section F of the waveform equalizer 23
1 to Fn.

【0028】このタップ係数部F1〜Fnに入力された
信号は、減算器52からフィードバックされた差分信号
e(n)が零になるように制御されて出力される。そし
て、タップ係数部F1〜Fnから出力された信号が加算
器51によって加算された後、出力信号Y(n)として
出力される。これと並行して、出力信号Y(n)と希望
信号d(n)とが減算器52で減算され、その差分信号
e(n)が各タップ係数部F1〜Fnにフィードバック
される。すなわち、波形等化器23において、フィルタ
の係数更新にRLS適応アルゴリズムが用いられて、受
信信号Sが復調されるのである。
The signals input to the tap coefficient portions F1 to Fn are controlled and output so that the difference signal e (n) fed back from the subtractor 52 becomes zero. Then, the signals output from the tap coefficient units F1 to Fn are added by the adder 51 and then output as the output signal Y (n). In parallel with this, the output signal Y (n) and the desired signal d (n) are subtracted by the subtractor 52, and the difference signal e (n) is fed back to the tap coefficient units F1 to Fn. That is, in the waveform equalizer 23, the received signal S is demodulated by using the RLS adaptive algorithm for updating the filter coefficients.

【0029】[0029]

【発明の効果】以上のように本発明のCDMA送受信機
によれば、送信手段において、複素数の実数部及び虚数
部がそれぞれ無相関かつランダムな複素拡散符号を用い
て、複素数の積として送信データが拡散変調されるの
で、BPSK変調方式で変調する場合に比べると、シン
ボル周期が二倍になり、このため、拡散符号長を二倍に
できる。この結果、拡散符号の種類を多くとることがで
きることとなり、多重ユーザ数の増加に繋がると共に、
より広い範囲に渡るマルチパスでの符号間干渉を除去す
ることができるという効果がある。
As described above, according to the CDMA transceiver of the present invention, in the transmitting means, the real part and the imaginary part of the complex number are each transmitted using the uncorrelated and random complex spreading code as a product of the complex numbers. Is spread-modulated, so that the symbol period is doubled as compared with the case where the modulation is performed by the BPSK modulation method, so that the spreading code length can be doubled. As a result, the number of types of spreading codes can be increased, which leads to an increase in the number of multiplex users,
There is an effect that intersymbol interference in multipath over a wider range can be removed.

【0030】また、受信手段において、複素数型RLS
適応アルゴリズムを用いた波形等化器とを適用している
ので、I相(In−phase)とQ相(Quadra
ture−phase)とが独立な復調部をもつ必要が
なくなり、受信手段の構成を簡単なものにすることがで
き、この結果、CDMA送受信機全体の小型化を図るこ
とができるという効果がある。さらに、分数間隔形等化
器を併用しているので、タイミングジッタを吸収するこ
とができ、より一層、符号間干渉の除去能力を向上させ
ることができる。
In the receiving means, the complex number type RLS is used.
Since the waveform equalizer using the adaptive algorithm is applied, the I-phase (In-phase) and the Q-phase (Quadra) are used.
Thus, there is no need to provide a demodulation unit independent of the true-phase, so that the configuration of the receiving means can be simplified, and as a result, the size of the entire CDMA transceiver can be reduced. Furthermore, since the fractionally-spaced equalizer is also used, timing jitter can be absorbed, and the intersymbol interference removal capability can be further improved.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例に係るCDMA送受信機を示
すブロック図である。
FIG. 1 is a block diagram illustrating a CDMA transceiver according to an exemplary embodiment of the present invention.

【図2】従来の技術を示すブロック図である。FIG. 2 is a block diagram showing a conventional technique.

【符号の説明】[Explanation of symbols]

1 送信部 2 受信部 10 直並列変換器 11,12 PN信号発生器 13 拡散変調部 14 ベクトル合成部 15 送信フィルタ 21 受信フィルタ 22 分数間隔形等化器 23 波形等化器 DESCRIPTION OF SYMBOLS 1 Transmitting part 2 Receiving part 10 Serial-parallel converter 11, 12 PN signal generator 13 Spreading modulation part 14 Vector synthesis part 15 Transmission filter 21 Reception filter 22 Fractionally-spaced equalizer 23 Waveform equalizer

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 複素数の実数部及び虚数部がそれぞれ無
相関かつランダムな複素拡散符号を用いて、複素数の積
として送信データを拡散変調する送信手段と、 分数間隔形等化器と複素数型RLS適応アルゴリズムを
用いた波形等化器とで上記送信データを復調する受信手
段と、 を備えることを特徴としたCDMA送受信機。
1. A transmission means for spreading-modulating transmission data as a product of complex numbers using a complex spreading code in which real and imaginary parts of a complex number are uncorrelated and random, a fractionally-spaced equalizer and a complex-type RLS. A CDMA transceiver comprising: a waveform equalizer that uses an adaptive algorithm; and a receiving unit that demodulates the transmission data.
【請求項2】 上記送信手段が、上記送信データを実数
部の変調入力波と虚数部の変調入力波を発生する直並列
変換器と、実数部と虚数部がそれぞれ無相関でかつラン
ダムな実数の複素拡散符号及び虚数の複素拡散符号を発
生するPN信号発生器と、上記直並列変換器からの実数
部変調入力波及び虚数部変調入力波と上記PN信号発生
器からの実数複素拡散符号及び虚数複素拡散符号との複
素積によるスペクトル拡散変調を行う拡散変調部と、こ
の拡散変調部からの実数信号と虚数信号とのベクトル合
成を行うベクトル合成部と、ベクトル合成部の出力信号
の帯域制限を行う送信フィルタとを備え、 上記受信手段が、受信信号の帯域制限を行う受信フィル
タと、分数間隔形等化を行い受信信号を拡散レートの2
倍でサンプリングする分数間隔形等化器と、フィルタの
係数更新アルゴリズムにRLS適応アルゴリズムを用い
たトランスバーサル形デジタルフィルタである波形等化
器とを備える、 請求項1記載のCDMA送受信機。
2. A serial-parallel converter for generating the modulated input wave of the real part and the modulated input wave of the imaginary part by the transmission means, and a real number in which the real part and the imaginary part are uncorrelated and random. , A PN signal generator for generating a complex spread code and an imaginary complex spread code, a real part modulated input wave and an imaginary part modulated input wave from the serial-parallel converter, and a real complex spread code from the PN signal generator, Spread spectrum modulator that performs spread spectrum modulation by complex product with imaginary complex spread code, vector synthesizer that synthesizes vector of real signal and imaginary signal from this spread modulator, and band limitation of output signal of vector synthesizer A receiving filter for limiting the band of the received signal, and a receiving filter for performing a fractional interval equalization to spread the received signal at a spreading rate of 2 or more.
The CDMA transceiver according to claim 1, further comprising: a fractionally-spaced equalizer that doubles the sampling frequency; and a waveform equalizer that is a transversal digital filter that uses an RLS adaptive algorithm as a filter coefficient updating algorithm.
JP33441394A 1994-12-19 1994-12-19 CDMA transceiver Expired - Fee Related JP2655116B2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP33441394A JP2655116B2 (en) 1994-12-19 1994-12-19 CDMA transceiver
US09/874,227 US20010026578A1 (en) 1994-12-19 2001-06-06 Code division multiple access transmitter and receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP33441394A JP2655116B2 (en) 1994-12-19 1994-12-19 CDMA transceiver

Publications (2)

Publication Number Publication Date
JPH08172419A true JPH08172419A (en) 1996-07-02
JP2655116B2 JP2655116B2 (en) 1997-09-17

Family

ID=18277103

Family Applications (1)

Application Number Title Priority Date Filing Date
JP33441394A Expired - Fee Related JP2655116B2 (en) 1994-12-19 1994-12-19 CDMA transceiver

Country Status (1)

Country Link
JP (1) JP2655116B2 (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0881786A2 (en) * 1997-05-29 1998-12-02 Nokia Mobile Phones Ltd. Method and apparatus for transmitting two parallel channels using code division
KR100318950B1 (en) * 1998-12-26 2001-12-29 윤종용 apparatus and method for compensating signal distortion in multicode cdma system
KR100727133B1 (en) * 2005-12-26 2007-06-13 주식회사 팬택 Noise and interference margin extensible cdma modulator in the mobile communication terminal
US8860591B2 (en) 2011-07-29 2014-10-14 Fujitsu Semiconductor Limited Analog digital converter
US10305536B2 (en) 1999-05-31 2019-05-28 Electronics And Telecommunications Research Institute Apparatus and method for modulating data message by employing orthogonal variable spreading factor (OVSF) codes in mobile communication system

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0881786A2 (en) * 1997-05-29 1998-12-02 Nokia Mobile Phones Ltd. Method and apparatus for transmitting two parallel channels using code division
EP0881786A3 (en) * 1997-05-29 2003-09-10 Nokia Corporation Method and apparatus for transmitting two parallel channels using code division
KR100633854B1 (en) * 1997-05-29 2007-11-13 노키아 코포레이션 Transmission Method of Two Parallel Channels Using Code Division and Apparatus Implementing The Method
DE19823504B4 (en) * 1997-05-29 2016-05-12 Core Wireless Licensing S.A.R.L. Method, apparatus and system for transmitting data in two parallel channels in code division
KR100318950B1 (en) * 1998-12-26 2001-12-29 윤종용 apparatus and method for compensating signal distortion in multicode cdma system
US10305536B2 (en) 1999-05-31 2019-05-28 Electronics And Telecommunications Research Institute Apparatus and method for modulating data message by employing orthogonal variable spreading factor (OVSF) codes in mobile communication system
KR100727133B1 (en) * 2005-12-26 2007-06-13 주식회사 팬택 Noise and interference margin extensible cdma modulator in the mobile communication terminal
US8860591B2 (en) 2011-07-29 2014-10-14 Fujitsu Semiconductor Limited Analog digital converter

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