JPH08161681A - Detector for state of transmission line - Google Patents

Abstract

PURPOSE: To disconnect a transmission line by allowing the detector to detect a fault state close to a short-circuit state disabling normal transmission as well as a short-circuit state of the transmission line and to send a short-circuit signal and a fault signal respectively to a receiver. CONSTITUTION: A transmission voltage resulting from voltage division by voltage division resistors 4, 5 is A/D-converted by an A/D converter 6 and the converted voltage is received by a CPU 7, and an open signal to open a switch 2 and a short-circuit signal and a fault signal are generated by the discrimination of the CPU 7.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a transmission line state detecting device, and more particularly to a short-circuit state of a transmission line and an abnormal state close to the short-circuit state where the transmission cannot be normally performed, and the short-circuit state and abnormal state The present invention relates to a transmission line state detection device capable of detecting the restoration state of

[0002]

2. Description of the Related Art Conventionally, when a short circuit occurs between a pair of conductors of a transmission line serving as a power line and a signal line to which a fire detector of a fire alarm system is connected, a circuit for disconnecting the short circuit portion is, for example, an actual flat panel 5 It is known from Japanese Patent No. 2294.

[0003]

However, such a conventional disconnecting circuit can detect only a short-circuit state of the transmission line and cannot normally perform transmission, and an abnormal state close to the short-circuit state, for example, a fire receiver. The maximum load current of 150mA is, for example, a state in which a load having a value such that a current, for example, 140mA, which causes a large load on the fire receiver is connected between the conductors on the output side of the disconnection circuit cannot be detected. There were challenges.

Therefore, the present invention has been made in order to solve such a problem, and detects an abnormal state in addition to the short-circuit state of the transmission line, disconnects the transmission line, and simultaneously cuts the short-circuit state and the abnormal state. It is an object of the present invention to obtain a transmission line state detection device capable of distinguishing and notifying the receiver.
In addition, the present invention detects transmission line status by detecting the above-mentioned short-circuit status and the recovery status without abnormal status and reconnecting the disconnected transmission line to restart the transmission and notify the receiver of the recovery status. The purpose is to obtain the device.

[0005]

A transmission line state detecting device according to the present invention as set forth in claim 1 is characterized in that a main current path is inserted in series in a positive conductor of a transmission line which is a power supply line and a signal line.
A normally closed electronic switch, a resistor connected in parallel with the switch and having a high resistance value, and connected between the positive and negative conductors of the transmission line on the output side of the switch, A monitoring device for monitoring the transmission voltage, and this monitoring device, which is connected to the control current path of the switch and the positive conductor, and the transmission voltage is below an abnormal level indicating an abnormal state close to a short-circuited state for a first predetermined time or longer When
First detection means for opening the switch and transmitting an abnormal signal indicating the abnormal state to a receiver through the transmission line; and the transmission voltage indicating the short circuit state for a second predetermined time or more and the abnormal level. And a detection device having second detection means for causing the switch to open and transmitting a short circuit signal indicating the short circuit state to the receiver through the transmission line when the short circuit level becomes lower than a lower level.

In the detection device of the transmission line state detection device according to the present invention as set forth in claim 2, the transmission voltage becomes equal to or higher than a recovery level higher than the abnormal level and the short circuit level for a third predetermined time or longer. At the same time, it further comprises third detecting means for closing the switch and transmitting a restoration signal indicating a restoration state without the abnormal state and the short circuit state to the receiver through the transmission line.

[0007]

According to the invention of claim 1, the transmission voltage is kept at an abnormal level indicating an abnormal state close to a short-circuited state for a first or second predetermined time or longer, or below a short-circuit level indicating a short-circuited state and lower than the abnormal level. At this time, the switch inserted in the transmission line is opened to connect the input and output sides with a high resistance to make the output side current a minute current, and the abnormal signal indicating the abnormal state and the short circuit state are displayed. The short circuit signal is transmitted to the receiver.

According to the second aspect of the present invention, when the transmission voltage of the separated transmission line becomes equal to or higher than the abnormal level and the recovery level higher than the short circuit level for the third predetermined time or longer, the switch that has been opened again. The transmission line is closed to restore the transmission line, and a restoration signal indicating a restoration state without the abnormal state and the short-circuit state is transmitted to the receiver.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention shown in the accompanying drawings will be described in detail below. FIG. 1 is a circuit diagram showing a partial block diagram of an embodiment of a transmission line state detecting device according to the present invention. In the figure, the transmission line which is a power line and a signal line is composed of a positive conductor 1P and a grounded negative conductor 1N, and the left end side thereof is a receiver such as a fire receiver (not shown) or terminal equipment such as a fire detector (not shown). And a right end side thereof is connected to a load represented by a terminal device such as a fire detector or a transmitter (not shown). Positive conductor 1
P is an electronic switch that is normally closed, eg FET2
The main current path of is inserted in series, and in parallel with this main current path,
A resistor 3 having a high resistance value is connected.

On the output side of the switch 2, a monitoring device MM for constantly monitoring the transmission voltage of the transmission line is provided. This monitoring device MM is connected between a positive conductor 1P and a negative conductor 1N and is connected to a plurality of, for example, two voltage dividing resistors 4 and 5 for dividing a transmission voltage, and a connection point of these voltage dividing resistors 4 and 5. A to convert the divided and divided transmission voltage to analog / digital
And a D converter 6.

The detection device DM is connected to the AD converter 6 and has first to third detection means which will be described later, and the switch 2
An open signal to open the switch and a close signal to close the switch 2,
And a microprocessor CPU 7 for generating an abnormal signal, a short circuit signal and a recovery signal, which will be described in detail later, and this C
A transistor 8, which is a control element whose base is connected to the open / close signal output terminal OCO of PU7, whose emitter is grounded, and whose collector is connected to the control current path of the switch 2, the collector of this transistor 8, and the switch The indicator lamp, for example, the light emitting diode 9 connected between the input side positive conductor P of the switch 2 and the input side positive conductor P of the switch 2.
And signal output terminal SBO and signal input terminal SB of CPU7
And a transmission / reception circuit 10 which is connected to I and which transmits the above-mentioned abnormal signal, short circuit signal and recovery signal to the receiver, and which receives required signals such as address signals and interrogation signals from the receiver.

2 to 8 are waveform charts showing various examples of the transmission voltage of the transmission line. FIG. 2 shows the case where the transmission voltage is normal.
Then, FIG. 3 shows a case where the transmission voltage spans normal and an abnormal level indicating an abnormal state close to a short-circuited state, for example, 24 V, but is still regarded as normal.

FIG. 4 shows a case in which the transmission voltage is below a first predetermined time t1 such as 50 ms for an abnormal level, that is, when the transmission voltage is completely between the abnormal level and a short circuit level indicating a short circuit condition, for example, 10 V. Shows that the transmission voltage crosses the abnormal level and the short-circuit level, but is still regarded as abnormal, and FIG. 6 shows that the transmission voltage crosses the abnormal level and the restoration level indicating the restoration state, for example, 27V, but is still considered as abnormal. That is the case.

FIG. 7 shows a case of a short circuit in which the transmission voltage is completely lower than the short circuit level for the second predetermined time t2, for example, 25 milliseconds.

FIG. 8 shows a case where the transmission voltage is restored to the abnormal level and the short circuit level above the third predetermined time t3, for example, 3 seconds.

Next, the operation of the transmission line state detecting device will be described based on the flowcharts shown in FIGS. 9 to 12 while also referring to the waveform diagrams of FIGS. First, in step S1 of FIG. 9, the data obtained by AD converting the transmission voltage divided by the voltage dividing resistors 4 and 5 of the transmission line by the AD converter 6 is read into the CPU 7. Next, in step S2,
It is judged whether or not the switch 2, which should normally be closed, is already open, and if it is open, CP is entered in step S3.
The short-circuit level when the switch is opened, which is stored in advance in the ROM (not shown) provided in U7, is set in the RAM (not shown) provided in CPU7, but if it is closed, it is stored in advance in the ROM in step S4. The short-circuit level when the switch is closed is set in the RAM.

In step S5, when the AD conversion data described above is below the above-mentioned short-circuit level as shown by point A in FIG. 7 and it is found that there is a short-circuit, the program proceeds to step S6, and this short-circuit is made for the first time. If it is not the first time, it returns to step S1 again,
If it is the first time, proceed to the subroutine SHRTSET.

This subroutine SHRTSET (see FIG.
In 0), a short-circuit detection timer (not shown) provided in the CPU 7 is started in step S7, and if it is determined in step S8 that the second predetermined time t2 = 25 milliseconds has elapsed, “short-circuit” is detected. Is detected, the CPU 7 supplies an H-level open signal from its output terminal OCO to the base of the transistor 8 in step S9, so that the transistor 8 is turned on and the switch 2 is opened. 3 is connected, and a minute current, for example, about 1 mA is supplied to the output side. In step S10, the light emitting diode 9 is turned on by the conduction of the transistor 8. Further, in step S11, a short-circuit flag indicating detection of short-circuit is set in the RAM, and the abnormality flag indicating detection of abnormality is reset. In step S12, the transmission / reception circuit 10 sends a short circuit signal from the CPU 7 to the receiver.

If the short-circuit detection timer does not time up in step S8, the AD conversion data is read again in step S13. If it is determined in step S14 that the short-circuit is continuing, the process returns to step S8 again. The short circuit detection timer is reset in S15, and the process returns to step S1 again.

Next, if it is determined in step S5 that it is not a short circuit, in step S16 it is once again determined whether or not the switch 2 is open, and if it is open, in step S17 it is higher than the above-mentioned short-circuit level and ROM. The abnormal level when the switch is opened is stored in advance in the RAM, but if it is closed, step S18
At, the abnormal level when the switch is closed, which is stored in advance in the ROM, is set in the RAM.

In step S19, if the AD conversion data described above is found to be abnormal below the above-mentioned abnormal level as shown by point A in FIG. 4, the program proceeds to step S20, and this abnormality is first detected. If it is not the first time, the process returns to step S1 again, but if it is the first time, the process proceeds to the subroutine ABNMLSET.

This subroutine ABNMLSET (see FIG.
In 1), in step S21, an abnormality detection timer (not shown) provided in the CPU 7 is started, and if it is found in step S22 that the first predetermined time t1 = 50 milliseconds has elapsed, then "abnormal" is detected. Is detected, and the CPU 7 outputs H from the output terminal OCO in step S23.
By supplying a level open signal to the base of the transistor 8, the transistor 8 becomes conductive and opens the switch 2, so that the input / output side thereof is connected by the high resistance 3 and a minute current flows to the output side. Further, in step S24, the light emitting diode 9 is turned on by the conduction of the transistor 8. Further, in step S25, the abnormality flag indicating the detection of abnormality is set and the short circuit flag is reset. In step S26, the transmission / reception circuit 10 sends the abnormal signal from the CPU 7 to the receiver.

If the abnormality detection timer does not time up in step S22, the AD conversion data is read again in step S27. If it is determined in step S28 that the abnormality is continuing, the process returns to step S22 again. In S29, the abnormality detection timer is reset and the process returns to step S1 again. An example of this case is shown in FIG.
At point A, the transmission voltage, that is, the AD conversion data is below the abnormal level and the abnormality detection timer is started, and at point B, the transmission voltage is below the short circuit level and the short circuit detection timer is started. Since the transmission voltage is abnormal at point C, that is, short circuit recovery occurs, the short circuit detection timer is set to the second
Is reset without reaching the predetermined time t2, that is, without timing out, but the abnormality detection timer is set to the first predetermined time t.
Since it is still below the abnormal level even after 1 has passed,
“Abnormal” is confirmed, and the program proceeds to step S2 described above.
Go to 3.

Finally, if it is determined in step S19 that there is no abnormality, the process proceeds to step S30, in which the recovery level which is higher than the above-mentioned short circuit level and abnormality level and which is stored in the ROM in advance is set in the RAM, When it is found that the AD conversion data described above has reached the above-mentioned recovery level or higher as shown by point A in FIG. 8 and is in recovery, the program proceeds to the subroutine FKKKYSET, but otherwise returns to step S1.

This subroutine FKKYSET (see FIG. 1
In 2), a recovery detection timer (not shown) provided in the CPU 7 is started in step S31, and if it is determined in step S32 that the third predetermined time t3 = 3 seconds has elapsed, "recovery" is indicated. Detected, in step S33, the CPU 7 supplies the L-level closed signal from the output terminal OCO to the base of the transistor 8, so that the transistor 8 becomes non-conductive, and the step S33
The light emitting diode 9 is turned off at step S34.
To close switch 2. Further, in step S35, both the short-circuit flag and the abnormality flag that were set before the recovery was detected are reset, and in step S36, the transmission / reception circuit 10 sends a recovery signal from the CPU 7 to the receiver.

If the recovery detection timer does not time up in step S32, the AD conversion data is read again in step S37. If it is determined in step S38 that the recovery is ongoing, the process returns to step S32 again. The recovery detection timer is reset in S39, and the process returns to step S1 again.

In the example of FIG. 3, the AD conversion data is below the abnormal level at the point A and the abnormality detection timer is started, but at the point B, the AD conversion data is in the abnormal recovery exceeding the abnormal level. The abnormality detection timer is reset before the first predetermined time t1 elapses. Therefore,
The "abnormal" is not fixed, and the state of the transmission line is considered normal.

Further, in the example of FIG. 6, the AD conversion data exceeds the recovery level at the point A and the recovery detection timer is started, but at the point B, the AD conversion data falls below the abnormal level, so the recovery detection timer is The reset is performed without elapse of the third predetermined time t3. Therefore, "recovery" is not fixed, and the state of the transmission line is regarded as a short circuit if the short-circuit flag is set and abnormal if the abnormal flag is set.

FIG. 13 is a circuit diagram showing a partial block diagram of another embodiment of the present invention. The configuration of the monitoring device and the function of the CPU are different from those of the embodiment of FIG.

The monitoring device MMA includes voltage dividing resistors 4s and 5s.
s, 4a and 5a, 4f and 5f and the voltage dividing resistors 4s and 5s are connected to the-input terminal and the reference voltage source Vs corresponding to the above-mentioned short-circuit level is connected to the + input terminal for detecting a short circuit. Comparator 11s, similarly comparators 11a and 11f for abnormality detection and restoration detection, which are connected to corresponding voltage dividing resistors and are connected to reference voltage sources Va and Vf corresponding to the abnormality level and the restoration level, respectively.
Timer 1 corresponding to the short-circuit detection timer in step S7
2s, a timer 12a corresponding to the abnormality detection timer in step S21, and a timer 12f corresponding to the recovery detection timer in step S31.

The abnormality detecting comparator 11a in the monitoring device MMA outputs an output when the divided transmission voltage becomes equal to or lower than a reference voltage corresponding to an abnormality level indicating an abnormal state.
Similarly, the short-circuit detecting comparator 11s outputs when the transmission voltage becomes equal to or lower than the reference voltage corresponding to the short-circuit level indicating the short-circuit state. The abnormality detection timer 12a outputs an output when the output of the abnormality detection comparator 11a continues for a first predetermined time or longer. Similarly, short circuit detection timer 12s
Outputs when the output of the short circuit detection comparator 11s continues for a second predetermined time or longer. The CPU 7A generates an open signal for opening the switch 2 based on the outputs of the abnormality detection timer 12a and the short circuit detection timer 12s, and an abnormal signal indicating an abnormal state and a short circuit signal indicating a short circuit state.

The recovery detecting comparator 11f in the monitoring device MMA outputs when the transmission voltage becomes equal to or higher than the reference voltage corresponding to the recovery level higher than the abnormal level and the short circuit level. The recovery detection timer 12f outputs an output when the recovery detection comparator 11f continues to output for a third predetermined time or longer. Then, the CPU 7A generates a close signal for closing the switch 2 based on the output of the recovery detection timer 12f, and a recovery signal indicating a recovery state free from an abnormal state and a short circuit state. The other operations are the same as described with reference to FIG.

[0033]

As described above in detail, in the transmission line state detecting device of the first aspect, the main current path is inserted in series to the positive conductor of the transmission line which is also the power line and the signal line, and normally closed. An electronic switch, a resistor connected in parallel with the switch and having a high resistance value, and connected between the positive conductor and the negative conductor of the transmission line on the output side of the switch, and transmitting the transmission voltage of the transmission line. A monitoring device for monitoring, this monitoring device, connected to the control current path of the switch and the positive conductor, when the transmission voltage falls below an abnormal level indicating an abnormal state close to a short-circuited state for a first predetermined time or longer, First detecting means for opening the switch and transmitting an abnormal signal indicating the abnormal state to a receiver through the transmission line; and the transmission voltage indicating the short circuit state for a second predetermined time or more and the abnormal level. And a detection device having second detection means for opening the switch and transmitting a short-circuit signal indicating the short-circuit state to the receiver through the transmission line when the short-circuit level becomes lower than the lower short-circuit level. In addition to the short-circuit state of the transmission line, an abnormal state close to the short-circuit state is detected, the transmission line is disconnected, and a short-circuit signal and an abnormal signal indicating each state are transmitted to the receiver.

According to a second aspect of the present invention, the transmission line state detecting device closes the switch when the transmission voltage exceeds a recovery level higher than the abnormal level and the short circuit level for a third predetermined time or longer. Since the third detection means for transmitting the restoration signal indicating the restoration state without the abnormal state and the short-circuited state to the receiver through the transmission line is further provided, it is disconnected when the transmission line is restored. The effect is that the transmission line is reconnected to resume the transmission and the restoration signal indicating the restoration state is transmitted to the receiver.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing a partial block diagram of an embodiment of the present invention.

FIG. 2 is a waveform diagram when the transmission voltage is normal.

FIG. 3 is a waveform diagram when the transmission voltage is normal and abnormal.

FIG. 4 is a waveform diagram when the transmission voltage is abnormal.

FIG. 5 is a waveform diagram in the case where the transmission voltage spans an abnormality and a short circuit.

FIG. 6 is a waveform diagram in the case where the transmission voltage spans restoration and abnormality.

FIG. 7 is a waveform diagram when the transmission voltage is a short circuit.

FIG. 8 is a waveform diagram when the transmission voltage is restored.

FIG. 9 is a flowchart for explaining the operation of the embodiment.

FIG. 10 is a flowchart of a SHRTSET subroutine.

FIG. 11 is a flowchart of an ABNMLSET subroutine.

FIG. 12 is a flowchart of an FKKKYSET subroutine.

FIG. 13 is a circuit diagram showing a partial block diagram of another embodiment of the present invention.

[Explanation of symbols]

1P Positive conductor of transmission line 1N Negative conductor of transmission line 2 Switch 3 High resistance MM, MMA monitoring device 4,4s, 4a, 4f, 5, 5s, 5a, 5f Voltage dividing resistor 6 AD converter DM detection device 7, 7A CPU 8 Transistor 9 Light emitting diode 10 Transceiver circuit 11s, 11a, 11f Comparator 12s, 12a, 12f Timer

Claims (7)

[Claims] 1. An electronic switch in which a main current path is inserted in series in a positive conductor of a transmission line which is also a power supply line and a signal line and which is normally closed, and a resistor which is connected in parallel with this switch and has a high resistance value. A monitoring device connected between the positive conductor and the negative conductor of the transmission line on the output side of the switch to monitor the transmission voltage of the transmission line; the monitoring device, the control current path of the switch, and the positive conductor. When the transmission voltage is lower than or equal to an abnormal level indicating an abnormal state close to a short-circuited state for a first predetermined time or longer, the switch is opened and an abnormal signal indicating the abnormal state is transmitted to the receiver. And a switch for opening when the transmission voltage is below the short-circuit level lower than the abnormal level and indicating the short-circuit state for a second predetermined time or longer. And a detection device having a second detection means for transmitting a short-circuit signal indicating the short-circuit condition to the receiver through the transmission line. 2. The detection device closes the switch and closes the abnormal state and the short circuit when the transmission voltage exceeds a recovery level higher than the abnormal level and the short circuit level for a third predetermined time or longer. The transmission line state detection device according to claim 1, further comprising third detection means for transmitting a restoration signal indicating a stateless restoration state to the receiver through the transmission line. 3. The monitoring device includes a plurality of resistors connected between the positive conductor and the negative conductor to divide the transmission voltage, and connected to a connection point of these resistors to analogize the transmission voltage. The transmission line state detecting device according to claim 1 or 2, further comprising an AD converter for digital conversion. 4. The detection device is supplied with an open signal for opening the switch, a close signal for closing the switch, a CPU for generating the abnormal signal, the short circuit signal and the recovery signal, and the open signal. A control element for turning on the indicator light indicating that the switch is opened by turning on the switch, and closing the switch and turning off the indicator light by supplying the closing signal. 4. The transmission line state according to claim 1, further comprising a transmission / reception circuit that transmits an abnormal signal, the short circuit signal and the restoration signal to the receiver and receives a required signal from the receiver. Detection device. 5. An electronic switch in which a main current path is inserted in series in a positive conductor of a transmission line which is also a power supply line and a signal line and which is normally closed, and a resistor which is connected in parallel with this switch and has a high resistance value. A monitoring device connected between a positive conductor and a negative conductor of the transmission line on the output side of the switch for monitoring the transmission voltage of the transmission line, wherein the transmission voltage indicates an abnormal state close to a short circuit state. An abnormality detection comparator that outputs an output when the voltage becomes equal to or lower than a reference voltage corresponding to an abnormal level, and a short circuit detection comparator that outputs an output when the transmission voltage becomes equal to or lower than a reference voltage that corresponds to the short circuit level indicating the short circuit state, An abnormality detection timer that outputs when the output of the abnormality detection comparator continues for a first predetermined time or longer, and the output of the short circuit detection comparator continues for a second predetermined time or longer And a monitoring device including a short-circuit detection timer that outputs an output when an error occurs, an open signal that opens the switch based on the outputs of the abnormality detection timer and the short-circuit detection timer, and an abnormality signal indicating the abnormal state and A detection device including a CPU that generates a short-circuit signal indicating the short-circuit condition, and a transmission line condition detection device. 6. The recovery detection comparator, which outputs an output when the transmission voltage becomes equal to or higher than a reference voltage corresponding to a recovery level higher than the abnormal level and the short-circuit level, and the recovery detection comparator. A recovery detection timer that outputs an output when the output continues for a third predetermined time or longer, and the CPU closes the switch based on the output of the recovery detection timer; 6. A recovery signal is generated which indicates a recovery state without a short circuit condition.
Transmission line condition detection device. 7. The detection device opens the switch when the open signal is supplied and turns on an indicator light indicating that the switch has been opened, and when the close signal is supplied, the detection device sets the switch open. A control element that closes a switch and turns off the indicator light, and a transmission / reception circuit that transmits the abnormality signal, the short circuit signal, and the restoration signal to a receiver through the transmission line and receives a required signal from the receiver. 7. The transmission line state detecting device according to claim 5, further comprising: