JPH08147079A - Data transmitter-receiver - Google Patents

Data transmitter-receiver

Info

Publication number
JPH08147079A
JPH08147079A JP6288181A JP28818194A JPH08147079A JP H08147079 A JPH08147079 A JP H08147079A JP 6288181 A JP6288181 A JP 6288181A JP 28818194 A JP28818194 A JP 28818194A JP H08147079 A JPH08147079 A JP H08147079A
Authority
JP
Japan
Prior art keywords
data
signal
power supply
supply voltage
transmission
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6288181A
Other languages
Japanese (ja)
Inventor
Kazuya Kawano
一也 川野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Casio Computer Co Ltd
Original Assignee
Casio Computer Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Casio Computer Co Ltd filed Critical Casio Computer Co Ltd
Priority to JP6288181A priority Critical patent/JPH08147079A/en
Publication of JPH08147079A publication Critical patent/JPH08147079A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To perform a data transmission with high reliability and to obtain power transmission efficiency which is advantageous and excellent in a miniaturization, in a data transmitter-receiver performing the data reading and writing processings with an external memory for an information equipment main body. CONSTITUTION: By the power supply voltage/carrier clock superposition circuit 34 of a data reader/writer 300, power supply voltage signals (o) and (p) on which carrier clock signals (m) for data transmission synchronization are superposed are connected with power source output terminals 44a and 44b and power source input terminals 45a and 45b, the signals are supplied to a data storage device 400 and the signals are obtained as carrier clock signals (t) via bias and a waveform shaping circuit 37. With the signals, an operation power source Vcc is obtained via a smooth circuit 39. Memory access signals (k) and (r) and memory output signals (s) and (w) are transmitted and received by an electromagnetic guide from each of the corresponding signal transmission parts 31 and 36 via transmission and reception coils 40, 42, 43 and 41, and the signals are demodulated in signal reception parts 35 and 32.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、パーソナルコンピュー
タ等の電子情報機器に対しカード型メモリ等の外部拡張
メモリとの間でデータの読取りや書込み処理を行なうデ
ータ送受信装置に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data transmission / reception device for reading / writing data from / to an electronic information device such as a personal computer with an external expansion memory such as a card type memory.

【0002】[0002]

【従来の技術】従来、パーソナルコンピュータ等の電子
情報機器に対しカード型メモリを外部拡張メモリとして
使用し、記憶容量の増設を図ったり、他の情報機器との
間で情報の共有を図ったりしている。
2. Description of the Related Art Conventionally, a card type memory has been used as an external expansion memory for an electronic information device such as a personal computer to increase the storage capacity or to share information with other information devices. ing.

【0003】この場合、前記カード型メモリ等の携帯型
のデータ記憶装置としては、EEPROMやフラッシュ
メモリ等を用いてバックアップ電源の不要なデータ記憶
装置と、バックアップ電源を要するデータ記憶装置が存
在するが、その何れのデータ記憶装置でも、前記情報機
器本体からデータの読取りや書込みを行なう際には、そ
のデータ送受信動作のための駆動電圧は本体側から供給
される。
In this case, as portable data storage devices such as the card type memory, there are a data storage device which does not require a backup power source and a data storage device which requires a backup power source, such as an EEPROM or a flash memory. In any of the data storage devices, when data is read from or written in the information equipment body, the drive voltage for the data transmission / reception operation is supplied from the body side.

【0004】そして、このように送受信用の駆動電源を
内蔵しない携帯型のデータ記憶装置としては、前記デー
タの読取り・書込みを行なう情報機器本体との間で、金
属製の電極端子やコネクタを介して電源の供給を受け信
号をやり取りする接触式のものと、電磁誘導により電力
及び信号の伝送を行なう非接触式のものがある。
As such a portable data storage device which does not have a built-in transmission / reception drive power source, a metal electrode terminal or a connector is provided between the information device body for reading and writing the data. There are a contact type in which power is supplied and signals are exchanged, and a non-contact type in which power and signals are transmitted by electromagnetic induction.

【0005】図4は接触式によりデータの送受信を行な
う従来の読取り・書込み装置(リーダ・ライタ)及びデ
ータ記憶装置の構成を示すブロック図である。この接触
式のデータ送受信装置では、読取り・書込み装置の制御
部1とデータ記憶装置のメモリ部3との間で、その制御
信号a、搬送クロック信号b、アドレス信号c、データ
信号dの何れをも、それぞれ対応する金属製の端子4
a,5a、4b,5b、4c,5c、4d,5dを介し
て送受信される。
FIG. 4 is a block diagram showing the structures of a conventional read / write device (reader / writer) and a data storage device for transmitting and receiving data by a contact method. In this contact-type data transmitter / receiver, any one of the control signal a, the carrier clock signal b, the address signal c, and the data signal d is transmitted between the control unit 1 of the read / write device and the memory unit 3 of the data storage device. Also the corresponding metal terminals 4
It is transmitted and received via a, 5a, 4b, 5b, 4c, 5c, 4d and 5d.

【0006】また、読取り・書込み装置の電源回路2か
らの電圧信号Vccも、各対応する金属製の端子4e,
5e、4f,5fを介して供給される。このように、接
触式のデータ送受信装置では、全ての信号線a,b,
c,dと電源Vccが何れも金属の端子4a,5a、4
b,5b、4c,5c、4d,5d、4e,5e、4
f,5fを介して接続されるため、読取り・書込み装置
やデータ記憶装置における端子の実装スペースが許す限
り多数の信号を同時に伝送でき、データ信号dのような
双方向の伝送も容易に行なえるという利点がある。
The voltage signal Vcc from the power supply circuit 2 of the read / write device is also supplied to the corresponding metal terminals 4e, 4e.
It is supplied via 5e, 4f, and 5f. Thus, in the contact-type data transmitter / receiver, all the signal lines a, b,
c, d and the power source Vcc are both metal terminals 4a, 5a, 4
b, 5b, 4c, 5c, 4d, 5d, 4e, 5e, 4
Since they are connected via f and 5f, as many signals as possible can be transmitted at the same time as long as the mounting space of the terminals in the read / write device and the data storage device allows, and bidirectional transmission such as the data signal d can be easily performed. There is an advantage.

【0007】しかしながら、多数の電極端子が露出して
いるため、埃や湿気等によって傷み易く、また、読取り
・書込み装置に対し着脱を繰返すうちに接点不良を起こ
し易いため、特に情報をやり取りする信号線a,b,
c,dで接点不良を起こすと、誤ったデータを書込んだ
り読出したりする恐れが高くなる欠点がある。
However, since a large number of electrode terminals are exposed, they are easily damaged by dust, moisture and the like, and a contact failure is likely to occur during repeated attachment / detachment to / from the read / write device. Lines a, b,
If a contact failure occurs at points c and d, there is a drawback that the possibility of writing or reading erroneous data increases.

【0008】図5は非接触式によりデータの送受信を行
なう従来の読取り・書込み装置(リーダ・ライタ)及び
データ記憶装置の構成を示すブロック図である。読取り
・書込み装置の制御部10から出力されるメモリアクセ
ス信号fは、コマンド・アドレス・データ等の情報を含
むシリアル信号であり、搬送クロックeと共に信号送信
部11において送信用の変調がかけられ、それぞれ送信
コイル15及び14に送られる。
FIG. 5 is a block diagram showing the structures of a conventional read / write device (reader / writer) and a data storage device for transmitting and receiving data in a non-contact manner. The memory access signal f output from the control unit 10 of the read / write device is a serial signal containing information such as command, address, data, etc., and is modulated for transmission in the signal transmission unit 11 together with the carrier clock e. It is sent to the transmission coils 15 and 14, respectively.

【0009】データ記憶装置では、前記読取り・書込み
装置側の送信コイル15及び14と対向する位置にある
受信コイル19及び18に電磁誘導により各信号f,e
が伝送され、信号受信部22において変調前と同じメモ
リアクセス信号iと搬送クロックhに復調されメモリ部
25に入力される。
In the data storage device, the signals f and e are applied by electromagnetic induction to the receiving coils 19 and 18 at positions facing the transmitting coils 15 and 14 on the side of the reading / writing device.
Is transmitted, demodulated in the signal receiving unit 22 into the same memory access signal i and carrier clock h as before modulation, and input to the memory unit 25.

【0010】また、データ記憶装置におけるメモリ読出
しデータ等の情報を含むシリアル信号であるメモリ出力
信号jも、全く同じ電磁誘導による伝送方式で、信号送
信部23から送信コイル20を介して読取り・書込み装
置の受信コイル16に送られてその信号受信部12に受
信され、メモリ出力信号gに復調されて制御部10に読
取られる。
The memory output signal j, which is a serial signal containing information such as memory read data in the data storage device, is also read / written from the signal transmitting unit 23 via the transmitting coil 20 by the same transmission method using electromagnetic induction. The signal is sent to the receiving coil 16 of the apparatus, received by the signal receiving section 12, demodulated into a memory output signal g, and read by the control section 10.

【0011】一方、電源電圧に関しては、読取り・書込
み装置の電力送信部13で作成した交流信号で送信コイ
ル17を駆動して電磁誘導によりデータ記憶装置の受信
コイル21に交流電圧を発生させ、これを電力受信部2
4において全波整流・平滑化して該データ記憶装置の送
受信動作に必要な電源電圧をVccを得ている。
Regarding the power supply voltage, on the other hand, the transmission coil 17 is driven by an AC signal generated by the power transmission unit 13 of the reading / writing device to generate an AC voltage in the reception coil 21 of the data storage device by electromagnetic induction. Power receiving unit 2
4, full-wave rectification and smoothing are performed to obtain the power supply voltage Vcc required for the transmission / reception operation of the data storage device.

【0012】なお、電力送信用の交流信号そのもののタ
イミングで搬送クロックが代用できる場合は、前記搬送
クロック専用の送信コイル14及び受信コイル18を省
略することもできる。
When the carrier clock can be substituted at the timing of the AC signal for power transmission itself, the transmitter coil 14 and the receiver coil 18 dedicated to the carrier clock can be omitted.

【0013】このように、非接触式のデータ送受信装置
では、前記図4で示した接触式のデータ送受信装置のよ
うに、その表面に金属端子を持たないため、接点不良に
よる誤動作の恐れがなく、送受信コイルを対向させるだ
けで信頼性の高い信号伝送が行なえる利点がある。
As described above, in the non-contact type data transmitting / receiving apparatus, unlike the contact type data transmitting / receiving apparatus shown in FIG. 4, since there is no metal terminal on the surface, there is no risk of malfunction due to contact failure. However, there is an advantage that highly reliable signal transmission can be performed only by facing the transmitting and receiving coils.

【0014】一方、データ記憶装置は、薄型化・ローコ
スト化のため、送受信コイルをプリント基板上に銅箔に
より渦巻状にしてパターン形成する方法が採られる。こ
の際、電力送受信用のコイル21は、インダクタンスを
大きくするためにかなりの巻数が必要になるが、限られ
たスペースで十分なインダクタンスを確保するのは困難
である。
On the other hand, in order to reduce the thickness and cost of the data storage device, a method is used in which the transmission / reception coil is spirally formed on the printed circuit board with a copper foil to form a pattern. At this time, the coil 21 for power transmission / reception requires a considerable number of turns to increase the inductance, but it is difficult to secure sufficient inductance in a limited space.

【0015】また、送信コイル17,受信コイル21間
の磁束は、空間伝送となるため漏洩磁束が多く、両者の
結合係数を大きく取ることは困難である。よって、この
非接触式のデータ送受信装置では、接点不良による誤動
作の恐れなく、信頼性の高いデータ伝送が行なえるもの
の、電力の伝達効率が悪く、電力の供給元である読取り
・書込み装置の消費電力が大きくなるため、電池駆動を
行なう場合には、実用性が低い欠点がある。
Further, since the magnetic flux between the transmitting coil 17 and the receiving coil 21 is a spatial transmission, there are many leakage magnetic fluxes, and it is difficult to obtain a large coupling coefficient between the two. Therefore, in this non-contact type data transmission / reception device, although reliable data transmission can be performed without fear of malfunction due to contact failure, power transmission efficiency is poor and consumption of the reading / writing device which is a power supply source is low. Since the electric power becomes large, there is a drawback that it is not practical when it is driven by a battery.

【0016】[0016]

【発明が解決しようとする課題】したがって、前記従来
のデータ送受信装置では、データ伝送の信頼性が高く、
しかも、小型化に有利で、電力の伝達効率も良好である
という全ての条件を満足することはできない問題があっ
た。
Therefore, in the above-mentioned conventional data transmitter / receiver, the reliability of data transmission is high,
Moreover, there is a problem that it is not possible to satisfy all the conditions that it is advantageous for downsizing and that the power transmission efficiency is good.

【0017】本発明は前記のような問題に鑑みなされた
もので、信頼性の高いデータ伝送が行なえると共に、小
型化に有利で且つ良好な電力伝達効率を得ることが可能
になるデータ送受信装置を提供することを目的とする。
The present invention has been made in view of the above-mentioned problems, and it is possible to perform highly reliable data transmission, and at the same time, a data transmission / reception device that is advantageous in downsizing and that can obtain good power transmission efficiency. The purpose is to provide.

【0018】[0018]

【課題を解決するための手段】すなわち、本発明に係わ
る第1のデータ送受信装置は、データ読取り・書込み装
置とデータ記憶装置との間でデータ伝送を行なうもの
で、前記データ読取り・書込み装置は、データ伝送同期
用の搬送信号を電源電圧に重畳する重畳手段と、この重
畳手段により搬送信号の重畳された電源電圧信号を出力
する電源出力端子と、前記重畳手段にて重畳される搬送
信号に同期してデータ信号を無線にて送受信する第1の
送受信手段とを備え、前記データ記憶装置は、前記電源
出力端子に着脱自在に接続される電源入力端子と、この
電源入力端子から入力される電源電圧により駆動され該
電源電圧信号に重畳されている搬送信号に同期して前記
第1の送受信手段との間でデータ信号を無線にて送受信
する第2の送受信手段とを備えて構成したものである。
That is, a first data transmission / reception device according to the present invention is for performing data transmission between a data reading / writing device and a data storage device. A superimposing means for superimposing a carrier signal for data transmission synchronization on a power supply voltage, a power supply output terminal for outputting a power supply voltage signal on which the carrier signal is superimposed by the superimposing means, and a carrier signal to be superimposed on the superimposing means. First data transmitting / receiving means for wirelessly transmitting / receiving a data signal in synchronization with each other, the data storage device is input from a power input terminal removably connected to the power output terminal and the power input terminal. A second transmitter / receiver that wirelessly transmits / receives a data signal to / from the first transmitter / receiver in synchronization with a carrier signal driven by a power supply voltage and superimposed on the power supply voltage signal. It is constructed by including and.

【0019】また、本発明に係わる第2のデータ送受信
装置は、そのデータ伝送同期用の搬送信号を正弦波の信
号として構成したものである。また、本発明に係わるデ
ータ読取り・書込み装置は、別体に用意されるデータ記
憶装置に対してデータの読取り及び書込みを行なうもの
で、データ伝送同期用の搬送信号を電源電圧に重畳する
重畳手段と、この重畳手段により搬送信号の重畳された
電源電圧信号を出力する電源出力端子と、前記重畳手段
にて重畳される搬送信号に同期してデータ信号を無線に
て送受信する送受信手段とを備えて構成したものであ
る。
The second data transmitting / receiving apparatus according to the present invention is configured such that the carrier signal for data transmission synchronization is a sine wave signal. The data read / write device according to the present invention reads and writes data to and from a separately prepared data storage device, and superimposing means for superimposing a carrier signal for data transmission synchronization on a power supply voltage. And a power supply output terminal for outputting a power supply voltage signal on which the carrier signal is superimposed by the superimposing means, and a transmitting / receiving means for transmitting / receiving a data signal wirelessly in synchronization with the carrier signal superimposed on the superimposing means. It is configured by.

【0020】また、本発明に係わるデータ記憶装置は、
別体に用意されるデータ読取り・書込み装置によってデ
ータの読取り及び書込みが行なわれるもので、前記デー
タ読取り・書込み装置の電源出力端子に着脱自在に接続
される電源入力端子と、この電源入力端子から入力され
る電源電圧により駆動され該電源電圧信号に重畳されて
いる搬送信号に同期して前記データ読取り・書込み装置
との間でデータ信号を無線にて送受信する送受信手段と
を備えて構成したものである。
The data storage device according to the present invention is
Data is read and written by a separately provided data reading / writing device, and a power input terminal detachably connected to the power output terminal of the data reading / writing device and from this power input terminal And a transmission / reception unit that wirelessly transmits / receives a data signal to / from the data reading / writing device in synchronization with a carrier signal that is driven by an input power supply voltage and is superimposed on the power supply voltage signal. Is.

【0021】[0021]

【作用】つまり、前記第1のデータ送受信装置では、デ
ータ読取り・書込み装置から搬送クロック信号の重畳さ
れた電源電圧信号が電源電圧出力端子及びこれに接続さ
れる電源電圧入力端子を介してデータ記憶装置に供給さ
れるので、搬送クロック専用の入出力端子あるいは送受
信コイルを必要とせず小型化が行なえ、しかも効率の良
い電力の供給が行なえると共に、データ信号が例えば電
磁誘導方式等の無線により送受信されるので、接触不良
なく信頼性の高いデータ送受信処理が行なえることにな
る。
That is, in the first data transmitter / receiver, the power supply voltage signal on which the carrier clock signal is superposed from the data reading / writing device stores data via the power supply voltage output terminal and the power supply voltage input terminal connected to the power supply voltage output terminal. Since it is supplied to the device, it can be miniaturized without the need for input / output terminals for exclusive use of the carrier clock or the transmission / reception coil, and moreover, efficient power supply can be performed and data signals can be transmitted / received wirelessly by, for example, an electromagnetic induction method. As a result, reliable data transmission / reception processing can be performed without contact failure.

【0022】また、前記第2のデータ送受信装置では、
そのデータ伝送同期用の搬送信号が正弦波の信号とされ
るので、この搬送信号の重畳された電源電圧信号を後段
で平滑化するためのフィルタ定数の減少が行なえ、使用
部品の小型化が行なえると共に、電源電圧に対する雑音
混入の削減が行なえることになる。
In the second data transmitting / receiving device,
Since the carrier signal for synchronizing the data transmission is a sine wave signal, it is possible to reduce the filter constant for smoothing the power supply voltage signal on which this carrier signal is superimposed in the subsequent stage, and to reduce the size of the parts used. At the same time, it is possible to reduce noise mixing with respect to the power supply voltage.

【0023】また、前記データ読取り・書込み装置で
は、搬送クロック信号の重畳された電源電圧信号が電源
電圧出力端子からデータ記憶装置に接続供給されるの
で、搬送クロック専用の出力端子あるいは送信コイルを
必要とせず小型化が行なえ、しかも効率の良い電力の供
給が行なえると共に、データ信号が例えば電磁誘導方式
等の無線により送受信されるので、接触不良なく信頼性
の高いデータ送受信処理が行なえることになる。
In the data read / write device, since the power supply voltage signal on which the carrier clock signal is superimposed is connected and supplied from the power supply voltage output terminal to the data storage device, an output terminal dedicated to the carrier clock or a transmission coil is required. In addition to miniaturization, efficient power supply is possible, and since data signals are transmitted and received wirelessly, such as by an electromagnetic induction method, reliable data transmission / reception processing can be performed without contact failure. Become.

【0024】また、前記データ記憶装置では、データ読
取り・書込み装置から搬送クロック信号の重畳された電
源電圧信号が電源電圧入力端子を介してデータ記憶装置
に接続供給されるので、搬送クロック専用の入力端子あ
るいは受信コイルを必要とせず小型化が行なえ、しかも
効率の良い電力の受電が行なえると共に、データ信号が
例えば電磁誘導方式等の無線により送受信されるので、
接触不良なく信頼性の高いデータ送受信処理が行なえる
ことになる。
In the data storage device, since the power supply voltage signal on which the carrier clock signal is superimposed is connected and supplied from the data reading / writing device to the data storage device through the power supply voltage input terminal, an input dedicated to the carrier clock is used. Since it can be downsized without requiring a terminal or a receiving coil, and can receive electric power with high efficiency, and data signals are transmitted and received wirelessly by, for example, an electromagnetic induction method,
It is possible to perform highly reliable data transmission / reception processing without contact failure.

【0025】[0025]

【実施例】以下図面により本発明の実施例について説明
する。図1は本発明のデータ送受信装置を用いたデータ
読取り・書込み装置300とデータ記憶装置400の構
成を示すブロック図である。
Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing the configurations of a data read / write device 300 and a data storage device 400 using the data transmitting / receiving device of the present invention.

【0026】データ読取り・書込み装置300の制御部
30から出力されるデータ伝送同期用の搬送クロック信
号mは、電源回路33から出力されるデータ記憶装置4
00用の電源電圧nに対して、電源電圧/搬送クロック
重畳回路34において重畳され、電源電圧・搬送クロッ
ク重畳信号oとして金属製の電源出力端子44a,44
bから出力される。
The carrier clock signal m for data transmission synchronization output from the control unit 30 of the data reading / writing device 300 is output from the power supply circuit 33 to the data storage device 4.
The power supply voltage n for 00 is superimposed in the power supply voltage / carrier clock superimposing circuit 34, and the metal power supply output terminals 44a and 44 are used as the power supply voltage / carrier clock superimposing signal o.
It is output from b.

【0027】この場合、前記搬送クロック信号mは、電
源電圧nが振幅の中心となるようにその振幅を小さくし
て重畳される。前記データ読取り・書込み装置300の
電源出力端子44a,44bには、データ記憶装置40
0に対しデータの読取り・書込みを行なう際に、該デー
タ記憶装置400に設けられた電源入力端子45a,4
5bが接続される。
In this case, the carrier clock signal m is superposed with its amplitude reduced so that the power supply voltage n becomes the center of the amplitude. The data storage device 40 is connected to the power output terminals 44a and 44b of the data reading / writing device 300.
When data is read / written to / from 0, power input terminals 45a, 4 provided in the data storage device 400
5b is connected.

【0028】一方、前記制御部30から前記搬送クロッ
ク信号mに同期させてコマンド・アドレス・データ等の
シリアル信号として出力されるメモリアクセス信号k
は、信号送信部31において変調され、送信コイル40
から電磁誘導による送信信号xとしてデータ記憶装置4
00側へ送信される。
On the other hand, a memory access signal k output from the control unit 30 as a serial signal such as command, address, data, etc. in synchronization with the carrier clock signal m.
Is modulated in the signal transmitter 31 and transmitted to the transmitter coil 40.
From the data storage device 4 as a transmission signal x by electromagnetic induction from
00 side is transmitted.

【0029】また、受信コイル41において、データ記
憶装置400からの電磁誘導により受信されたデータ信
号は、信号受信部32を介してメモリ出力信号wとして
復調され、前記制御部30に読取られる。
In the receiving coil 41, the data signal received by electromagnetic induction from the data storage device 400 is demodulated as the memory output signal w via the signal receiving section 32 and read by the control section 30.

【0030】前記データ読取り・書込み装置300から
電源出力端子44a,44b及び電源入力端子45a,
45bを介してデータ記憶装置400に入力された電源
電圧・搬送クロック重畳信号pは、カップリングコンデ
ンサCuを介してその周波数成分の信号qのみ分離され
バイアス及び波形整形回路37に供給される。
From the data reading / writing device 300, power output terminals 44a, 44b and power input terminal 45a,
The power supply voltage / carrier clock superimposed signal p input to the data storage device 400 via 45b is separated into only the signal q of its frequency component via the coupling capacitor Cu and is supplied to the bias and waveform shaping circuit 37.

【0031】また、前記電源入力端子45a,45bを
介して入力された電源電圧・搬送クロック重畳信号p
は、平滑回路39にも並行して供給される。図2は前記
データ送受信装置を用いたデータ記憶装置400におけ
るバイアス及び波形整形回路37と平滑回路39の内部
構成を示す回路図である。
Further, the power supply voltage / carrier clock superposition signal p input through the power supply input terminals 45a and 45b.
Are also supplied in parallel to the smoothing circuit 39. FIG. 2 is a circuit diagram showing an internal configuration of the bias and waveform shaping circuit 37 and the smoothing circuit 39 in the data storage device 400 using the data transmitting / receiving device.

【0032】前記バイアス及び波形整形回路37は、C
MOSインバータINV1 ,INV2 及びフィードバッ
ク抵抗R0 の組合せ回路からなるもので、前記電源電圧
・搬送クロック重畳信号pがカップリングコンデンサC
uを介して周波数成分の信号qのみ分離されて供給され
ると、インバータINV1 の入力がその出力を平滑化し
た値にバイアスされ、デューティ比50%の搬送クロッ
ク信号tが取出される。
The bias and waveform shaping circuit 37 has a C
It is composed of a combination circuit of MOS inverters INV1 and INV2 and a feedback resistor R0, and the power supply voltage / carrier clock superimposed signal p is a coupling capacitor C.
When only the frequency component signal q is separated and supplied via u, the input of the inverter INV1 is biased to a value obtained by smoothing its output, and the carrier clock signal t having a duty ratio of 50% is taken out.

【0033】また、前記平滑回路39は、ローパスフィ
ルタL.P.F.による平衡回路からなるもので、この
L.P.F.により前記電源電圧・搬送クロック重畳信
号pに重畳されているクロック信号qが除去され、電源
電圧Vccとして取出される。
The smoothing circuit 39 includes a low pass filter L.L. P. F. It is composed of a balanced circuit by L. P. F. Thus, the clock signal q superimposed on the power supply voltage / carrier clock superimposition signal p is removed and taken out as the power supply voltage Vcc.

【0034】一方、前記データ記憶装置400の受信コ
イル42に対し、前記読取り・書込み装置300電磁誘
導により受信された受信信号yは、信号受信部35を介
してメモリアクセス信号rとして復調されメモリ部38
に入力される。
On the other hand, the reception signal y received by the electromagnetic induction of the reading / writing device 300 with respect to the reception coil 42 of the data storage device 400 is demodulated as a memory access signal r via the signal receiving part 35, and the memory part is obtained. 38
Is input to

【0035】また、前記メモリ部38から読出されたメ
モリ出力信号sは、信号送信部36を介して変調され、
送信コイル43から電磁誘導により前記データ読取り・
書込み装置300側へ送信される。
The memory output signal s read from the memory section 38 is modulated by the signal transmitting section 36,
The data is read from the transmission coil 43 by electromagnetic induction.
It is transmitted to the writing device 300 side.

【0036】図3は前記データ送受信装置を用いたデー
タ読取り・書込み装置300とデータ記憶装置400に
おける送受信動作を示すタイミングチャートである。こ
こで、メモリアクセス信号kを送受信する場合について
説明する。
FIG. 3 is a timing chart showing transmission / reception operations in the data read / write device 300 and the data storage device 400 using the data transmission / reception device. Here, the case of transmitting and receiving the memory access signal k will be described.

【0037】データ読取り・書込み装置300のにおい
て、搬送クロック信号mに同期したメモリアクセス信号
の送信元信号kが、制御部30から、例えば“0101
001110”と変化して出力されると、信号送信部4
0において、その送信元信号kが“1”のときのみ半ク
ロック分のパルスが出るような送信信号xに変換され送
信コイル40が駆動される。
In the data reading / writing device 300, the transmission source signal k of the memory access signal synchronized with the carrier clock signal m is sent from the control unit 30 to, for example, "0101".
When it is output after being changed to "001110", the signal transmitting unit 4
At 0, the transmission coil 40 is driven by being converted into the transmission signal x in which a pulse of a half clock is output only when the transmission source signal k is "1".

【0038】そして、前記データ読取り・書込み装置3
00における送受信コイル40,41及びデータ記憶装
置400における送受信コイル43,42を、それぞれ
何れも装置小型化のため、プリント基板上に渦巻状のパ
ターンを形成した小規模なものとして構成すると、デー
タ記憶装置400の受信コイル42には、前記送信信号
xの立上りを微分したような受信信号yが電磁誘導によ
り発生される。
Then, the data reading / writing device 3
When the transmission / reception coils 40 and 41 in 00 and the transmission / reception coils 43 and 42 in the data storage device 400 are each configured as a small-scale device in which a spiral pattern is formed on a printed circuit board for device miniaturization, data storage In the receiving coil 42 of the device 400, a received signal y obtained by differentiating the rising edge of the transmitted signal x is generated by electromagnetic induction.

【0039】すると、信号受信部35では、前記受信信
号yの立上りで反転処理した信号が作成されると共に、
これをさらに1クロック分遅延処理した信号が作成さ
れ、この2つの信号が排他的論理和回路(EXOR)に
介して搬送クロック信号tの立上りに同期して出力され
ることにより、復調されたメモアクセス信号r“010
1001110”が得られメモリ部38に入力される。
Then, the signal receiving section 35 creates a signal which is inverted at the rising edge of the received signal y, and
A signal obtained by further delaying this by one clock is created, and these two signals are output via the exclusive OR circuit (EXOR) in synchronization with the rising edge of the carrier clock signal t, so that the demodulated memo is generated. Access signal r "010
1001110 ″ is obtained and input to the memory unit 38.

【0040】したがって、前記構成のデータ送受信装置
を用いたデータ読取り・書込み装置300とデータ記憶
装置400によれば、データ読取り・書込み装置300
の電源電圧/搬送クロック重畳回路34により、データ
伝送同期用の搬送クロック信号mを重畳した電源電圧信
号o,pを電源出力端子44a,44b及び電源入力端
子45a,45bを接続してデータ記憶装置400に供
給し、バイアス及び波形整形回路37を介して搬送クロ
ック信号tとして得ると共に、平滑回路39を介して動
作電源Vccを得るので、電源電圧nを効率良く伝達で
き、しかも、搬送クロック専用の送受信端子やコイルを
必要とせず、小型化及びローコスト化が実現できると共
に、メモリアクセス信号k,rやメモリ出力信号s,w
を、それぞれ対応する信号送信部31、36から送受信
コイル40,42、43,41を介して電磁誘導により
送受信し、信号受信部35、32にて復調するので、接
触不良等による誤動作の恐れない、信頼性の高いデータ
伝送を実現できる。
Therefore, according to the data read / write device 300 and the data storage device 400 using the data transmitting / receiving device having the above-mentioned configuration, the data read / write device 300
The power supply voltage / carrier clock superimposing circuit 34 connects the power supply voltage signals o and p on which the carrier clock signal m for data transmission synchronization is connected to the power supply output terminals 44a and 44b and the power supply input terminals 45a and 45b. It is supplied to 400 and is obtained as the carrier clock signal t through the bias and waveform shaping circuit 37, and the operating power supply Vcc is obtained through the smoothing circuit 39, so that the power supply voltage n can be efficiently transmitted, and further, it is dedicated to the carrier clock. It is possible to realize downsizing and cost reduction without requiring a transmission / reception terminal or a coil, and to access the memory access signals k and r and the memory output signals s and w.
Are transmitted and received by electromagnetic induction from the corresponding signal transmitting units 31 and 36 through the transmitting and receiving coils 40, 42, 43 and 41, and are demodulated by the signal receiving units 35 and 32, so there is no fear of malfunction due to contact failure or the like. It can realize highly reliable data transmission.

【0041】なお、前記実施例では、送受信端子を使用
しない非接触(無線)によるデータ伝送方式として、送
受信コイルを使用した電磁誘導方式について説明した
が、送受光素子を使用した光通信方式であってもよい。
In the above embodiment, the electromagnetic induction method using the transmission / reception coil has been described as the non-contact (wireless) data transmission method that does not use the transmission / reception terminal, but it is an optical communication method using the light transmitting / receiving element. May be.

【0042】また、前記実施例では、データ伝送同期用
の搬送クロック信号m,tとして、データ1ビットに対
し1クロックの矩形波を対応させる構成としたが、この
矩形波による搬送クロック信号を正弦波として構成すれ
ば、例えば平滑回路39におけるフィルタ定数を小さく
してより小型化を図ることができると共に、平滑化によ
り得られた電源電圧Vccにおけるリップルの発生が少
なくなり、電源ノイズを抑制することができる。さら
に、前記搬送クロック信号m,tのクロック周波数を整
数倍にして構成すれば、データ伝送効率を向上すること
ができる。
Further, in the above-mentioned embodiment, the carrier clock signals m and t for synchronizing data transmission are configured such that one clock data corresponds to a rectangular wave of one clock. If it is configured as a wave, for example, the filter constant in the smoothing circuit 39 can be reduced to achieve further miniaturization, and the occurrence of ripples in the power supply voltage Vcc obtained by the smoothing is reduced to suppress power supply noise. You can Further, if the clock frequencies of the carrier clock signals m and t are made integral multiples, the data transmission efficiency can be improved.

【0043】[0043]

【発明の効果】以上のように、本発明の第1のデータ送
受信装置によれば、データ読取り・書込み装置から搬送
クロック信号の重畳された電源電圧信号が電源電圧出力
端子及びこれに接続される電源電圧入力端子を介してデ
ータ記憶装置に供給されるので、搬送クロック専用の入
出力端子あるいは送受信コイルを必要とせず小型化が行
なえ、しかも効率の良い電力の供給が行なえると共に、
データ信号が例えば電磁誘導方式等の無線により送受信
されるので、接触不良なく信頼性の高いデータ送受信処
理が行なえるようになる。
As described above, according to the first data transmitter / receiver of the present invention, the power supply voltage signal on which the carrier clock signal is superimposed is connected to the power supply voltage output terminal from the data reading / writing device. Since it is supplied to the data storage device via the power supply voltage input terminal, it can be downsized without the need for an input / output terminal dedicated to the carrier clock or a transmission / reception coil, and moreover, efficient power supply can be performed.
Since the data signal is transmitted / received wirelessly by, for example, an electromagnetic induction method, reliable data transmission / reception processing can be performed without contact failure.

【0044】また、本発明の第2のデータ送受信装置に
よれば、そのデータ伝送同期用の搬送信号が正弦波の信
号とされるので、この搬送信号の重畳された電源電圧信
号を後段で平滑化するためのフィルタ定数の減少が行な
え、使用部品の小型化が行なえると共に、電源電圧に対
する雑音混入の削減が行なえるようになる。
Further, according to the second data transmitting / receiving apparatus of the present invention, since the carrier signal for synchronizing the data transmission is a sine wave signal, the power supply voltage signal on which the carrier signal is superimposed is smoothed in the subsequent stage. It is possible to reduce the filter constant to reduce the number of components used, reduce the size of the components used, and reduce the noise contamination with respect to the power supply voltage.

【0045】また、本発明のデータ読取り・書込み装置
によれば、搬送クロック信号の重畳された電源電圧信号
が電源電圧出力端子からデータ記憶装置に接続供給され
るので、搬送クロック専用の出力端子あるいは送信コイ
ルを必要とせず小型化が行なえ、しかも効率の良い電力
の供給が行なえると共に、データ信号が例えば電磁誘導
方式等の無線により送受信されるので、接触不良なく信
頼性の高いデータ送受信処理が行なえるようになる。
Further, according to the data read / write device of the present invention, since the power supply voltage signal on which the carrier clock signal is superimposed is connected and supplied from the power supply voltage output terminal to the data storage device, an output terminal dedicated to the carrier clock or The transmitter coil is not required, the size can be reduced, the power can be supplied efficiently, and the data signal is transmitted / received wirelessly such as an electromagnetic induction method, so that reliable data transmission / reception processing can be performed without contact failure. You will be able to do it.

【0046】また、本発明のデータ記憶装置によれば、
データ読取り・書込み装置から搬送クロック信号の重畳
された電源電圧信号が電源電圧入力端子を介してデータ
記憶装置に接続供給されるので、搬送クロック専用の入
力端子あるいは受信コイルを必要とせず小型化が行な
え、しかも効率の良い電力の受電が行なえると共に、デ
ータ信号が例えば電磁誘導方式等の無線により送受信さ
れるので、接触不良なく信頼性の高いデータ送受信処理
が行なえるようになる。よって、本発明のデータ送受信
装置によれば、信頼性の高いデータ伝送が行なえると共
に、小型化に有利で且つ良好な電力伝達効率を得ること
が可能になる。
According to the data storage device of the present invention,
Since the power supply voltage signal on which the carrier clock signal is superimposed is connected and supplied from the data reading / writing device to the data storage device via the power supply voltage input terminal, there is no need for an input terminal dedicated to the carrier clock or a receiving coil, and downsizing is achieved. In addition to being able to receive electric power efficiently, data signals are transmitted and received wirelessly, for example, by an electromagnetic induction method, so that reliable data transmission / reception processing can be performed without contact failure. Therefore, according to the data transmission / reception device of the present invention, it is possible to perform highly reliable data transmission, and it is possible to obtain a favorable power transmission efficiency that is advantageous for downsizing.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の実施例に係わるデータ送受信装置を用
いたデータ読取り・書込み装置とデータ記憶装置の構成
を示すブロック図。
FIG. 1 is a block diagram showing a configuration of a data read / write device and a data storage device using a data transmission / reception device according to an embodiment of the present invention.

【図2】前記データ送受信装置を用いたデータ記憶装置
におけるバイアス及び波形整形回路と平滑回路の内部構
成を示す回路図。
FIG. 2 is a circuit diagram showing an internal configuration of a bias and waveform shaping circuit and a smoothing circuit in a data storage device using the data transmitting / receiving device.

【図3】前記データ送受信装置を用いたデータ読取り・
書込み装置とデータ記憶装置における送受信動作を示す
タイミングチャート。
FIG. 3 is a diagram for reading data using the data transmitting / receiving device.
6 is a timing chart showing a transmission / reception operation in a writing device and a data storage device.

【図4】接触式によりデータの送受信を行なう従来の読
取り・書込み装置(リーダ・ライタ)及びデータ記憶装
置の構成を示すブロック図。
FIG. 4 is a block diagram showing configurations of a conventional read / write device (reader / writer) and a data storage device for transmitting and receiving data by a contact method.

【図5】非接触式によりデータの送受信を行なう従来の
読取り・書込み装置(リーダ・ライタ)及びデータ記憶
装置の構成を示すブロック図。
FIG. 5 is a block diagram showing configurations of a conventional read / write device (reader / writer) and a data storage device for transmitting and receiving data in a non-contact manner.

【符号の説明】[Explanation of symbols]

30…制御部、31…メモリアクセス信号送信部(変調
回路)、32…メモリ出力信号受信部(復調回路)、3
3…電源回路、34…電源電圧/搬送クロック重畳回
路、35…メモリアクセス信号受信部(復調回路)、3
6…メモリ出力信号信号送信部(変調回路)、37…バ
イアス及び波形整形回路、38…メモリ部、39…平滑
回路、40…メモリアクセス信号送信コイル、41…メ
モリ出力信号受信コイル、42…メモリアクセス信号受
信コイル、43…メモリ出力信号送信コイル、44a,
44b…電源信号出力端子、45a,45b…電源信号
入力端子、Cu…カップリングコンデンサ、n,Vcc
…電源電圧、m,t…搬送クロック信号、o,p…電源
電圧・搬送クロック重畳信号、q…周波数成分クロック
信号、k,r…メモリアクセス信号、w,s…メモリ出
力信号、300…データ読取り・書込み装置、400…
データ記憶装置。
30 ... Control unit, 31 ... Memory access signal transmission unit (modulation circuit), 32 ... Memory output signal reception unit (demodulation circuit), 3
3 ... Power supply circuit, 34 ... Power supply voltage / carrier clock superimposing circuit, 35 ... Memory access signal receiving section (demodulation circuit), 3
6 ... Memory output signal signal transmission unit (modulation circuit), 37 ... Bias and waveform shaping circuit, 38 ... Memory unit, 39 ... Smoothing circuit, 40 ... Memory access signal transmission coil, 41 ... Memory output signal reception coil, 42 ... Memory Access signal receiving coil, 43 ... Memory output signal transmitting coil, 44a,
44b ... Power supply signal output terminal, 45a, 45b ... Power supply signal input terminal, Cu ... Coupling capacitor, n, Vcc
... power supply voltage, m, t ... carrier clock signal, o, p ... power supply voltage / carrier clock superimposed signal, q ... frequency component clock signal, k, r ... memory access signal, w, s ... memory output signal, 300 ... data Read / write device, 400 ...
Data storage device.

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】 データ読取り・書込み装置とデータ記憶
装置との間でデータ伝送を行なうデータ送受信装置にお
いて、 前記データ読取り・書込み装置は、 データ伝送同期用の搬送信号を電源電圧に重畳する重畳
手段と、 この重畳手段により搬送信号の重畳された電源電圧信号
を出力する電源出力端子と、 前記重畳手段にて重畳される搬送信号に同期してデータ
信号を無線にて送受信する第1の送受信手段とを具備
し、 前記データ記憶装置は、 前記電源出力端子に着脱自在に接続される電源入力端子
と、 この電源入力端子から入力される電源電圧により駆動さ
れ該電源電圧信号に重畳されている搬送信号に同期して
前記第1の送受信手段との間でデータ信号を無線にて送
受信する第2の送受信手段とを具備したことを特徴とす
るデータ送受信装置。
1. A data transmitting / receiving device for transmitting data between a data reading / writing device and a data storage device, wherein the data reading / writing device superimposes a carrier signal for data transmission synchronization on a power supply voltage. A power supply output terminal for outputting a power supply voltage signal on which the carrier signal is superimposed by the superimposing means, and a first transmitting / receiving means for transmitting and receiving a data signal wirelessly in synchronization with the carrier signal superimposed by the superimposing means. The data storage device includes a power supply input terminal detachably connected to the power supply output terminal, and a carrier driven by a power supply voltage input from the power supply input terminal and superimposed on the power supply voltage signal. Data transmission / reception, comprising: a second transmission / reception means for transmitting / receiving a data signal wirelessly to / from the first transmission / reception means in synchronization with the signal. Apparatus.
【請求項2】 前記搬送信号は正弦波の信号であること
を特徴とする請求項1記載のデータ送受信装置。
2. The data transmitting / receiving apparatus according to claim 1, wherein the carrier signal is a sine wave signal.
【請求項3】 別体に用意されるデータ記憶装置に対し
てデータの読取り及び書込みを行なうデータ読取り・書
込み装置において、 データ伝送同期用の搬送信号を電源電圧に重畳する重畳
手段と、 この重畳手段により搬送信号の重畳された電源電圧信号
を出力する電源出力端子と、 前記重畳手段にて重畳される搬送信号に同期してデータ
信号を無線にて送受信する送受信手段とを具備したこと
を特徴とするデータ読取り・書込み装置。
3. A data read / write device for reading and writing data to and from a separately prepared data storage device, and a superimposing means for superimposing a carrier signal for data transmission synchronization on a power supply voltage. A power supply output terminal for outputting a power supply voltage signal on which the carrier signal is superposed by the means, and a transmitting / receiving means for wirelessly transmitting and receiving a data signal in synchronization with the carrier signal superposed by the superposing means. And a data reading / writing device.
【請求項4】別体に用意されるデータ読取り・書込み装
置によってデータの読取り及び書込みが行なわれるデー
タ記憶装置において、 前記データ読取り・書込み装置の電源出力端子に着脱自
在に接続される電源入力端子と、 この電源入力端子から入力される電源電圧により駆動さ
れ該電源電圧信号に重畳されている搬送信号に同期して
前記データ読取り・書込み装置との間でデータ信号を無
線にて送受信する送受信手段とを具備したことを特徴と
するデータ記憶装置。
4. A data storage device in which data is read and written by a separately provided data reading / writing device, wherein a power input terminal is detachably connected to a power output terminal of the data reading / writing device. And a transmitting / receiving means for wirelessly transmitting / receiving a data signal to / from the data reading / writing device in synchronization with a carrier signal which is driven by a power supply voltage input from the power supply input terminal and is superimposed on the power supply voltage signal. A data storage device comprising:
JP6288181A 1994-11-22 1994-11-22 Data transmitter-receiver Pending JPH08147079A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6288181A JPH08147079A (en) 1994-11-22 1994-11-22 Data transmitter-receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6288181A JPH08147079A (en) 1994-11-22 1994-11-22 Data transmitter-receiver

Publications (1)

Publication Number Publication Date
JPH08147079A true JPH08147079A (en) 1996-06-07

Family

ID=17726864

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6288181A Pending JPH08147079A (en) 1994-11-22 1994-11-22 Data transmitter-receiver

Country Status (1)

Country Link
JP (1) JPH08147079A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8374482B2 (en) 2006-12-27 2013-02-12 Sony Corporation Memory card, imaging apparatus, and recording/reproducing apparatus
US8534563B2 (en) 2009-10-15 2013-09-17 Renesas Electronics Corporation Interface IC and memory card including the same

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8374482B2 (en) 2006-12-27 2013-02-12 Sony Corporation Memory card, imaging apparatus, and recording/reproducing apparatus
US8534563B2 (en) 2009-10-15 2013-09-17 Renesas Electronics Corporation Interface IC and memory card including the same
US9305253B2 (en) 2009-10-15 2016-04-05 Renesas Electronics Corporation Interface IC and memory card including the same
US9846831B2 (en) 2009-10-15 2017-12-19 Renesas Electronics Corporation Interface IC and memory card including the same

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