JPH08138056A - Method and device for phase connection in stripe image processing unit - Google Patents

Abstract

PURPOSE: To measure the change of surface shape of a moving object in real time by calculating the number of flanges at the present measuring position and updating storage data in phase memory sequentially. CONSTITUTION: When the initial value of the phase memory equivalent to one screen is set, a phase value at every image position is calculated from a stripe image with gradation by a phase calculation circuit, and it is inputted to a timewise phase connection device 6. The phase value and the number of flanges at the image position before one field or one frame are read out from memory for readout just before or at the same timing when the phase value is inputted to a timewise phase connection circuit 6a, and they are inputted to a comparison means 110 or selector 112b, a +1 circuit 114 and a -1 circuit 116, respectively. Then, the update processing of the number of flanges is performed corresponding to the size of the phase value calculated by the comparison means 110. In such a way, the phase value and the number of flanges are generated at the image position, and they are written on phase memory 102b, 104b, and also, they are outputted to a sampling means and a display circuit, and to the outside such as a controller, etc.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a phase connecting method and apparatus in a fringe image processing apparatus, and more particularly to inputting an output image of a real-time phase shift interferometer to obtain a three-dimensional shape of an object with ultrahigh accuracy at high speed and reliability. TECHNICAL FIELD The present invention relates to a phase connection method and device which are useful when measuring high property.

[0002]

2. Description of the Related Art Conventionally, when measuring the shape of an object by processing a fringe image using light, such as an interference fringe, a moire fringe, or a lattice fringe projection, a plurality of interference fringe images are used to detect the interference fringes. It has been performed to measure the surface shape of the target object from the phase information. Then, a TV camera is used to capture such a striped image, and signal processing is performed within a frame or field time of the TV, whereby measurement data can be obtained as a moving image. Particularly, in the measurement using the interference fringes of light, it is possible to observe the surface shape of the object with an accuracy of about 1/1000 of the wavelength, and to perform highly accurate measurement in real time. No. 287107.

Thus, if the surface shape of the object is obtained with high accuracy and in real time, it becomes possible to operate and control the parameters required for growth control while observing the crystal growth condition based on this measurement data. It is possible to manually operate or automatically control the valves and switches while the operator during the experiment observes the moving image. However, in such control, it is important to obtain accurate measurement data in real time, and there is a problem that automatic control operation becomes inoperable with inaccurate data. Further, in the measurement method using the fringe image in order to widen the measurement range described above, the phase connection processing is indispensable.

In the phase connection processing of the striped images, it is based on the processing of detecting that the phase jump has changed by one cycle from the obtained phase image, and increasing or decreasing the bias for one cycle. It is possible to obtain a continuous measurement range over a range, and conventionally, this phase connection processing was performed only for the generated image within the range of the image. And if a TV camera is used as the stripe image detector, it will be 30
One or 60 striped images can be obtained, and these images are subjected to phase connection processing as separate and independent images. Furthermore, when calculating the phase from the fringe image, the arctangent function is basically used, so if the denominator becomes a small value, the calculation result becomes unstable even if the noise is very small. Was there.

[0005]

In the phase connection processing of the striped image, since the phase image basically represents only relative values, one value in the image is used as a reference point and the values in the image are sequentially calculated. To decide. Therefore, if there is a point that does not change in the image, the overall shape in the image can be determined using that point as a reference point. However, if the entire image is changing, for example, if the target object is moving back and forth. In the case of measuring the shape while moving a wide tilted plane, or in the case of a partially enlarged image in the observation of the crystal growth process, the shape does not change so drastically and the object is spatially distributed over one cycle or more as a whole. In such an image, a correct result cannot be obtained only by the phase connection processing in the image, and the distortion like the original one is obtained after one period is exceeded. However, the measurement result had ended.

Further, when an interference fringe such as a mirror surface or a lens surface of a target object appears clearly, it is easy to detect a phase jump, and it is simple to detect a phase jump by observing a phase difference with an adjacent point. The algorithm rarely failed the phase connection process. However, when the S / N of the interference fringes is poor as in the case of observing crystal growth in water, the interference fringes are not obtained in the image, and a portion where phase data cannot be obtained often occurs. Furthermore, in fringe measurement using an interferometer, noise is introduced into part of the image due to dust in the optical system, etc., and there are often places where phase connection is not possible. However, since the phase connection process is basically continuous, once the connection process fails, all the subsequent data cannot be determined. Also, if there was a portion where interference fringes could not be generated well in a part of the image, the phase of that portion was indefinite and connection was not possible. In the conventional phase connection processing, the connection of one line in the vertical direction and the connection in the horizontal + x direction are performed by comparing only the phase data of each adjacent pixel, or the phase image is once stored in the field memory and then the software is used. I was doing phase connection processing. Since only the phase data of each pixel is used in any connection process, there is no information to determine whether the data is correct or incorrect, and if there are noise components such as dust in the image, the connection often fails there. It was In particular, in the processing in which the connection direction is one direction, if the connection fails at a certain point, the value of the adjacent point becomes an incorrect value thereafter, and a horizontal line error occurs on the image. On the other hand, with software connection processing, it is easy to connect in multiple directions, but even in that case, if there are inconsistencies in connections from multiple directions,
The problem is that it cannot be determined which pixel data is incorrect. Moreover, even if the connection processing is sped up,
Each time data is written in the field memory, a delay of one field or more occurs. In such a process, if only a moving image is obtained, the time required for the phase connection process can be apparently shortened by performing the connection process of each field in parallel, but when it is used as a control signal, the delay becomes large, and the precision is high. The problem was that it was difficult to control.

The present invention has been made in view of the above-mentioned circumstances, and an object of the present invention is to prevent the above-mentioned phase connection error and to perform the temporal and / or spatial phase connection in real time and to perform the phase connection. It is an object of the present invention to provide a phase connection method and device in a fringe image processing device that realizes phase connection in consideration of the reliability of and can measure a change in the surface shape of a moving object in real time.

[0008]

SUMMARY OF THE INVENTION The present invention relates to a phase connection device in a stripe image processing device for inputting a dark and light stripe image and connecting phase information calculated from the stripe image,
The above object of the present invention is to calculate a phase value from a fringe image at a currently measured image position, and a phase memory that two-dimensionally stores a phase value and the number of flanges calculated from the fringe image along a time axis. And a phase connection circuit in the time axis direction that reads out the phase value and the number of flanges at the corresponding measurement position of the phase memory, calculates the number of flanges at the current measurement position, and sequentially updates the stored data of the phase memory. To be achieved.

The present invention also relates to a phase connecting method for a stripe image in which a grayscale stripe image is input and the phase information calculated from the stripe image is subjected to a connection processing. The phase value and the number of flanges calculated from are stored in the phase memory two-dimensionally along the time axis, and the phase value at the current position is calculated from the stripe image at the image position currently being measured. The number of flanges at the current measurement position is arithmetically processed using the phase value and the number of flanges read from the corresponding measurement position of the phase memory, and the stored data of the phase memory is sequentially updated, and the phase value at the current measurement position is also calculated. It is also achieved by outputting the number of flanges to the outside.

Furthermore, the present invention also relates to a stripe image processing apparatus for inputting a grayscale image and connecting and processing the phase information calculated from this stripe image. The above object of the present invention is to provide a phase value and a space. And a phase memory that stores the number of flanges that are phase-connected, and a phase value at the image position currently being measured from the fringe image are input, and from a predetermined spatial position (-x or + x or + y direction) of the phase memory. Reads out the desired phase value and the number of flanges, and selects a plurality of spatial flange number calculation circuits that calculate the number of flanges at the image position currently being measured and the outputs of these multiple spatial flange number calculation circuits. A flange number selection circuit for selecting a desired number of flanges by a logical operation, and a position in the spatial axis direction for sequentially writing the selected flange number to a predetermined image position of the phase memory. Also achieved by having a connection circuit.

[0011]

According to the phase connection method and apparatus of the present invention, by performing phase connection on the time axis, even if the object moves, it is possible to accurately and continuously measure changes in the surface shape. . In addition, since the reliability of phase connection can be quantified, it is possible to distinguish between uncertain measurement data and highly reliable measurement data, and uncertain measurement data can be refrained from being adopted in the control system. Sex / safety can be improved. Further, by comparing the spatial phase connection result and the temporal phase connection result with each other, the reliability of the phase connection can be improved, and the phase connection processing that is resistant to the shape change of the object and noise can be realized.

[0012]

FIG. 1 shows an example of application to a control system using the signal processing device according to the present invention. In this example, the target object 18
Is a crystal in the cell 16, and its growth process is measured,
This is a system in which the growth control parameter is operated by the accelerator 14 based on the measurement result HX to grow the target crystal. The optical system 8 is composed of, for example, a reflection type interferometer and a television camera as shown in FIG.
0 is divided by the half mirror 22, and the reflected light from the crystal surface 18 and the reflected light from the reference mirror 23 interfere with each other to generate a fringe image by interference fringes. Three fringe images having different phases are simultaneously generated by the wavefront division optical system 24, and three fringe images are simultaneously captured by using the three TV cameras 8A to 8C. Since the interference fringes on the crystal surface 18 in the solution have a very poor S / N, it is desirable to insert the rotating diffusion plate 21 in the middle of the optical path in order to improve the S / N.

The striped images taken by the television cameras 8A to 8C of the optical system 8 of the striped image generating means are processed by the signal processing device 2 according to the present invention, and the crystal surface shape is measured and output as a moving image at the television rate. Television cameras are interlaced according to broadcasting standards such as NTSC, and two fields obtained every 1/60 seconds make up one frame.
If the maximum resolution in the vertical direction is used, sampling will be 1/30 second. In the interlace, there is a shift of 1/60 seconds in the vertical pixel. Moreover, since the sampling is 1/30 second, it is preferable that the change of the target object 18 is sufficiently slow. However, when performing the processing in the time axis direction more precisely, it is better to use the non-interlaced camera to sample the pixels in the vertical direction. It is desirable because there is no time lag. In this example, using a non-interlaced camera, 1/60
It takes one image per second and processes it within 1/60 second.

In the signal processing device 2, the phase calculation circuit 4 calculates the phase value Δφ at each pixel of the image using the obtained plurality of fringe images. This phase value corresponds to the value of the surface shape of the target object in the depth direction. Since the range of the phase value is only up to 2π, it is necessary to add a bias of 2πφ to the phase value according to the repetition of the stripes. The phase connection circuit 6 performs this processing. The three-dimensional shape of the target object 18 can be known from the data in the depth direction obtained by the phase connection processing at each pixel. The three-dimensional shape HX is displayed as a moving image on the display unit 12 and simultaneously output to the controller 10. The controller 10 outputs a necessary control command to the actuator 14 based on the measured three-dimensional shape every 1/60 seconds. The actuator 14 changes the crystal growth parameter based on the command. For example, when growing a crystal by electrodeposition, the current applied to the electrode may be changed, and the temperature of the surface boundary may be locally changed by increasing or decreasing the amount of laser light to be irradiated.

FIG. 3 shows a block diagram of a main part of the signal processing device 2. Stripe image signals VA to V from the cameras 8A to 8C
C is digitized by the AD converters 31A to 31C,
After that, all are digitally processed, and the band is further limited by the low pass filters 32A to 32C. In this example,
In order to reduce the order of the anti-aliasing filter required at the time of AD conversion, oversampling is adopted and digital low-pass filter processing is performed, and the S / N is improved as much as possible by setting the minimum required band. In the present invention, the information in the height direction of the target object is calculated from the fringe image by the phase shift method. This uses an optical system that can obtain fringes with a phase difference of π / 4. When these three signals are combined and the signals are subtracted by two, the sine signal Y and the cosine signal X are obtained, respectively. Is a method by which the required phase can be calculated, and is described in, for example, Japanese Patent Application No. 5-349474. In this example, lookup tables (hereinafter abbreviated as LUTs) 33A to 33C are used for the above-mentioned subtraction. In many cases, it is necessary to finely adjust the gain and offset of the obtained fringe image due to the error and variation of the optical system and the camera, but the adjustment can be easily performed by rewriting the value of the LUT. Further, it is possible to correct even a non-linear error. Thus, the optimum subtraction process can be performed on the input image, and the measurement error is reduced by bringing the sine signal and the cosine signal as close as possible to the theoretical value. Further, the cosine signal X and the sine signal Y reduce noise by passing through the two-dimensional filters 34A and 34B.
Further, this two-dimensional filter limits the spatial frequency.
In phase connection processing, it is necessary to detect phase jumps,
In that case, the phase difference from the adjacent pixel is used. If the spatial frequency is limited, the phase difference with the adjacent pixel should be within the limited range, and if it is more than that, it is due to phase jump or noise. In the case of a phase jump, the difference from the adjacent pixel is limited to the range of values determined by the limited spatial frequency from 2π, so it is separated whether it is a phase jump due to the influence of noise (a value close to 2π). Will be easier. Therefore, the limitation of the spatial frequency here is important.

The calculation of the arc tangent is performed by the arc tangent LUT 35. At the same time, the modulation factor m (t)
Is calculated by the amplitude LUT 36. In the example of FIG. 3, the data accuracy a (t) is further obtained from the modulation m (t) using the LUT 37. The image from the camera is a light and shade stripe image, and when a sufficient S / N is obtained, this stripe is clearly visible. On the other hand, when the interference fringes cannot be generated neatly and the contrast of the fringes is low, the phase information obtained from them has an uncertain value. This can be easily understood by considering the cosine signal X and the sine signal Y in polar coordinates. FIG. 8 is a diagram in which a cosine signal is plotted on the X axis and a sine signal is plotted on the y axis. Each pixel of the striped image is represented as one point in this figure. The phase obtained by the arctangent calculation is Δφ in FIG. The contrast of the stripes, that is, the modulation degree of the stripes corresponds to the radius m (t). Each pixel of the image with low stripe contrast is plotted on the circumference with a small radius m (t). A fringe image with high contrast is plotted on a circle with a large radius. Also, since signals exceeding the dynamic range of the camera are saturated, X and Y are limited by the dynamic range, and there are optimum maximum and minimum values, and the obtained image has these maximum and minimum values. Everything goes inside the rectangle surrounded by. As can be seen from the fact that the contrast is low when the radius is small (the degree of modulation is small), the S / N is low, and the resolution is limited by the number of bits, so the number of effective bits decreases when the radius is small. The error increases. Therefore, if the radius is small, the accuracy of the data deteriorates. Even when the radius is large (the degree of modulation is large), the signal is saturated due to the finite dynamic range at a position close to the maximum value and the minimum value, and it is not accurate either. Therefore, the radius range in which an accurate value can be obtained is limited.

According to the present invention, the reliability of data is determined by the accuracy a.
Express using (t). The accuracy a (t) is N (No-good), which is considered to be meaningless as a phase value, D (Doublet), which is considered to be suspicious, but G (Good), which may be treated as an accurate value. It is possible to classify into three types and four types of M (Mask) that do not need to be processed as a value, and assign a value in a preset range to each. In the present invention, the radius is divided into five steps as shown in FIG. For example, the accuracy a (t) is N because the calculation is meaningless because the radius is smaller than M1.
(No-good: for example, 8 to 15), or saturation when the radius is larger than M4, which is the radius of the circle passing through the maximum and minimum values of X and Y that are closest to the origin (Y minimum value in FIG. 9). Accuracy a because the calculation is meaningless
(T) is set to M (Mask: 64-127).
If the radius is larger than M1 but it is considered to be an accurate value, the radius of the doubtful area is set to M2 and the accuracy a (t) of this area is set.
Is D (Doublet: 16 to 31, for example). Similarly, it is assumed that the area which is not saturated but is suspicious is a radius R3 and the accuracy a (t) is D (Doublet: 16 to 31, for example). Accuracy a (t) in other reliable range
Is G (Good: for example, 32 to 63). Modulation degree m
The conversion from (t) to the accuracy a (t) is performed by the LUT 37, but it is not fixed but is changed so as to be considered optimum according to the property of the target object, the optical system, the performance of the camera, and the like. I can do things. In this example, the operator operates the LUT rewriting to make changes, but it is also possible to make the changes automatically or dynamically according to the data. Further, in the present invention, the above-mentioned four stages are used to represent the reliability, but the number of stages is not limited to four, and may be two stages, more stages, or any number of stages.

Using the phase value Δφ and the accuracy a (t) obtained as described above, the phase connection processing is performed in the phase connection circuit 6 and the like which will be described later, and the number of flanges φ (t) obtained as a result is obtained. Is displayed and used for control. At this time, the accuracy r (t) is also calculated at the same time, and the flange number φ and the accuracy r (t) are simultaneously calculated for all the pixels of the obtained image.

Further, in the display circuit 39 of FIG. 3, a display image is created based on the obtained phase data, and a grayscale display is made as a moving image on the display means 12 in RGB through the display DA converter 40 (see FIG. A)) or a bird's-eye view wireframe display of a moving image so that the three-dimensional shape can be easily understood (Fig. 2
4 (D)). At this time, the accuracy r (t) can be displayed at the same time, and the image can be used for adjusting the optical system. Further, the accuracy r (t) and the number of flanges φ (t) can be overlapped for color display. It is possible to display a black-and-white shading phase display and four levels of accuracy r (t) superimposed, just as the color cellophane is superimposed.

When the actuator 14 is controlled based on the phase data, for example, the sampling circuit 38 samples the phase data of 10 points from the image, and the value is passed to the controller 10 as an analog voltage to control the actuator. Is easy.

Next, the principle of phase connection will be described with reference to FIG. In this figure, one line in the X direction is extracted from the two-dimensional distribution of phase data (for example, the number of flanges φ (t)) obtained as one image. Since the phase value Δφ obtained by the arctangent calculation is only in the range of 2π, there is a phase jump (fringe) as shown in this figure. It becomes continuous when a bias of 2π is applied before and after the fringe portion. Phase connection is a process of detecting this fringe and calculating a bias. In the example in which three fringe images with shifted phases are used at the same time (three buckets) as in this example, since only one phase is obtained at the same time, the flange is detected by two adjacent phase values Δφ (x, y). ) (T) and Δφ (x
−1, y) (t) difference Δ = Δφ (x, y) (t) −Δ
Using φ (x−1, y) (t), the procedure is as follows.

That is, as shown in FIGS. 10 and 11, when there is no phase jump in the phase difference Δ and Δ is in the range of −d1 <Δ <d1, the number of flanges does not change and φ (x, y) (t )
= Φ (x, y) (t−1), and the connection accuracy b (x, y) (t) at this time is G (Good).
Also, a phase jump is detected, and 2π-d3 <| Δ | <2
When Δ is in the range of π, if Δ> 0, the number of flanges φ
(X, y) (t) = φ (x, y) (t−1) −1,
If Δ <0, the number of flanges φ (x, y) (t) = φ
(X, y) (t-1) +1 is updated, and the accuracy b (x, y) (t) is also G in these cases.

On the other hand, when it is slightly out of the above range due to the influence of noise or the like, if the range of d1 <| Δ | <d2 in FIG. 11 is satisfied, the number of flanges does not change and φ (x, y) (t) = φ
(X, y) (t-1), and the accuracy b (x,
y) (t) sets a value in the range of D (Doublet).
If 2π-d4 <Δ <2π-d3, the number of flanges is φ (x, y) (t) = φ (x, y) (t-1) -1,
If −2π + d3 <Δ <−2π + d4, the number of flanges is updated to φ (x, y) (t) = φ (x, y) (t−1) +1, and in these cases, the accuracy b
The value of (x, y) (t) sets the value in the range of D. If the value of the phase difference Δ is other than the above, it is determined to be abnormal,
The number of flanges is φ (x, y) (t) = φ (x, y) (t-
1), and the value of the connection accuracy b (x, y) (t) is a value in the range of N (No-good).

When the accuracy b (x, y) (t) is calculated by spatially comparing the adjacent phase values in the x direction and the y direction, the accuracy for the phase difference between the plus side and the minus side is calculated. Symmetrical properties are generally preferred. On the other hand, when the accuracy is calculated from the phase difference in the time axis direction, the characteristics of the accuracy on the plus side and the accuracy on the minus side can be set asymmetrical when the moving direction of the symmetrical object can be predicted in advance.

Next, an embodiment of the present invention will be described with reference to FIGS.
Will be described with reference to. First, FIG. 4 shows an example of a hardware configuration of an apparatus for performing the phase connection processing in the time axis direction in the stripe image processing apparatus of the present invention. The pixel position currently measured by the phase calculation circuit 4 in FIG. Phase value Δφ (x, y) (t) at time t at (x, y) (Hereinafter, the positional relationship is not important, and when it is desired to show the time relationship, Δφ
(T) or Δφ (t−1), etc., where the relation of time is not important and the relation of space is desired, Δφ (x,
y), Δφ (x-1, y-1), etc.) are input to the comparison means 110 of the phase connection circuit 6a, and at the same time, the phase value memory 102a or 102b in the phase memory 100a.
Is written at a predetermined timing. Here, the phase value memory and the flange number memory are provided for each two screens because the phase value and the flange number at the time of one feed or one frame before are read and used in the phase connection circuit 6a. If there is only one screen, the previous data will be lost when the current measurement data is written to the memory and cannot be used for subsequent processing. Therefore, there are two types of read image memory and write image memory. This is for the purpose of simplifying the timing control of the phase connection by preparing the above memory and sequentially switching these memories in feed or frame units.

The phase value Δφ (t-1) before the temporary point is input to the other input of the comparing means 110 as the read phase value memory 1.
02, the sign and absolute value of the difference between these phase values are compared / converted, and the control signal G of the selector 112a is read.
1 and the control signal G2 of the selector 112b is the comparison means 11
It is generated by 0.

On the other hand, the number of flanges φ (t−1) before the temporary point read from the number-of-flange memory 104 is +1 circuit 11
4 and −1 circuit 116 performs addition / subtraction processing to select
2a and the selector 112b, and the output thereof is input to the selector 112c together with the flange number initial value φini output from the initialization circuit 120 for selection processing, and the present number of flanges φ (t). And the writing flange number memory 104.
It will be remembered in. Thus, the depth phase information Φ (x, at the image position (x, y) at the current time t
y) and (t) can be measured by Equation 1.

[0028]

## EQU1 ## Φ (x, y) (t) = 2π * φ (x, y)
(T) + Δφ (x, y) (t) + φini where φini is an initial value.

The operation of the above structure will be described with reference to the flow chart of FIG.
In the initialization operation of No. 2, the initialization circuit 120 is activated, and the phase value memory 102a and the flange number memory 104 are
For example, a is set in the read memory, and is initialized by a microprocessor or the like (not shown) with initial values 0 and φini (step S16). In this case, the phase value memory 102b and the flange number memory 104b are used as a writing phase memory.

Next, when the initial value setting of the phase memory corresponding to one screen is completed, the phase value Δφ (x, y) at each image position (x, y) is calculated by the phase calculation circuit 4 from the light and shade stripe image.
(T) is calculated and input to the temporal phase connection circuit 6a.
Therefore, immediately before the phase value Δφ (x, y) (t) is input to the temporal phase connection circuit 6a or at the same timing, the image position (x, y) one field or one frame before from the read phase memory. Phase value Δφ (x, y) (t-1) at
And the number of flanges φ (x, y) (t−1) are read out, and the comparison means 110 or the selector 112b, + 1 circuit 1 respectively.
It is input to the 14−1 circuit 116.

Subsequently, the comparison means 110 calculates the phase difference Δ by the equation 2, and updates the number of flanges φ (x, y) (t) according to the magnitude of the phase difference Δ.

[0032]

## EQU00002 ## Temporal phase difference .DELTA. =. DELTA..phi. (X, y) (t)-. DELTA..phi.
(X, y) (t-1) When the temporal phase difference Δ is calculated by Equation 2 (step S
4), the magnitude of the phase difference Δ is checked and | Δ | <K1
In this case, the comparison means 110 turns on the selection signal G2 without changing the number of flanges and outputs it to the selector 112b (step S6). Therefore, in this case, φ (t) = φ
The number of flanges is output from the phase connection circuit 6a as (t-1) (step S14).

If Δ <-K1, (step S
6, S8), the magnitude of the phase difference Δ is compared with a predetermined threshold value −K1, + K1 or the like by a subtracter, a digital comparator or the like (not shown) inside the comparison means 110, and the selection signal G2 without changing the number of flanges is turned off. Selector 112b
And the +1 circuit output selection signal G1 is turned on.
Is output to the selector 112a. As a result, the output of the temporal phase connection circuit 6a is φ (t) = φ (t-1).
It becomes +1 (step S12).

On the other hand, when Δ> K1, the selection signal G2 with no change in the number of flanges is set to OFF and the +1 circuit output selection signal G1 is also set to OFF inside the comparison means 110 in the same manner as described above. Therefore, the temporal phase connection circuit 6
The output of a becomes φ (t) = φ (t−1) −1 (step S10).

Thus, the phase value Δφ (x, y) (t) and the number of flanges φ (x, y) at the image position (x, y).
If (t) can be generated, the phase memories 102b and 104b
These values are written to (step S18),
It is also output to the sampling means 38 and the display circuit 39,
It is externally output to the controller roller 10, the monitor TV 12, etc. (step S20). The above-described steps S4 to S20 are repeated for each image (step S22), and when the processing for the entire screen is completed (step S24), the phase value memory 102a and the flange are processed in the next field or frame processing. Number memory 10
4a is used as a writing plane, the phase value memory 102b and the flange number memory 104b are switched to a reading plane, and the processes of steps S4 to S24 are repeated (step S26). Thus, the phase connection processing in the time axis direction ends. Note that this phase connection processing is characterized in that the phase connection processing can be performed without performing any spatial phase connection in the vertical and horizontal directions.

FIG. 6 corresponding to FIG. 4 shows another embodiment of the present invention, in which the accuracy r (t) indicating the certainty of the phase value Δφ input to the phase connection circuit is calculated as the phase. The value Δφ (t) and the number of flanges φ (t) are calculated and output to the outside. In FIG. 6, FIG.
The devices denoted by the same reference numerals respectively perform the same function, and the temporal phase connection circuit 6b is composed of the temporal phase connection basic circuit 6a and the accuracy calculation circuit 130. It is basically the same as the fourth phase connection circuit 6a. Then, a function is added in which an initial value G4 for the accuracy memories 106a and 106b is output from the initialization circuit 120 and is input to the accuracy calculation means 132. Further, the accuracy calculating means 132 has the measurement accuracy a (t) obtained by converting the modulation degree m (t) calculated from the grayscale image by the phase calculating circuit 4 by the modulation degree-accuracy converting means 37. , The mask determination data r (t−1) read from the accuracy memory 106 to determine whether or not the pixel is a mask pixel, and the connection accuracy b (generated by the phase difference-accuracy conversion means 134 based on the phase difference Δ. t) and t), respectively, and the accuracy r (t) is generated by the prioritized logical operation.

The concept of the measurement accuracy a (t) is described in detail above with reference to FIGS. 9A and 9B.
It is preferable to prepare a conversion table as shown in (B) in the modulation / accuracy conversion means 37. Also, the connection accuracy b (t)
11, the concept has been described above with reference to FIG. 11, but more specifically, the phase difference Δ is input from the comparison means 110 to the accuracy conversion means 134, including the sign, and −2π <Δ <= −
2π + d3 or −d1 <= Δ <= d1 or 2π−d3 <
If the range is Δ = <2π, the accuracy b (x, y) (t) is set to a value of 32 to 63 as G. Also, -2π + d
In the range of 3 <Δ <= − 2π + d4 or −d2 <= Δ <−d1 or d1 <Δ <= d2 or 2π−d4 <= Δ <2π−d3, the accuracy b (x, y) (t ) Is 1 as D
Set a value from 6 to 31. Further, −2π + d4 <Δ <−
In the range of d2 or d2 <Δ <2π-d4, the accuracy b (x, y) (t) should be set to a value of 8 to 15 as N.

Here, instead of assigning a single value to the accuracy a (t) and b (t), a value within a certain range is assigned because the degree of modulation is accurately reflected. Or, by accurately reflecting the magnitude of the phase difference, the same normal Good
The accuracy of the range can also be changed so that a finer evaluation of accuracy can be made, or the accuracy of prioritization can be set between the accuracy of connection on the time axis and the accuracy of connection on the spatial axis. This is to evaluate the degree.

The operation of this configuration will be described with reference to the flowchart of FIG. 7. First, step S
In the initialization operation of No. 2, the initialization circuit 120 is activated, and the phase value memory 120a and the flange number memory 104a are
The accuracy memory 106a is set as a read phase memory, for example, and is initialized by a microprocessor or the like (not shown) with initial values Δφ0, φini and r0.

Next, when the initial values of the above-mentioned three types of phase memories 102a to 106a have been set for the entire area of one screen, the phase calculation circuit 4 calculates each image position (x, y) from the light and shade stripe image. Phase value Δφ (t) and modulation factor m at
(T) is calculated and input to the phase connection basic circuit 6a and the accuracy calculation circuit 130 (step S3).

When the phase value Δφ (t) is input to the comparison means 110 of the temporal phase connection basic circuit 6a, the phase value Δφ (t-1) one feed or one frame before from the phase value memory 102a. Is read at a predetermined timing,
The temporal phase difference Δ is calculated in the comparison means 110 by the above-described equation 2 (step S4), and when Δ <−K1, the flange number φ is obtained by steps S6, S8 and S12.
(T) = φ (t−1) +1 is updated, and the temporal accuracy b at this time is calculated by the temporal accuracy conversion means 134.
In (t), G or D is output to the accuracy calculation means 132. If Δ> K1, steps S6, S8,
The number of flanges is updated to φ (t) = φ (t−1) −1 in S10, and G or D of the temporal connection accuracy b (t) is generated via the accuracy conversion means 134. on the other hand,
When −K2 <= Δ <= K2, there is no change in the number of flanges, and φ (t) = φ (t−1), and in this case as well, the temporal connection accuracy b (t) is G or D. (Step S
6, S42, S14). If K2 <| Δ | <K1, it is determined that an abnormal connection has occurred, and the number of flanges is φ.
(T) = φ (t−1), but the temporal connection accuracy b
In (t), the value in the range of N is output from the accuracy conversion means 134 (steps S6, S42, S44).

When the modulation factor m (t) is calculated by the phase calculation circuit 4, the measurement accuracy factor a (t) is generated by the modulation factor-accuracy factor conversion means 37 (step S40). It is input to the calculation means 132. Thus, the measurement accuracy a (t), the time-connection accuracy b (t), and the accuracy r one feed or one frame before from the accuracy memory 106.
When (t-1) is input to the accuracy calculation means 132, r
It is determined by (t-1) whether the current position (x, y) is a mask area. If it is a mask area, mask data is output. If it is not a mask area, for example, a value with high accuracy is assigned to this pixel. Accuracy r (x, y) (t) = max (a
(T), b (t)) is output from the accuracy calculation means 132 (step S46).

Thus, if the phase value Δφ (t), the number of flanges φ (t), and the accuracy r (t) at the pixel position (x, y) can be generated, the phase memories 102b, 104b and 106.
These values are written to b (step S18) and also output to the sampling means 38 and the display circuit 39, and these data are used by the controller 10 and the monitor TV 12 (step S20). Furthermore, each processing of the above steps S3 to S20 is repeatedly executed for each pixel (step S22), and when the processing of the entire one screen is completed (step S24), the phase memories 102a,
104a 106a becomes the writing plane in the next field or frame, and the phase memories 102b, 104b, 1
06b becomes the reading plane, and the above processing is repeated (step S26). Thus, the phase connection process in the time axis direction with accuracy is completed. In this phase connection process with accuracy, the controller side checks the accuracy r (t), phase data with low accuracy is not used for generating the control command, and only phase data with high accuracy is automatically detected. It can be used to output control commands and adjust the focus of the optical system.

FIG. 13 corresponding to FIG. 4 shows another embodiment of the present invention, in which the spatial phase connection circuit 6c is spatially arranged in + x direction, −x direction and + y direction. Flange number calculation circuit 6axp, 6axm, 6ayp
Etc., and the phase connection processing is executed not by the time axis but by spatial processing based on comparison with adjacent pixels. In FIG. 13, the devices with the same numbers as in FIG. 4 perform the same functions respectively, and the temporal phase connection circuit 6a and the flange number calculation circuits 6axp, 6axm,
6ayp has exactly the same constituent elements, but the read-out phase value and the read-out position and timing of the number of flanges for comparison input to the comparison means 110 are greatly different from those in the case of temporal phase connection. That is, since the flange number arithmetic circuit executes spatial phase connection, the sampled phase value data and flange number data in the same feed or the same frame are read and used. Therefore, +
To the x-direction flange number calculation circuit 6axp, Δφ (x-1,
The data of y) (t) and φ (x−1, y) (t) are read and input, and the number of flanges φ (xp, y) (t) is output to the selection circuit 150. Further, it is desired to read the phase value and the number of flanges from the position (x + 1, y) to the −x direction flange number calculation circuit 6axm, but the phase value Δφ (x,
y) Since these values are not yet available immediately after the input of (t), the calculation processing for one row is delayed and Δφ (x, y + 1) (t) is input at the timing of inputting Δφ.
The data of (x + 1, y) (t) may be read from the phase value memory. Further, the phase value Δφ from the position (x, y-1) is applied to the + y direction flange number calculation circuit 6ayp.
(X, y-1) and the number of flanges φ (x, y-1) are read and input, and the number of flanges φ (x, yp) is selected by the selection circuit 15.
Output to 0. The operation of this configuration will be described with reference to the flowchart of FIG. 14. First, in the initialization operation of step S2, the initialization circuit 1
20 is started, the phase value memory 102, the flange number memory 104, etc. are initialized, and the starting point (xin
Number of flanges in i, yini) φini (xini, y
ini) is also set.

Next, the phase value Δφ (x, x at the image position (x, y) is calculated by the phase calculation circuit 4 of FIG.
y) (t) is calculated and stored in a predetermined address of the phase value memory 102 (step S3), and is also input to the comparator 110 of the + x direction flange number calculation circuit 6axp.
Δφ (x-1, y) (t) and φ (x-1, y) (t) are read from the phase memory 100c, and the number of flanges φ
(Xp, y) is arithmetically processed (step S47) and written in the flange number memory 104 via the selection circuit 150. Then, Δφ (x, y + 1) (t) delayed by one line
Timing control circuit 100c at the timing of inputting
Phase value Δφ (x, y) (t), Δφ
(X + 1, y) (t) and the number of flanges φ (x + 1, y)
(T) is read from the phase memory, input to the −x direction flange number calculation circuit 6axm, and its output φ (xm, y).
Is transferred to the selection circuit 150 (step S48). Similarly, at the timing when Δφ (x, y + 1) (t) is input, the phase values Δφ (x, y) (t) and Δφ (x, y-
1) (t) and the number of flanges φ (x, y−1) (t) are read from the phase memory, and the + y direction flange number calculation circuit 6
It is input to ayp and its output φ (x, yp) is transferred to the selection circuit 150 (step S49). Furthermore, at this same timing, from the flange number memory, φ (x, y)
When the value of (t) is read and similarly input to the selection circuit 150, the selection circuit 150 compares the number of flanges by a majority operation, and if two or more are the same value, the value is calculated as the number of flanges φ ( x, y) (t) is written to the flange number memory, and when the input flange numbers are all different, for example, the + x direction flange number calculation circuit 6axp
Output φ (xp, y) of the number of flanges φ (x, y) (t)
Is written in a predetermined position in the flange number memory (step S50).

Thus, the number of flanges φ (x, y) (t)
Is determined, the phase value Δφ (x, y) for control / display
(T) and the number of flanges φ (x, y) (t) are externally output (step S52). After that, the x, y update processing is sequentially executed (step S54), and the spatial phase connection processing can be executed in real time with only a delay time corresponding to one horizontal line (step S56). In such a spatial phase connection process, the spatial phase connection is performed from three different directions, and the number of flanges is determined by the majority calculation.
The connection reliability can be greatly improved as compared with the single phase connection processing.

FIG. 15 corresponding to FIGS. 6 and 13.
Shows yet another embodiment of the present invention, in which spatial flange number arithmetic circuits 140a to 140c with accuracy are provided inside the spatial phase connection circuit 6d, Based on the output accuracy and the number of flanges, the selection signal generation circuit 160 generates selection signals G12 and G10 having the final number of flanges φ (x, y) and accuracy r (x, y), and selectors 164 and 162. The optimum output is selected with. FIG. 16 shows a more detailed block diagram of the spatial flange number arithmetic circuit 140 with accuracy. These components are the same as the temporal phase connection circuit 6b shown in FIG. Read data r (x, y) (t-1), Δφ
(X, y) (t-1) and φ (x, y) (t-1) are r (x-1, y) (t) and Δφ (x-1, y), respectively.
(T), φ (x-1, y) (t), etc. are replaced by the spatial displacement read data.

In such a configuration, the operation is shown in FIG.
Referring to the flowchart of FIG. 7, first, in the initialization operation of step S2, the initialization circuit 120 is activated, and the phase value memory 102 and the flange number memory 10 are activated.
4. The accuracy memory 106 and the modulation / measurement accuracy memory 108 are initialized, and the starting point (xini,
number of flanges in yini) φini (xini, yin
i) is also set in the flange number memory.

Next, the phase value Δφ (x, x, at the image position (x, y) is calculated by the phase calculation circuit 4 of FIG.
y) (t) and the modulation factor m (x, y) (t) are calculated,
Spatial flange number calculation circuits 140a to 140 with accuracy
When input to c, the modulation factor m (x, y) (t) is further converted into the measurement accuracy a (x, y) (t) by the LUT 37, and then the phase value memory 102, the measurement accuracy. Memory 1
08 and the like are stored (step S3). Then, the spatial flange number arithmetic circuit 140a with + x direction accuracy and +
The spatial flange number arithmetic circuit 140c with accuracy in the y direction is activated, and Δφ (x
-1, y) (t) and Δφ (x, y-1) (t) are read out and input to the comparison means 110a and 110c, and the displacement reading accuracy r (x-1, y) (t). ), R (x,
y-1) (t) is also read out, and the accuracy calculation means 132
a, 132c, and the displacement reading flange number φ
(X-1, y) (t) and φ (x, y-1) (t) are also read, and the selector 112b, the +1 circuit 114a, the -1 circuit 116a and the selector 112c, the +1 circuit 114c,
-1 is input to the circuit 116c or the like. Thus, the number of flanges φ (xp, y) and φ (x, yp) are calculated in the accuracy-added spatial flange number calculation circuits 140a and 140c, respectively, and the accuracy r (xp, y) and r (x) are calculated. , Yp) is also calculated (steps S60, S6)
4), these data are the selectors 164 and 1 respectively.
62 is input. Furthermore, the accuracy r (xp, y), r
(X, yp) is also input to the selection signal generation circuit 160,
The selection signals G10 and G12 of the selectors 162 and 164 are generated as follows.

That is, in the selection signal generating circuit 160, for example, as shown in FIG.
It suffices to compare (xp, y) and r (x, yp) and generate the control signals G10 and G12 so that the selector selects the output of the flange number arithmetic circuit showing a high accuracy. This calculation is performed, for example, by M in the selection signal generation circuit 160.
PU is prepared and r (xp, y) and r (x, yp)
This is achieved by comparing the sizes of the above and outputting the larger flange number calculation circuit number as G10 and G12 (step S68). Thus, the first stage accuracy r (x,
Since y) and the number of flanges φ (x, y) (t) have been determined, these values are written in the accuracy memory 106 and the number of flanges memory 104, respectively.

However, at this point, the phase value Δφ used in the spatial arithmetic circuit with accuracy -x direction 104b.
(X + 1, y) (t), number of flanges φ (x + 1, y)
Since (t) and the accuracy r (x + 1, y) (t) are not stored in the respective phase memories yet, the process proceeds to the processing of the next pixel, and the measurement of the position (x, y + 1) delayed by one horizontal line is performed. After inputting the data, the spatial flange number calculation circuit 140b may be activated. Then, in the calculation of the spatial flange number calculation circuit 140b, the phase value Δφ (x, y)
(T) and Δφ (x + 1, y) (t) are stored in the phase value memory 10
Read from 2 and the number of flanges φ (x + 1, y)
(T) is read from the flange number memory 104, the accuracy r (x + 1, y) is read from the accuracy memory 106, and the measurement accuracy a (calculated from the modulation m (x, y) (t). x, y) (t) is read from the modulation degree memory 108 and supplied to the arithmetic circuit 140b, and the number of flanges φ (xm,
y) (t) and the accuracy r (xm, y) (t) are calculated (step S62).

Thus, when the accuracy r (xm, r) (t) is generated, this signal is input to the selection signal generating circuit 160, and the accuracy r1 of the above-mentioned first stage is input from the accuracy memory 106. (X, y) (t) is read and also input to the selector 162 and the selection signal generation circuit 160. Further, the number of flanges φ1 (x, y) (t) in the above-described first stage is read out from the number of flanges memory 104, and the selector 16
4 is input. At this point, it becomes possible to compare the spatial phase connection results in the three directions, and the selection signal generation circuit 1
At 60, the second stage selection signal generation processing is performed. In the selection signal generation processing of the second stage, the output of the flange number calculation circuit that outputs the maximum accuracy may be selected as shown in FIG. 20, as in the selection signal generation logic of the first stage. At this point, the flange number calculation circuit 140a-
It is also possible to activate all 140c and recalculate the accuracy and the number of flanges, and perform the second stage selection signal generation processing based on the majority logic as shown in FIG. 21 (step S68).

Thus, when the selection signal generation process of the second stage is completed, the final accuracy r (x, y) (t) and the number of flanges φ (x, y) and (t) are determined and written in the phase memories 106 and 104, respectively (step S7).
0) together with the phase value data Δφ (x, for control / display
y) and (t) are output to the outside (step S7).
2). After that, the x, y update processing and the selection signal generation processing of the first step / second step are executed in a time-divisional manner under a predetermined delay time (step S54), and the spatial phase connection of one screen is performed. The process is completed (step S56). In such spatial phase connection processing, spatial phase connection processing is performed from three different directions, and since the accuracy of each connection is quantified and evaluated, noise screens, step shapes, and other locations where connection processing is uncertain are performed. It can be checked in advance and is useful for adjusting the optical system and creating control commands for the hood back system.

FIG. 18 corresponding to FIG. 15 shows still another embodiment of the present invention, in which the spatial phase connection circuit 6d is provided with an accuracy-dependent temporal flange number calculation circuit 6b.
Is added to further improve the accuracy of phase connection. The time-dependent flange number calculation circuit 6b with accuracy is shown in FIG.
The time phase connection circuit 6b has the same configuration, and the accuracy output from these flange number calculation circuits is input to the selection signal generation circuit 160a and also to the selector 162a. Is also input to the selection signal generation circuit 160a and the selector 164a, respectively.

The operation of such a configuration is shown in FIG.
Explaining with reference to the flowchart of FIG. 9, first, in the initialization operation of step S2, the initialization circuit 120 is activated, and the phase value memory 102 and the flange number memory 10
4. The accuracy memory 106, the modulation / measurement accuracy memory 108, etc. are initialized.

Next, the phase value Δφ (x, x at the image position (x, y) is calculated by the phase calculation circuit 4 of FIG.
y) (t) and the modulation factor m (x, y) (t) or the measurement accuracy a (x, y) (t) are calculated, and the phase value memory 10
2b, written in the measurement accuracy memory 108 or the like (step S3), and at the same time, the accuracy-equipped temporal flange number calculation circuit 6b and the accuracy-equipped spatial flange number calculation circuit 140.
The flange number calculation circuits 6b, 140a, 140c are also activated. Then, when these flange number calculation circuits are activated,
In each flange number calculation circuit, the phase value and the flange number are read from a predetermined spatial position in the phase value memory 102a, the flange number memories 104a and 104b, and the flange number φ (x
t, yt) (t), accuracy r (xt, yt) (t), etc. are calculated. Specifically, in the temporal flange number calculation circuit 6b, the phase value Δφ (x, y) (t-1) at a time point (t-1) one feed or one frame before the phase value memory 102a and the flange number memory 104a. ) And the number of flanges φ (x, y) (t−1) are read out and processed to calculate the number of flanges φ (xt, yt) (t) and the accuracy r.
(Xt, yt) (t) is output to the selection signal generation circuit 160a and the selectors 162a and 164a (step S6).
6). Further, in the spatial flange number calculation circuit 140a,
The phase value Δφ (x-1, y) (t) and the number of flanges φ from the phase value memory 102b and the number of flanges memory 104b.
(X-1, y) (t) is read out and arithmetically processed, and the number of flanges φ (xp, y) (t) and accuracy r (xp, y) (t).
The selection signal generation circuit 160a and the selectors 162a, 1
It outputs to 64a (step S60). Further, in the spatial flange number calculation circuit 140c, the phase value memory 102b
And the flange number memory 104b from the phase value Δφ (x, y
−1) (t) and the number of flanges φ (x, y−1) (t) are read and arithmetically processed to obtain the number of flanges φ (x, yp).
(T) and the accuracy r (x, yp) (t) are output to the selection signal generation circuit 160a and the selectors 162a and 164a (step S64). At this point, the position (x + 1,
Since the phase value and the number of flanges at y) have not been calculated yet, for example, the phase value Δφ at the pixel position (x + 2, y)
After starting the input processing of (x + 2, y) (t),
At a desired time point, after a predetermined delay time, the flange number calculation circuits 140b and 6b, 140a, 140c, etc. are activated again, and the final flange number φ (x, y) (t) and the accuracy r are obtained.
Recalculate (x, y) (t).

Thus, the flange number calculation circuits 6b, 14
0a, 140c, the accuracy r (xt, yt)
(T), r (xp, y) (t), r (x, yp) (t)
And the number of flanges φ (xt, yt) (t), φ (xp,
When y) (t) and φ (x, yp) (t) are calculated, the selection signal generation circuit 160a causes the number of flanges in the first stage φ
The control signals G22 and G20 for selecting 1 (x, y) (t) and the accuracy r1 (x, y) (t) are generated according to the selection signal generation logic shown in FIG. 20 or FIG. In the generation logic of FIG. 20, the accuracy r (xt, yt) (t), r
From (xp, y) (t) and r (x, yp) (t), the flange number arithmetic circuit that outputs the maximum accuracy maxri is obtained, and the flange number and the accuracy of the maximum accuracy output flange number arithmetic circuit are calculated. Degree is the number of flanges in the first stage φ1 (x, y)
(T) = φ (maxri) (t) and accuracy r1 (x,
y) (t) = maxri (t) (step S8)
0), the flange number memory 104b and the accuracy 106b are written (step S82). Further, in the generation logic of FIG. 21, the number of flanges φ (xt, yt) (t), φ (xp,
y) (t) and φ (x, yp) (t) are compared with each other,
A majority process is performed, the maximum number of flanges is written in the flange number memory 104b as the first stage flange number φ1 (x, y) (t), and the accuracy based on the majority rule as shown in column 1000 of FIG. The maximum accuracy is written in the accuracy memory 106b as the accuracy of the first step (step S82).

When the first-stage flange number / accuracy generating process is completed as described above, the process proceeds to the first-stage flange number / accuracy generating process of the next pixel (x + 1, y).
Similarly, when the first-stage flange number / accuracy generation process for the pixel (x + 1, y) is completed, the second-stage flange number / accuracy generation process for the pixel position (x, y) is performed at a desired delay time. Start. In this second stage flange number / accuracy generation processing, the number of flanges φ (xm, y) (t) and the accuracy r (xm, y) (t) output from the spatial flange number calculation circuit 140b are further calculated. The selection signal generation process in consideration is performed in the circuit 160a. Therefore, also in the selection signal generation processing of the second stage, two types of signal generation processing can be considered based on FIG. 20 or FIG. In either case, at this point, all the data has the phase value memory 10
2. Since it is stored in the flange number memory 104, the accuracy memory 106, the measurement accuracy memory 108, etc., all the flange number calculation circuits 6b, 140a, 140b, 140c are activated, and the flange number φ (xt , Yt)
(T), φ (xp, y) (t), φ (xm, y)
(T), φ (x, yp) (t) and accuracy r (xt, y
t) (t), r (xp, y) (t), r (xm, y)
(T) and r (x, yp) (t) are calculated and input to the selection signal generation circuit 160a and the selectors 162a and 164a, respectively. Thus, when the four types of flange numbers and the respective degrees of accuracy are input, the selection signal generation logic of FIG. 20 detects the flange number arithmetic circuit that has output the maximum degree of accuracy among the four types of accuracy, and The circuit accuracy and the number of flanges are written into the memories 106b and 104b as the final accuracy and the number of flanges, respectively. In the selection signal generation logic of FIG. 21, the maximum number of flanges is selected from the four types of flanges by majority logic, and this maximum number of flanges is written in the memory 104b as the final number of flanges, and the accuracy is increased. It is advisable to output the maximum value out of the inputted accuracy or a value reflecting the number of flanges adopted in the majority vote.

Thus, when the number of flanges and the accuracy of the second stage are written in the phase memory, these data are output to the outside for control / display together with the phase value Δφ (x, y) (t). (Step S84). After that, the flange number / accuracy generation processing in the second stage is sequentially activated after a predetermined delay time, and when the phase connection processing for one screen is completed (step S88), the read plane of the phase memory for processing the time axis data. / Writing plane is switched, and with this switching, the plane to be read by the spatial flange number arithmetic circuits 140a to 140c, the accuracy r (x, y) (t), and the number of flanges φ (x, y) (t). The writing planes of are also switched and used alternately (step S90). As described above, in the temporal and spatial phase connection processing, since the phase connection processing considering the continuity in the time axis direction as well as the space axis can be executed, it is possible to greatly reduce the places where phase connection is impossible, The connection reliability can be further enhanced.

FIG. 22 is a diagram showing an example of the phase connection process using the maximum accuracy shown in FIG. 20, and FIG.
4 shows an example of phase connection processing of the horizontal line of the point of interest P2 assuming that the number of flanges at the starting point P1 is known. FIG. 22 (B) shows the result of the phase connection processing in the first stage.
The area on the right side of 2 can be normally connected, but the area on the left side is indeterminate. Therefore, when the second-stage phase connection processing is executed, the spatial flange number arithmetic circuit 1 in the -x direction is calculated.
Since the result shown in FIG. 22C can be generated by 40b or the like, it is shown in FIG. 22D by selecting the maximum accuracy from the accuracy shown in FIGS. 22B and 22C. Thus, all normal phase connection can be realized. FIG.
Is an example of a display screen when the phase data and the accuracy are superimposed and displayed on the monitor TV 12 or the like.

[0061]

As described above, according to the phase connection method and apparatus of the present invention, the phase connection processing in the time axis direction is performed, so that the phase connection considering the movement and the growth motion of the object can be accurately performed. It can be realized, and movements such as the growth process of the crystal surface can be measured at high speed and stably. Further, by executing the spatial phase connection processing in the + x direction, the -x direction, and the + y direction in real time and comparing these connection results with each other, the reliability of the phase connection can be dramatically improved. Then, the phase connection processing result in the time axis direction,
By comparing the spatial phase connection processing with each other, the growth-changing object surface can be measured more accurately, and if these accurate measurement data are available, the growth principle of the growth-changing object surface becomes the atomic size. Can be elucidated at the level,
It is possible to develop a crystal growth process that has not been known hitherto.

[Brief description of drawings]

FIG. 1 is a system block diagram when the present invention is applied to crystal growth control.

FIG. 2 is an example of a detailed configuration of an optical system used in the present invention.

FIG. 3 is a diagram showing a relationship between a phase calculation circuit and a phase connection circuit of the present invention.

FIG. 4 is a structural example of a temporal phase connection circuit of the present invention.

FIG. 5 is a flow chart for explaining the operation.

FIG. 6 is another configuration example of the temporal phase connection circuit of the present invention.

FIG. 7 is a flowchart for explaining the operation.

FIG. 8 is a diagram showing the relationship between the phase difference Δφ and the modulation factor m (t) according to the present invention.

FIG. 9 is a diagram for explaining the measurement accuracy conversion of the present invention.

FIG. 10 is a diagram for explaining the concept of phase connection processing of the present invention.

FIG. 11 is a diagram for explaining the phase difference accuracy of the present invention.

FIG. 12 is a diagram showing an example of accuracy calculation according to the present invention.

FIG. 13 is a diagram showing a configuration example of a spatial phase connection circuit of the present invention.

FIG. 14 is a flowchart for explaining the operation.

FIG. 15 is a diagram showing a configuration example of another spatial phase connection circuit of the present invention.

FIG. 16 is a diagram showing a configuration example of a spatial flange number arithmetic circuit with accuracy according to the present invention.

FIG. 17 is a flowchart for explaining the operation.

FIG. 18 is a diagram showing a configuration example of a temporal and spatial phase connection circuit of the present invention.

FIG. 19 is a flowchart for explaining the operation.

FIG. 20 is a diagram showing an example of a selection signal generation logic of the present invention.

FIG. 21 is a diagram showing an example of another selection signal generation logic of the present invention.

FIG. 22 is a diagram showing an example of spatial phase connection processing of the present invention.

FIG. 23 is an example in which the phase data and accuracy of the present invention are superimposed and displayed on the display means.

[Explanation of symbols]

2 signal processing device 4 phase calculation circuit 6, 6a, 6b, 6c, 6d, 6e phase connection circuit 8 optical system 10 controller 8A-8C TV camera 20 laser light 22 half mirror 24 wavefront division optical system 25A-25C polarizing plate 33 , 35, 36, 37 LUT 100, 102, 104, 106, 108 Memory 110 Comparison means 112a to 112c, 162, 164 Selector 114 +1 circuit 116 -1 circuit 130 Accuracy calculation circuit 132 Accuracy calculation means 6axp, 6axm, 6ayp , 6a, 140a-14
0c Flange number calculation circuit 160, 160a Selection signal generation circuit

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification code Internal reference number FI technical display location G06T 9/20

Claims (8)

[Claims] 1. A stripe image processing apparatus for inputting a grayscale stripe image and connecting and processing phase information calculated from this stripe image, wherein a phase value and the number of flanges calculated from the stripe image are set along a time axis. A phase memory that stores two-dimensionally sequentially and a phase value is calculated from the fringe image at the image position currently being measured, and the phase value and the number of flanges at the corresponding measuring position of the phase memory are read out, and the number of flanges at the current measuring position is read. And a phase connection circuit in the time axis direction for sequentially updating the stored data of the phase memory. 2. The accuracy calculation circuit for calculating and storing the accuracy representing the probability of the number of flanges calculated at the current measurement position in the phase connection circuit in the time axis direction is further provided. Phase connection device in the striped image processing device. 3. The phase connection device in the fringe image processing device according to claim 1, wherein the fringe image is an output image of a real-time phase shift interferometer. 4. A phase connecting method for a stripe image, wherein a grayscale stripe image is input, and phase information calculated from this stripe image is connected, wherein a phase value calculated from the stripe image and the number of flanges are set as time. Two-dimensionally stored in the phase memory along the axis, the phase value at the current position is calculated from the fringe image at the image position currently being measured, and read from this phase value and the corresponding measurement position in the phase memory. The number of flanges at the current measurement position is arithmetically processed using the phase value and the number of flanges, and the stored data in the phase memory is sequentially updated, and the phase value and the number of flanges at the current measurement position are output to the outside. A phase connection method for fringe images, which is characterized in that 5. A phase memory for storing a phase value and the number of flanges spatially phase-connected in a fringe image processing device for inputting a gray-scale fringe image and connecting and processing phase information calculated from the fringe image, The phase value at the image position currently being measured is input from the fringe image, and the desired phase value and the number of flanges are read from a predetermined spatial position (-x or + x or + y direction) of the phase memory, and the current measurement is being performed. A plurality of spatial flange number calculation circuits for calculating the number of flanges at the image position, and a flange number selection circuit for inputting the outputs of these plurality of spatial flange number calculation circuits and selecting a desired number of flanges by selection logical calculation And a phase connection circuit in the spatial axis direction for sequentially writing the selected number of flanges to a predetermined image position of the phase memory. Phase connection device in processing equipment. 6. The accuracy calculation circuit for calculating and storing the accuracy representing the certainty of the phase value calculated at the current measurement position in the phase connection circuit in the spatial axis direction. Phase connection device in the striped image processing device. 7. The accuracy of the number of flanges is improved by inputting the number of flanges and the accuracy calculated by connection in the time axis direction to the flange number selection circuit and the accuracy calculation circuit, respectively. Phase connection device in fringe image processor. 8. The phase connection device in a stripe image processing apparatus according to claim 5, wherein the stripe image is an output image of a real-time phase shift interferometer.