JPH08129807A - Timing control device - Google Patents

Abstract

PURPOSE: To effectively utilize the change of a signal when a timing control signal is used as an edge sensing signal. CONSTITUTION: Rotation of a rotary body is detected by a rotation detecting means. A timing control signal is generated by a timing generating means 320 from a clock of a counter 321 for outputting a timing signal synchronized with the rotation of the rotary body and the timing signal. The timing control signal is differentiated by a differentiation means 330 of the timing generating means 320. A differentiated timing control signal outputted from the differentiation means 330 and the timing control signal are changed to be selected by a changeover means 340 of the timing generating means 320. The timing control signal or the differentiated timing control signal is outputted by the timing generating means 320 in accordance with setting of the changeover means 340. The clock is controlled by a control means 310 in order to make the counter 321 output the timing signal synchronized with the rotation of the rotary body with a detecting output from the rotation detecting means.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a timing control device for performing an operation according to the rotation of a rotating body, such as a rotary head type digital audio tape recorder or a non-tracking type rotary head type electronic device. The present invention relates to a timing control device suitable for use in equipment.

[0002]

2. Description of the Related Art Generally, a rotary head type digital audio tape recorder (hereinafter, referred to as DAT: Digital).
It is called Audio Tapereorder. ) Or a non-tracking rotary head type electronic device (hereinafter referred to as N
Say T. In an electronic device having a rotary head such as), an operation timing is determined by generating a timing control signal synchronized with the rotary head in order to perform an operation according to the rotary head which is a rotating body.

For example, the above-mentioned DAT is one for a rotary drum.
A rotating head with a pair of magnetic heads attached at an angular interval of 80 ° rotates 50 times per second (= 50 Hz).
The digital audio data is recorded / reproduced at an inclination with respect to the running direction of the magnetic tape by rotating the magnetic tape. Generally, in the DAT, the drum rotation speed is 100/3 Hz, that is, 2000 rpm.

The main characteristic of the DAT is that it can record continuously for 2 hours in the vertical and horizontal directions.
Since a small cassette having a size of 3 × 54 mm and a thickness of 10.5 mm is used, the size and weight can be reduced. Furthermore, since the tilt recording is performed by the rotary head, it is possible to extend the recording time on the magnetic tape, reduce the size, and reduce the cost.

In such a DAT, phase servo is applied to the rotational phase of the rotary head in order to record / reproduce at a fixed timing. That is, in the DAT, a timing generator or the like generates a timing signal corresponding to the phase error signal of the rotary head from the rotary phase of the rotary head, and the operation of the recording / reproducing system is switched by this timing signal.

Thus, for example, when the DAT is applied to a small portable tape recorder, in consideration of the case where a disturbance such as vibration caused by carrying is taken into consideration, timing is generated even when the rotational phase of the rotary head is deviated by the disturbance. Since the timing signal from the device corresponds to the phase error signal, the rotational phase of the rotary head and the timing signal always maintain a synchronous relationship. Therefore, recording / reproducing can be performed at a constant timing in synchronization with the rotation of the rotary head.

However, the rotary head does not always rotate at a constant rotational speed, and not only the phase but also the speed fluctuates due to load fluctuations such as rolling. In particular, tape recorders can be made smaller and lighter, consume less power, or
In order to reduce the price, when performing one-motor control using only one motor of the rotary head that serves as the rotary drive source,
The capstan for driving the tape running is also driven to rotate by the same motor. Therefore, the rotation speed of the rotary head also fluctuates with the speed control of the capstan servo, and an error may occur when the rotation phase is locked.

Therefore, the applicant of the present application filed Japanese Patent Laid-Open No. 63-37.
In Japanese Patent No. 808, there is proposed a rotary head type electronic device capable of ensuring the accuracy of timing control not only for phase fluctuations of the rotary head but also for speed fluctuations.

That is, the rotary head type electronic device is characterized in that it has a rotation detecting means for detecting the rotation of the rotary head and a timing generating means for controlling the phase and speed by the detection output from the rotation detecting means. By controlling the phase and speed of the timing generating means in accordance with the phase information and speed information from the rotation detecting means, it is possible to ensure the accuracy of timing control even when the rotation of the rotary head changes.

Further, by correcting the target value of the phase difference of the timing generation reference phase with respect to the phase information from the rotation detecting means in accordance with the speed information from the rotation detecting means, the speed fluctuation of the rotary head can be prevented. Also ensures the accuracy of timing control.

For example, the rotary head type electronic device is provided with a timing generator for generating various timing signals, and the timing generator performs phase lock and phase lock based on phase information and speed information regarding the rotation of the rotary head. A velocity following servo is applied. In the rotary head type electronic, the target phase of the signal indicating the starting point of timing generation for one rotation of the rotary head is corrected, and the generation cycle of the timing signal in the timing generator is variable (hereinafter referred to as programmable). The timing control is performed according to the speed information.

For example, as shown in FIG. 5, the timing generator stores a time axis counter 31 for making one cycle of the rotary head a full bit, and a timing for storing data for generating various timing patterns. A pattern memory 32 and a programmable frequency divider 40 for controlling the clock of the time-axis counter 31 according to speed information are provided.

The timing generator may be, for example,
It is built in a one-chip microcomputer (hereinafter, referred to as a microcomputer), and a data bus 46 and a data buffer 47 are provided in advance in accordance with the DAT state, such as recording, reproduction, and stop, by the microcomputer. In addition, the address bus 48, the address buffer 49, and
Various timing pattern data is loaded into the timing pattern memory 32 via the selector 36.

On the other hand, the master clock CK _MS is frequency-divided by the programmable frequency divider 40 and is counted by the count clock CK _r.
Is supplied to the time axis counter 31, and the time axis counter 31 performs a counting operation based on the count clock CK _r .

Here, for example, the time axis counter 31
Overflow, the timing controller 34
The reset signal is supplied to the event counter 35 via the. This reset signal causes the event counter 35
Is reset.

The output "0" from the event counter 35 is supplied to the timing pattern memory 32 via the selector 36, so that all 32 words (= addresses [0] to [0] stored in the timing pattern memory 32. 31]), the word of the first word (= address [0]) is pointed to.

The time axis data (= 10 bits) in the word (= 16 bits) of the address [0] of the timing pattern memory 32 is latched as the input of the comparator 33, and the output in the word of the address [0] is output. The data (= 6 bits) is output via the timing output buffer 37. Each bit of this 6-bit output corresponds to each of the six types of timing output signals S _{TG0 to} S _TG5 .

The time axis data latched as the input of the comparator 33 is compared with the output from the time axis counter 31. When the output from the time-axis counter 31 performing the counting operation coincides with the time-axis data, the comparator 33 generates a coincidence output, and the coincidence output is supplied to the event counter 35 via the timing controller 34. As a result, the event counter 35 is incremented.

That is, the next time the event counter 35 is reset by the above-mentioned reset signal, the output from the event counter 35 changes from "0" to "1", and the second value of the timing pattern memory 32 is changed. Word (=
The word of the address [1]) is pointed to and this word data is read.

In general, the word of the timing pattern memory 32 pointed by the output from the incremented event counter 35 is read out, and the time axis data (= 10 bits) is latched as the input of the comparator 33. , Output data (= 6 bits) is output to the output port via the timing output buffer 37.

By repeating the above operation, the output for each time axis data stored in the timing pattern memory 32 for the timing output signals S _{TG0 to} S _TG5 can be obtained. Further, when the time axis counter 31 overflows by counting the count clock CK _r by 1024 corresponding to a full bit, the event counter 35 is reset and the first word of the timing pattern memory 32 is again read. The above operation is repeated from the word at (= address [0]).

[0022]

The overflow output from the time axis counter 31 is output from the timing output buffer 37 as an interrupt signal to the microcomputer. For example, in the case of generating the interrupt twice, as shown in FIG. 6, the timing output signals S _{TG 0 to} S _{TG 0 to} S
_{By using} one of the timing output signals S of _{TG5 as} an edge sensing signal for interruption, an interruption occurs at the rising edges S _u1 and S _u2 of the signal. Here, no interrupt occurs at the signal falling edges S _d1 and S _d2 .

Such an interrupt signal is for interrupting the microcomputer and activating a predetermined interrupt program. With this interrupt signal, the microcomputer performs, for example, a process of rewriting the stored contents of the timing pattern memory 32 each time the rotary head rotates.

However, as described above, when the timing output signal S is used as an edge-sensing signal, the output of the timing output signal S is directly connected to the microcomputer, and an interrupt is _generated at the signal falling edges S _d1 and S _d2. Is not generated, meaningless stop _Sd1 and _Sd2 are required on the way. That is, only the two events S _u1 and S _{u2 of} the four signal changes (hereinafter referred to as events) S _u1 , S _d1 , S _u2 and S _d2 were used.

As described above, since two events are required to generate one interrupt, a finite number of events are wasted. Further, since the number of events is proportional to the capacity of the timing pattern memory 32, the capacity of the timing pattern memory 32 needs to be doubled, so that the timing pattern memory 32 cannot be effectively used.

Therefore, the present invention has been made in view of the above-mentioned conventional circumstances, and has the following objects.

That is, an object of the present invention is to provide a timing control device which can effectively utilize the change of the signal when the timing control signal is used as the edge sensing signal.

[0028]

In order to solve the above-mentioned problems, a rotation detecting means for detecting the rotation of a rotating body, a clock of a counter for outputting a timing signal synchronized with the rotation of the rotating body, and the timing signal. Timing control means for outputting a timing control signal, and control means for controlling the clock so that the counter outputs a timing signal synchronized with the rotation of the rotating body by the detection output from the rotation detecting means. In the timing control device, the timing generating means includes a differentiating means for differentiating the timing control signal, and a switching means for selectively selecting the differential timing control signal output from the differentiating means and the timing control signal. , The timing control signal or the differential timing control depending on the setting of the switching means. And outputs the signal.

[0029]

In the timing control device according to the present invention, the rotation detecting means detects the rotation of the rotating body. The timing generation means generates a timing control signal by the clock of the counter that outputs a timing signal synchronized with the rotation of the rotating body and the timing signal. The differentiating means of the timing generating means differentiates the timing control signal.
The switching means of the timing generating means switches and selects the differential timing control signal output from the differentiating means and the timing control signal. The timing generating means outputs the timing control signal or the differential timing control signal according to the setting of the switching means. The control means controls the clock so that a timing signal synchronized with the rotation of the rotating body is output from the counter by the detection output from the rotation detecting means.

[0030]

An embodiment of the present invention will be described below with reference to the drawings.

The timing control device according to the present invention is, for example, a rotary head type digital audio tape recorder (DAT: Digital Audio Tapeper).
The DAT is applied to
As shown in FIG. 1, a rotary head 71 which is a rotary body, a rotation detecting means 72 for detecting phase information and speed information of the rotation of the rotary head 71, and a phase and a speed by a detection output from the rotation detecting means 72. And a controlled timing generating means 30.

The DAT controls a timing signal generating operation so that the timing generating means 30 generates a timing signal according to an operation mode such as recording / reproducing (hereinafter, referred to as a microcomputer). .) 100 and the timing generating means 30
Switching processing section 73 for switching the input / output of the recording / reproducing signal by the timing control signal generated by the input terminal 13, the input terminal 13 for inputting the analog audio signal to be recorded on the magnetic tape 3, and the input terminal 13 for inputting the analog audio signal. A recording processing section 74 for performing signal processing for recording on the analog audio signal generated by the timing generation means 30 according to the timing control signal, and the rotary head 7.
The reproduction processing unit 75 that performs signal processing for reproduction on the signal read from the magnetic tape 3 by the No. 1 according to the timing control signal generated by the timing generation unit 30.
And an output terminal 25 for outputting a reproduced audio signal that has been subjected to signal processing by the reproduction processing unit 75.

The rotary head 71 includes the rotary drum 1 and
The rotary drum 1 comprises a pair of magnetic heads 2A and 2B with an angular interval of 180 °.
A and 2B are attached. The magnetic heads 2A, 2
The angles of the magnetic gap B are different from each other. Such a rotary drum 1 is rotationally driven at, for example, 50 rotations (= 50 Hz) per second. Also,
A magnetic tape 3 is obliquely wound around the rotary drum 1 at a winding angle of 90 ° and is driven to run at a predetermined speed. Therefore, the magnetic heads 2A and 2B alternately scan the magnetic tape 3 to form inclined recording tracks on the magnetic tape 3.

The switching processing unit 73 is used for the magnetic head 2
Head changeover switch 11 for switching A and 2B alternately
A recording amplifier 18, a reproducing amplifier 19, and a recording / reproducing switch 12 for switching between input and output of a recording signal and a reproducing signal.
It has and. The switching operation control of each switch in the switching processing unit 73 is performed by the timing control signal generated by the timing generation unit 30.

The recording processing section 74 has a low-pass filter 14, an analog / digital converter (hereinafter referred to as an A / D converter) 15, a recording signal processing section 16, and a modulator 1.
7 and 7. The operation control of the A / D converter 15, the recording signal processing unit 16, and the modulator 17 is performed by a timing control signal generated by the timing generation means 30.

The reproduction processing section 75 includes an equalizer / PL.
L (Phase Locked Loop) circuit 20
, Demodulator 21, reproduction signal processing unit 22, digital /
Analog converter (hereinafter referred to as D / A converter) 23
And a low pass filter 24. The operation control in the equalizer / PLL circuit 20, the demodulator 21, the reproduction signal processing unit 22, and the D / A converter 23 is performed by a timing control signal generated by the timing generation means 30.

The rotation detecting means 72 is a drum motor 4 for rotationally driving the rotary head 71, and a frequency generator (hereinafter referred to as _FG) for generating a signal S _FG having a frequency corresponding to the rotation speed of the rotary head 71. 5), a speed servo circuit 6 for detecting the speed error signal E _S and speed information regarding the rotation of the rotary head 71 by the signal S _FG from the FG 5, and one pulse for each rotation of the rotary head 71. A pulse generator (hereinafter referred to as PG) 8 for generating a signal S _PG , and a phase servo circuit 9 for detecting a phase error signal E _P and phase information regarding the rotation of the rotary head 71 by the pulse signal S _PG from the _PG 8. When, an adder 7 for adding the phase error signal E _P detected by the speed rate error signal detected by the servo circuit 6 E _S and the phase servo 9 circuit, It supplies the addition output from the serial adder 7 to the drum motor 4 as a control signal the amplifier 10
It has and.

The FG 5 is provided on the rotary shaft of the drum motor 4. The pulse signal S _PG generated by PG8 is, for example, a signal generated at the timing when the magnetic head 2A of the rotary head 71 starts scanning the magnetic tape 3.

The timing generating means 30 generates various timing control signals so that the switching processing unit 73, the recording processing unit 74, the reproduction processing unit 75 and the like operate in synchronization with the rotation of the rotary head 71.

Here, the timing generation means 30 is supplied with the phase information from the phase servo circuit 9 and the speed information from the speed servo circuit 6. Then, the timing generation means 30 performs phase lock and speed following servo based on the phase information and the speed information regarding the rotation of the rotary head 71. At this time, the target value of the rotational phase of the rotary head 71 is when the rotational speed of the rotary head 71 is in a steady state, and when the rotational speed of the rotary head 71 changes, the phase target value (= time) shifts. In consideration of the above, by correcting the phase target value with the rotation speed,
The error due to it is eliminated.

The timing control signal generated by the timing generation means 30 is also used as an edge sensing signal such as an interrupt for the microcomputer 100.

The timing generating means 30 will be specifically described below.

That is, as shown in FIG. 2, the timing generator 30 selectively outputs the timing control signal or the timing control signal obtained by differentiating the timing control signal, and the rotation generator shown in FIG. A timing signal synchronized with the rotation of the rotary head 71 is detected by the detection output of the detecting means 72, and the time axis counter 3
Control means 310 for controlling the clock so as to be output from the control unit 21.

The timing generator 320 differentiates the clock of the time axis counter 321 which outputs a timing signal synchronized with the rotation of the rotary head 71 and the timing control signal generated by the timing signal, and the differentiator 330. A switching means 340 for switching and selecting the differential timing control signal output from the differentiating means 330 and the timing control signal is provided.

Further, the timing generating unit 320, the time base counter for outputting a timing signal synchronized with the rotation of the rotary head 71 by counting the count clock CK _T which is divided by a programmable divider 311 to be described later 321 and the time axis counter 321
Output and timing pattern memory 322 described later
A comparator 323 for comparing the output from a timing controller 324 which outputs a timing control signal by the timing signal and the count clock CK _T from the time base counter 321 counts the timing control signal from the timing controller 324 The event counter 325 and the above event counter 3
25, a selector 326 that generates a read address based on the output from 25, a timing pattern memory 322 that reads a timing pattern with the read address generated by the selector 326, and a timing pattern that outputs the timing pattern read from the timing pattern memory 322. A timing output buffer 327 for outputting signals S _{TG0 to} S _TG5 , an address bus 328, and an address buffer 329 are provided.

The control means 310 has a data bus 315.
, The data buffer 316, and the time axis counter 33
Programmable frequency divider 31 for controlling the clock of 0 according to the speed information supplied via the data bus 315.
1 and.

Further, the programmable frequency divider 311
Is supplied via a speed register 312 for bit-expanding variable (= programmable) frequency information for frequency division in which the speed information is processed by the microcomputer 100, an adder 313, and a terminal 341 according to the speed information. And a frequency dividing register 314 for dividing the master clock CK _MS . First, the timing pattern memory 322 is a normal static RAM (Random Access Mem).
For example, a 1-word (= 16-bit) data consisting of 6-bit output data and 10-bit time axis data is used as an area of 32 words (= 64 bytes).

In the timing pattern memory 322, the data bus 315 and the data buffer 316, and the address bus 328 and the address buffer 329 are previously stored in the timing pattern memory 322 in accordance with the DAT state, such as recording, reproducing, and stopping, from the microcomputer 100. , And 10-bit time axis data and 6-bit timing pattern data are set via the selector 326.

Here, the time axis data corresponds to the count value of the time axis counter 321, and the output data is output when the time indicated by the time axis counter 321, that is, the phase and position match the time axis data. Each bit becomes each timing output signal S _{TG0 to} S _TG5 . That is, the six types of timing patterns TP _{0 to} TP ₅ when the time from the time axis counter 321 becomes the time axis data are the above 6
It is stored in the timing pattern memory 322 as each bit of the bit output data.

In addition, the timing pattern memory 32
The capacity of 2 is proportional to the number of signal changes (hereinafter referred to as events) in the timing pattern data.

The programmable frequency divider 311 is the same as that shown in FIG.
The speed information detected by the speed servo circuit 6 shown in (3) is supplied to the speed register 312 via the data bus 315 as variable (= programmable) frequency information for frequency division processed by the microcomputer 100 or the like.

The speed information for variable frequency division from the speed register 312 is 8-bit two's complement display data (-1).
28 to +127), which is bit-extended as necessary and supplied to the adder 313.

The output from the adder 313 is returned to the adder 313 via the frequency dividing register 314. To the divisor register 314 is supplied with the master clock CK _MS via the terminal 341, by the frequency division ratio r is variably divides the master clock CK _MS in response to the speed information,
The count clock CK _r of the time axis counter 321 is generated. This frequency division ratio r is r = (N _SP +512) / 2048 when the variable frequency division speed information is N _SP, and 384/2048 to 639 with 512/2048 = 1/4 as the center. It can be changed in the range up to / 2048. Therefore, the clock of the time axis counter 321 is controlled by such variable frequency dividing information.

The time-axis counter 321 is a counter which has a full bit for one cycle of the rotary head 71, for example,
This is a 10-bit binary counter that counts the count clock CK _r output from the programmable frequency divider 311. Then, it is incremented each time it is triggered by the count clock CK _r . Further, the time axis counter 321 uses the master clock CK.
_{As long as MS} is continuously supplied to the programmable frequency divider 311, the binary count operation is continued, and 1024 of the count clock CK _r divided by the programmable frequency divider 311 constitutes one cycle. One cycle of this time axis counter 321 is the final timing output signal S
It becomes one cycle of the output pattern of _{TG0 to} S _TG5 .

Here, for example, the time axis counter 32
When 1 overflows, the overflow output is output from the timing output buffer 37 as an interrupt signal. That is, the microcomputer 1 _uses any timing output signal of the timing output signals S _{TG0 to} S _TG5 from the timing output buffer 37 as an edge sensing signal.
Used for interrupting 00.

Therefore, in this embodiment, the output from the timing output buffer 37 is not directly connected to the microcomputer 100, but the output from the timing output buffer 37 is supplied to the microcomputer 100 via the differentiating means 330 and the switching means 340.

Specifically, the differentiating means 330 will be described.
By differentiating the timing output signal for interruption output from the timing output buffer 37,
A differential timing signal having twice the number of events as the timing output signal is generated. Further, the system clock CK _S is supplied to the differentiating means 330.

That is, in the differentiating means 330, for example,
As shown in FIG. 3, the timing output signal S for interrupt is differentiated by the rising edge S _u0 and the falling edge S _u0.
Differentiated by _d0 . In this way, the signal change parts S _u0 , S
_The signal S _i differentiated by _d0 is changed four times, that is,
Rising S _iu1, S _iu2, and outputted to the switching means 340 as an interrupt signal S _i with a falling S _id1, S _id2. In other words, 2 of the timing output signal
Each event results in two interrupts.

Therefore, the switching means 340 is supplied with the differential timing signal S _i differentiated by the differentiating means 330 as described above and the timing signal S directly output from the timing output buffer 327. Become.

The switching means 340 switches and selects the differential timing signal S _i and the timing signal S and supplies them to the microcomputer 100 as an interrupt signal. The switching selection control of the switching means 340 is performed by the microcomputer 100, for example.

By supplying the interrupt signal to the microcomputer 100 in this way, a predetermined interrupt program is started in the microcomputer 100 based on the interrupt signal. For example, the contents stored in the timing pattern memory 327 each time the rotary head rotates. Is rewritten.

On the other hand, a reset signal is also supplied to the event counter 325 when the time axis counter 321 overflows. The reset signal resets the event counter 325 (clears "0"). The output (= “0”) from the event counter 325 is supplied to the timing pattern memory 322 via the selector 326, so that all 32 words (= address [0] to The first word (= in [31]) (=
The word of address [0]) will be pointed.

Time axis data (= 1 in the pointed first word (= word of address [0] = 16 bits))
0 bit) is latched as an input of the comparator 323. Also, the output data (= 6 in the first word)
6 bits through the timing output buffer 327.
The timing output signals S _{TG0 to} S _TG5 of various types are output.

The time axis data latched as the input of the comparator 323 is compared with the output from the time axis counter 321. Therefore, when the output from the time-axis counter 321 performing the counting operation coincides with the time-axis data, the comparator 323 generates a coincidence output and supplies the coincidence output to the event counter 325 via the timing controller 324. The event counter 325 will be incremented.

That is, at the next time when the event counter 325 is reset by the reset signal from the timing controller 324 as described above, the output from the event counter 325 changes from "0" to "1",
The word of the second word (= address [1]) of the timing pattern memory 322 is pointed to, and this word data is read.

In general, the word of the timing pattern memory 322 pointed by the output from the incremented event counter 325 is read, and the time axis data (= 10 bits) is latched as the input of the comparator 323. , Output data (= 6 bits) is output via the timing output buffer 327. Timing generating means 30 having the above configuration
Will be described.

The microcomputer 100 shown in FIG.
Depending on the state of T, in advance from the data bus 315 through the data buffer 316, and from the address bus 328 through the address buffer 329 and the selector 326,
The timing pattern data is loaded into the timing pattern memory 322.

On the other hand, the master clock CK _MS supplied to the input terminal 341 is divided by the programmable frequency divider 311 and becomes the count clock CK _{r, which} is the time axis counter 3
21.

The time axis counter 321 performs counting operation based on the count clock CK _r . The timing signal from the time axis counter 321 is supplied to the timing controller 324.

When the time axis counter 321 overflows, a reset signal is supplied to the event counter 325 via the timing controller 324. This reset signal causes the event counter 325
Are reset (= "0").

The overflow output from the time axis counter 321 is supplied to the differentiating means 330 via the timing output buffer 327.

The differentiating means 330 differentiates the timing signal output from the timing output buffer 327,
The differential timing signal is supplied to the switching means 340, and the timing signal output from the timing output buffer 327 is directly supplied to the switching means 340.

The switching means 340 is the microcomputer 100.
Based on the switching selection control of
A differential timing signal from 0 is selected, and the differential timing signal is supplied to the microcomputer 100 as an interrupt signal. The microcomputer 100 activates a predetermined interrupt program based on the interrupt signal from the switching means 340.

On the other hand, "0" output from the event counter 325 by the reset signal is supplied to the timing pattern memory 322 via the selector 326.

The output "0" from the event counter 325 points to the first word of all 32 words stored in the timing pattern memory 322.

The time base data in the first word of the timing pattern memory 322 is latched as the input of the comparator 323. The output data in the first word is supplied to the differentiating means 330 via the timing output buffer 327. The differentiating means 330
Differentiates the timing signal output from the timing output buffer 327, and supplies the differentiated differentiated timing signal and the timing signal to the switching means 340.

The switching means 340 is the microcomputer 100.
On the basis of the switching selection control of, for example, the timing signal output from the timing output buffer 327 is selected, and the timing signal, that is, the output data in the first word is selected from six types of timing output signals S _{TG0 to} S _TG5. Output as.

The time axis data latched as the input of the comparator 323 is compared with the output from the time axis counter 321 in the comparator 323. And the time axis counter 3 that is counting
When the output from 21 coincides with the time axis data, a coincidence output is generated.

The coincidence output generated from the comparator 323 is supplied to the event counter 352 via the timing controller 324.

The event counter 325 is incremented by the coincidence output from the comparator 323.

Therefore, the output from the event counter 325 changes from "0" to "1", and the second word of the timing pattern memory 322 is pointed. And
The time base data in the second word of the timing pattern memory 322 is latched as the input of the comparator 323, as in the case where the first word is pointed. The timing signal output from the timing output buffer 327 is used as the differentiating means 330 and the switching means 3.
Through 40, the output data in the second word is output as six types of timing output signals S _{TG0 to} S _TG5 .

By repeating the above operation, the output for each time axis data stored in the timing pattern memory 327 for the timing output output signals S _{TG0 to} S _TG5 can be obtained. When the time axis counter 321 overflows by counting the count clock CK _r by 1024 corresponding to a full bit and the time axis counter 321 overflows, the frequency dividing means 330 and the event counter 352 are respectively reset, and the timing pattern memory 327 again.
The above operation is repeated from the first word of, that is, the word of address [0].

As described above, when the timing signal is used as an edge sensing signal to interrupt the microcomputer 100, the output from the timing output buffer 37 is not directly supplied to the microcomputer 100 as an interrupt signal, but the differentiating means. Since the differential timing signal differentiated by 330 is switched and selected by the switching means 340 and the differential timing signal is supplied to the microcomputer 100 as an interrupt signal, the number of events of the timing signal can be halved. Therefore, the event can be effectively used and the timing pattern memory 322 can be effectively used.

Here, an example of the timing pattern output from the timing generating means 30 as described above is shown in FIG.
Shown in The signal a in the figure is a pulse signal S _PG generated for each rotation of the rotary head 71, and the signal b is the magnetic head 2
A high frequency signal (hereinafter referred to as an RF signal) S _RF recorded and reproduced by the A and 2B heads, a signal c is an example of the timing output signal S _TG generated by the timing generation means 30, and a signal d is a timing generator. , Which is the phase that is the starting point of the timing generation, that is, the signal TG indicating the target phase,
The signal e shows an example of the timing pattern TG generated by the timing generation means 30.

As described above, the rotary head 71 has 50
Hz, that is, one rotation cycle T _R is rotationally driven at 20 msec, and the time from the pulse signal S _PG indicating the rotation reference position of the rotary head 71 to the timing generation start phase signal, that is, the target phase signal TG is T _{Let d} . This time T _d corresponds to the target phase value θ _d for one rotation angle 2π with respect to the rotation cycle T _R of the rotary head 71.

As shown in FIG. 4, in general, the rotary head type DAT is an intermittent recording / reproducing system, and the rotary head 71 is used.
If the head has two systems, as shown in FIG.
For each rotation T _R , a recording signal is flown or a reproduction signal is amplified in a section where the magnetic heads 2A and 2B are in contact with the magnetic tape 3. The timing output signal S _TG shown as the signal c in FIG. 4 is, for example, the power-on timing of the reproduction amplifier. That is, the reproducing amplifier is powered on only in the section where the magnetic heads 2A and 2B are in contact with the magnetic tape 3. In addition to the above, by outputting the timing signal as described above, the timing of the recording current section,
Accurate timing control is performed in synchronization with the rotation phase of the rotary head, such as signal processing in a section where the magnetic heads 2A and 2B are not in contact with the magnetic tape 3 and communication with the outside.

The operation of the DAT shown in FIG. 1 having the timing generating means 30 will be described.

First, the rotary drum 1 is rotationally driven by the drum motor 4. The FG 5 provided on the rotary shaft of the drum motor 4 generates a signal S _FG having a frequency corresponding to the rotation speed of the rotary drum 1 and supplies it to the speed servo circuit 6.

The speed servo circuit 6 obtains the speed error signal E _S from the signal S _FG from the _FG 5 and supplies the speed error signal E _S to the adder 7.

On the other hand, the pulse oscillator 8 generates one pulse signal S _PG every time the rotary drum 1 makes one rotation. The pulse signal S _PG generated by the pulse oscillator 8 is supplied to the phase servo circuit 9.

The phase servo circuit 9 receives the phase error signal E _P from the pulse signal S _PG generated by the pulse oscillator 8.
And phase information relating to the rotation of the rotary drum 1, and supplies the phase error signal E _P to the adder 7,
The phase information is supplied to the timing generating means 30.

In the adder 7, the speed servo circuit 6 is used.
A speed error signal E _S from a phase error signal E _P from the phase servo circuit 9 are added. Then, the added output is supplied as a control signal to the drum motor 4 via the amplifier 10, whereby the drum motor 4
Is 50 Hz, and the pulse signal S _PG is the synchronization signal V _sy.
Rotational drive is controlled so as to synchronize with _nc .

At the same time that the drum motor 4 is rotationally driven and controlled as described above, the microcomputer 100 switches the timing generating means 30 to the switching means 33 according to the DAT state.
The selection switching control of the timing signal in 1 is performed.

The timing generating means 30 generates various timing signals in synchronization with one cycle or two cycles of the rotary drum 1 according to the phase and speed of the rotary drum 1.

Therefore, according to the timing signal generated by the timing generating means 30, the magnetic heads 2A, 2B.
Are alternately switched by the head changeover switch 11. As a result, at the time of recording, the analog audio signal from the input terminal 13 is fed to the low-pass filter (hereinafter, L
It is called PF. ) 14 to an analog / digital (hereinafter referred to as A / D) converter 15. A above
The / D converter 15 converts the analog audio signal into a digital audio signal and supplies it to the recording signal processing circuit 16. The recording signal processing circuit 16 converts the digital audio signal from the A / D converter 15 into error detection processing,
Code addition processing for error correction, interleaving, time base compression processing, and the like are performed, and the signal subjected to each of these processing is supplied to the modulation circuit 17. The modulation circuit 17 modulates the signal from the recording signal processing circuit 16 into a signal suitable for recording and outputs it as a recording signal. The recording signal output from the modulation circuit 17 is transmitted through the recording amplifier 18 and the terminal r of the recording / reproducing switch 12 to the head changeover switch 11
Are supplied to the magnetic heads 2A and 2B alternately by the head changeover switch 11.

During reproduction, the magnetic head 2A,
The reproduction signal read from the magnetic tape 3 by 2B is taken out to the terminal p of the recording / reproducing switch 12 through the rotary transformer or the like. The reproduction signal taken out from the terminal p is supplied to the reproduction amplifier 19 and the equalizer / PLL.
It is supplied to the demodulation circuit 21 via the (Phase Locked Loop) circuit 20. The demodulation circuit 21 is
The reproduction signal from the equalizer / PLL circuit 20 is demodulated and supplied to the reproduction signal processing circuit 22. The reproduction signal processing circuit 22 performs time axis expansion processing, deinterleaving, error correction processing, error correction processing, etc. on the reproduction signal from the demodulation circuit 21, and digital / analog the reproduction signal subjected to each of these processing. (Hereinafter referred to as D / A) Converter 2
Supply 3 The D / A converter 23 converts the reproduction signal from the reproduction signal processing circuit 22 into an analog signal. Therefore, the reproduced audio signal from the D / A converter 23 is taken out from the output terminal 25 via the LPF 24.

When an interrupt signal is supplied from the timing generating means 30 to the microcomputer 100, the microcomputer 100 activates a predetermined interrupt process.

The timing control device according to the present invention is
The present invention is not limited to the above-mentioned embodiment, but N
A device such as a T or VTR (video tape recorder) having a rotating body such as a rotating head can be applied.

[0099]

According to the timing control device of the present invention,
The rotation detecting means detects the rotation of the rotating body. The timing generation means generates a timing control signal by the clock of the counter that outputs a timing signal synchronized with the rotation of the rotating body and the timing signal. The differentiating means of the timing generating means differentiates the timing control signal. The switching means of the timing generating means switches and selects the differential timing control signal output from the differentiating means and the timing control signal. The timing generating means outputs the timing control signal or the differential timing control signal according to the setting of the switching means.
The control means controls the clock so that a timing signal synchronized with the rotation of the rotating body is output from the counter by the detection output from the rotation detecting means. As a result, when the timing control signal is used as an edge sensing signal for an interrupt or the like, it is possible to double the number of signal change points by differentiating the timing control signal. It can be halved. Therefore, when the timing control signal is used as the edge sensing signal, the change in the signal can be effectively used.

[Brief description of drawings]

FIG. 1 is a diagram showing a configuration of a digital audio tape recorder (DAT) to which a timing control device according to the present invention is applied.

FIG. 2 is a diagram showing a configuration of the timing control device.

FIG. 3 is a diagram for explaining a differentiation process by a differentiation means of the timing control device.

FIG. 4 is a timing chart for explaining the operation of the timing control device.

FIG. 5 is a diagram showing a configuration of a conventional timing control device.

FIG. 6 is a diagram for explaining a case where a conventional timing control signal is used as an edge sensing signal.

[Explanation of symbols]

 310 Control means 311 Programmable frequency divider 312 Speed register 313 Adder 314 Frequency division register 315 Data bus 316 Data buffer 320 Timing generator 320 321 Time axis counter 322 Timing pattern memory 323 Comparator 324 Timing controller 325 Event counter 326 Selector 327 Timing output Buffer 328 Address bus 329 Address buffer 330 Differentiating means 340 Switching means 341 Terminal

Claims (1)

[Claims] 1. A rotation detecting means for detecting rotation of a rotating body, a counter clock for outputting a timing signal synchronized with the rotation of the rotating body, and a timing generating means for outputting a timing control signal according to the timing signal, A timing control device comprising: a control unit that controls the clock so that a timing signal synchronized with the rotation of the rotating body is output from the counter by a detection output from the rotation detection unit, wherein the timing generation unit includes: The timing control signal is provided with differentiating means for differentiating the timing control signal, and switching means for selectively selecting the differential timing control signal output from the differentiating means and the timing control signal, and the timing control signal according to the setting of the switching means. Or a timing control signal that outputs a differential timing control signal Control device.