JPH0812543B2 - Character charactor compression method - Google Patents

Description

Description: TECHNICAL FIELD OF THE INVENTION The present invention relates to a compression method of character characters in a character generator used in an information processing apparatus such as a Japanese word processor or an electronic computer having a Japanese processing function.

[Prior art and its problems] An information processing device such as a Japanese word processor or an electronic computer having a Japanese processing function is provided with a character generator for generating a character pattern of display characters or print characters. I have. This character generator is generally composed of ROM, but in the past it was JIS
Since the character pattern corresponding to each character defined in the above is stored, the capacity of the ROM becomes very large.
For example, if one character is composed of “32 × 32 dots”, 1
"32 x 32 = 1024 bits" in characters, about 1 Mbit required,
Storing 3000 characters requires 32 × 32 × 3000 ≒ 3M bits. As described above, in the conventional character generation method, the ROM capacity of the character generator becomes very large,
This becomes a problem when miniaturization is performed, and the cost becomes very high.

[Object of the Invention] The present invention has been made in view of the above points, and can significantly reduce the memory (ROM) capacity of a character generator, which is advantageous for downsizing of an information processing device and reduces cost. It is an object of the present invention to provide a compression method of a character character to be obtained.

SUMMARY OF THE INVENTION The present invention stores a common character in a character memory in which character forms such as Chinese characters are separated according to radicals, and character forms including the radicals are separated into common parts, and a combination of a plurality of common characters is stored. In a character generator that constitutes a font character, when storing a common character in a character memory, while compressing lines that are regularly formed,
The size of the common character is variably set according to the compression processing, and a flag indicating the size is stored in the character memory in association with each common character.

Further, the present invention, when compressing the common character,
It is said that the size of the common character is defined only in one direction, vertical or horizontal, and the other is variably set, and after compression, the common character is rotated so that the direction in which the size is defined is aligned in a certain direction. There is.

[Embodiment of the Invention] An embodiment of the present invention will be described below with reference to the drawings.
First, the overall circuit configuration will be described with reference to FIG.
In FIG. 1, reference numeral 11 is an oscillator circuit for generating a reference timing signal. 12 is a program counter, ROM
The address of the program ROM 14 is specified by referring to the storage address of the address stack register 13 and the operating conditions of the circuit. The program ROM 14 stores various control instructions, operates in accordance with the address designation from the program counter 12, outputs the control instructions to the instruction decoder 15 via the bus line BL1, and outputs the first RAM 16
Is output to the address counter 17 via the bus line BL2. The program ROM 14 stores its own address via the bus line BL3 in the program counter 1
2 and simultaneously outputs the address for the second RAM 18 to the address counter 19 and further outputs other data via the bus line BL3, the AND circuit 21, the comparison circuit 22, and the arithmetic circuit 2.
3, output to the decoder 24. The first RAM 16 and the second RAM 18
Has a capacity of, for example, 40 × 40 bits, and FIG.
It is configured as shown in (b). That is, the first RAM
In FIG. 16, as shown in FIG. 2A, 38 × 38 bits are a character area 16a, and the upper 2 × 40 bits and the left 2 × 40 bits are a flag area 16b. Also,
In the second RAM 18, 32 × 32 bits are a reproduction area 18a and other areas are storage areas 18b. And the above first
The data read from the RAM 16 and the second RAM 18 are output to the bus line BL4 via the AND circuits 25 and 26, respectively, and the output of the AND circuit 21 is output to the bus line BL4. The data output to the bus line BL4 is
The data is input to the RAM 16, the second RAM 18, the comparison circuit 22, and the arithmetic circuit 23, and is also input to an address counter 27, a register 28, and stack registers 29a to 29d having an 8-bit configuration. The address counter 27 specifies the address of the character memory, that is, the character ROM 31, by the count value. The character ROM 31 includes a common character portion 31a and a common character instruction memory portion 31b as shown in FIG.
As will be described in detail later, character data that has been subjected to processing such as separation, correction, compression, and the like for each character is stored. And
The character data read from the character ROM 31 is output to the bus line BL4 via the AND circuit 32,
The data held in the register 28 is output to the bus line BL4 via the AND circuit 33. Further, the comparison output of the comparison circuit 22 is sent to the program counter 12 via the AND circuit 34. Thus, the instruction decoder 15
The control command from the program ROM 14 is decoded to set signals Set and “+1” signals to the address counters 17, 19 and 27 respectively, and write signals W to the first RAM 16 and the second RAM 18,
A write signal W and a read signal R are applied to the register 28.
In addition, the instruction decoder 15 outputs an operation command to the operation circuit 23, a clock pulse to the decoder 24, and an AND circuit 2
1, 25, 26, 32, 33 and 34 are given gate control signals. The decoder 24 decodes the data from the program ROM 14 to select one of the stack registers 29a to 29d,
A clock pulse from the instruction decoder 15 is given. Stack registers 29a to 29d are connected to bus line BL4.
The data sent via the decoder 24 is read in synchronization with the clock pulse from the decoder 24 and is output to the display unit (not shown) as 32-bit character data.

The present invention separates a character such as a kanji into radicals, separates a character (including radicals) into a common part, and separates the character of the separated radical and the common part into characters RO.
What is stored in M31.Hereafter, separation of the character common part when storing character data in the character ROM31,
Processing such as correction and compression will be described. Figure 4 shows
This is an example of the case where the radicals “tree”, “blunt”, and “book” are separated into a common part. In FIG. 4 (a), 32 ×
The 32-bit "tree" character is divided into two parts, C1 and C2.
Is a common character. In Fig. 4 (b), "He"
Is divided into upper and lower parts, and the upper character is C3, but the lower character is commonly used as the character C2 in the above-mentioned "tree" character. In FIG. 4 (c), the character "book" is divided into upper and lower parts and the lower character is C4, but the upper character is commonly used as the C1 character in the above "tree" character. As described above, the common part of each character is separated.

After the common part of each character is separated to create a common character as described above, the character is corrected and compressed as shown in FIG. Fonts have shapes at the beginning and end of the line according to certain rules. According to the present invention, the form according to this rule is not stored in the storage section of the common character, but is corrected when the character occurs. Then, when a character in the same state continues in the vertical and horizontal rows of the font character, the same character is omitted and compressed. FIG. 5 (a) shows a corrected character C21 obtained by correcting vertical and horizontal lines for the common character C1.
And then compress it vertically and horizontally to 16 × 16 bits and compress it.
C31. In this case, the compressed character C31 is 14 ×
The 14 bits are the character area 41, the upper 2 bits are the vertical flag area VF, and the left 2 bits are the horizontal flag area HF.
The abbreviation number flag is set in correspondence with the compressed portion, and the position and number of compression are indicated. Then, when a character is generated, a correct shape is reproduced according to the number of flags. In FIG. 5B, the common area C2 is corrected into a corrected character C22, and thereafter, the character bits and the bit intervals are compressed in two stages to obtain compressed characters C32 and C42. FIG. 5C shows an example of correction and compression of the common character C3.
The same correction and compression as in FIG. FIG. 5D shows a corrected character C2 obtained by correcting the common character C4.
After setting it to 4, it rotates 90 ° clockwise during compression to form a 16 × 20-bit compressed character C34. The shape of the common character after the font separation becomes various shapes, but if the size of the common character is defined, the basic size of the common character becomes large, so the size of the common character is variably set in both the vertical and horizontal directions. By providing a flag indicating the size of the character in the character, the efficiency of memory use can be improved. Further, even if only one direction (vertical or horizontal) of the common character is defined and the length of the other character can be variably set, the memory use efficiency can be improved. However, when the size of the common character is defined in one of the vertical and horizontal directions, there are characters that are long in the vertical or horizontal direction depending on the compression state, and the entire character (all common characters) is stored. In addition, the use efficiency of the memory space is deteriorated. In this case, the common space long in the other direction is rotated by 90 ° (vertical / horizontal exchange) so that the specified direction is aligned with the fixed direction, so that the memory space use efficiency can be increased.
At this time, the rotated character can be discriminated by a method in the common character or a method in the character configuration memory for forming a character by combining the common characters. In this embodiment, a case is shown in which the configuration memory has the determination of the rotating character.

FIG. 6 shows an example of a correction character, in which correction is performed on a vertical line, a horizontal line, and a corner. Vertical line correction
It is performed at the head and the end. One bit protruding laterally is omitted at the head as shown by a black circle, and one bit is added so that the left and right bits are symmetrical at the end. In the horizontal line, the "stop" portion is omitted, and when the horizontal line of the "stop" portion is 5 bits or more, 3 corrections are performed. When the horizontal line is 4 bits or the interval is 2 bits, 2 corrections are performed. One correction is performed. At the corner, one bit projecting at the head is omitted, and at the end, a one-bit lacking part is added.

FIG. 7 shows an example of vertical and horizontal compression, in which the hatched portion is the compressed portion. FIG. 8 shows an example of diagonal left and right diagonal compression (only vertical diagonal), and the direction of the arrow indicates the compression direction. FIG. 9 shows the radical "A" in the double compression example. When reproducing the character "A", vertical and horizontal reproduction is performed. When reproducing the character "evil", only the horizontal is reproduced. Form letters. In many font separations, only the vertical and horizontal sizes of the same character are different, and these are not possessed by each common character, and the efficiency can be improved by double compression.

FIG. 10 shows an example of centering compression. Even if the same frame (32 x 32 dots) is set, the size of the character differs depending on the character as shown in Fig. 10, and there are some fonts in which there is a space in the frame. The common characters in these fonts are compressed on one side (column rows without dots are omitted) and are automatically centered during reproduction.

Next, the details of the common character compression processing will be described. As shown in FIG. 11, the compressed character includes a 2-bit vertical flag area VF above the character area 41, as shown in FIG.
A 2-bit horizontal flag area HF is provided on the left side. Then, in the vertical flag area VF, V11, V12, ...
V1n,... Bits and V21, V22,... V2n,... Bits are set in the second column, and H11, H12,.
H1n, ... Bits, and H21, H22, ... H2n, ... Bits are set in the second column. Also, vertical flag area VF and horizontal flag area HF
Are provided with 4-bit flags of F1, F2, F3, and F4. The F4 flag indicates the number of omitted bits (r) by the combination of the vertical flag and the horizontal flag as shown in FIG. 12 (a), and the F3 flag indicates “0” as shown in FIG. 12 (b). Vertical and horizontal compression, "1" indicates diagonal compression. Also, the F1 and F2 flags indicate the number of vertically long bits by the combination as shown in FIG. 12 (c).

Thus, the 16-bit common character designation data B0 to B15 is stored in the common character designation memory 31b of the character ROM 31 as shown in FIG. The instruction data includes the address of the common character part 31a in the B0 to B10 bits (when the type of the common character is 2000), the rotation flag in the B11 bit, the double flag in the B12 bit, and the B13 to B15
The common character number / position flag is written in the bit.
The relationship between the B13 to B15 bits and the number of common characters (first in the common character instruction memory unit 31b) is shown in FIG.
FIG. 15 shows the contents of the position flag for bits B1 to B15 (from the second character onward in the common character instruction memory unit 31b). The relationship between the B11 bit and the flags F1 and F2 and the corresponding types is shown in FIGS. 16 (a) and 16 (b). Further, FIG. 17 shows the relationship between the B11 bit and the F1 and F2 flags and the numbers of x and y bits of the compressed character.

Next, the operation of the above embodiment will be described with reference to a flowchart. First, the overall schematic operation of reproducing characters will be described with reference to FIG. When reproducing characters, the program ROM 14 first clears the second RAM 18 as shown in step S1. Next, in step S2, the character ROM3
The contents of the common character instruction memory unit 31b from 1 to the second RAM 18
Read to. Assuming that, for example, the character "He" is to be reproduced, the address data is set in the address counter 27, and the data for "He" is read from the common character instruction memory unit 31b into the second RAM 18 as shown in FIG. put out.
Next, in step S3, after the first RAM 16 is cleared, the process proceeds to step S4, where the common character relating to “H” in the common character portion 31a is read out according to the common character instruction data read into the second RAM 18 as shown in FIG. 19 (b). 1R
Read to AM16. Then, as shown in step S5, the size of the common character is checked from the flag data in the vertical flag area VF and the horizontal flag area HF. Next, in step S6, the F3 flag is read out to the comparison circuit 22 to determine whether or not it is "0". If "0", the process proceeds to step S7, where it is stored in the first RAM 16 as shown in FIG. 19 (c). The horizontal compression / reproduction processing is executed for the existing common character according to the horizontal flag. If the F3 flag is not "0", the process proceeds to step S8 to execute the oblique compression reproduction process according to the vertical flag and the horizontal flag. When the processing of the above step S7 or step S8 is completed, the process proceeds to step S9, where the B12 bit (double flag) of the common character instruction data stored in the second RAM 18 is read to the comparison circuit 22 and whether or not it is "1". If it is "1", the process proceeds to step S10 to execute the vertical compression reproduction process according to the vertical flag as shown in FIG. 19 (d). When the processing in step S10 is completed, or when step S10
If it is determined in step 9 that the B12 bit is not “1”, the process of reproducing the corrected character shown in step S11 is performed. Thereafter, the process proceeds to step S12, and the vertical flag and the horizontal flag are removed from the common character of the first RAM 16 as shown in FIG. 19 (e). Next, in step S13a, the common character in the first RAM 16 is written into the second RAM 18 as shown in FIG. 19 (f) by using bits B13 to B15 (common character number / position flag) of the common character instruction data. Then, in step S14, the common character in the second RAM 18 is subjected to centering processing as shown in FIG. 19 (g), after which, in step S15, the common character is read into the stack registers 29a to 29d, and the stack register 29a to 29d. The data is sequentially output from the 29d as 32-bit character data to the display unit.

Next, details of main steps in the flowchart of FIG. 18 will be described. FIG. 20 shows details of step S4. First, in step S41, the second
Common character address (B0 to B1) stored in RAM18
Check the contents of the common character portion 31a specified in (0) (the first line of the specified address). Then, step S42
As shown in (1), the type of the common character is determined by checking the upper two bits (F1, F2) and the rotation flag of the B11 bit. For example, the common character instruction data is "0110010001 110100"
, The common character address of bits B0 to B10 is "011
If the common character part 31a is addressed by "0010001" and the data in the first line is, for example, "10011000", the upper two bits (F1, F2) and the rotation flag of B11 indicate "B11, F1, F2". = 110 ". When B11, F1 and F2 are “110”, the type of the common character is determined to be D type from the relationship of FIG. 16 (a). Then, as shown in step S43 of FIG. 20, the contents of the designated common character portion 31a are written into the first RAM 16 in order from the upper left to the lower in accordance with the type (D type in this example) by 8 lines.

After that, the process of step S5 shown in FIG. 21 is executed. First, in step S51, the vertically variable flag F is set.
The size (x, y) of the common character is determined from the relationship shown in FIG. 17 based on 1, F2 and the rotation flag B11. For example, B11 =
When 0, F1 = 1, and F2 = 0, the size of the common character is (x, y) = (16, 20). Next, in step S52, the vertical flag area VF of the common character and the double length flag F4 stored in the first RAM 16 are added to the omitted bit number from the relationship shown in FIG. The increase amount Δx of Then, in step S53,
The calculation circuit 23 performs the calculation of "x + Δx-2" to obtain a new x after reproduction. For example, if the width increase Δx is
If it is 12 bits, the new x is "x = 16 + 12-2
= 26 ". Subsequently, in step S54, by using the horizontal flag area HF and the double-length flag F4, the number of omitted bits is added from the relationship shown in FIG. Then, in step S55, “y +
.DELTA.y-2 "is calculated by the arithmetic circuit 23 to obtain a new y after reproduction. For example, if the increase amount .DELTA.y of the vertical width is 4 bits, the new y is "y = 20 + 4-2 = 22".
Becomes Thereafter, the process proceeds to the horizontal compression reproduction step S7 via the above-described determination step S6.

The above step S7 is composed of steps S71 to S79 as shown in detail in FIG. 22, and in steps S71 to S75, a row in which horizontal compression reproduction is performed is searched, and the end of the process is determined.In steps S76 to S79, horizontal compression is performed. Playing. Then, first, in step S71, "3" is set as the value 1 indicating the column position of the common character. Next, the process proceeds to step S72, in which the vertical flags V1 1-2, V2 l in the first column of the first RAM 16 are set.
-2. In this case, V11 and V21 are read. Then, as shown in step S73, it is determined whether or not “V1 l−2, V2 l−2 = 0,0”. If “0,0”, the process proceeds to step S74 and the value of l is “+1”. To do. Thereafter, it is determined whether or not the value of l has reached "35" in step S75, that is, whether or not the last row of the character area 41 has been passed. If l has not reached "35", the process proceeds to step S72. Return. Hereinafter, the same processing is repeated, and when the value of 1 is “6” and “1” of the vertical flag V24 is detected as shown in FIG. 23 (a), the determination result of step S73 is NO, and Proceeding to S76, the reproduction amount r is obtained from the relationship shown in FIG. 12A using the double-length flag F4 and the vertical flag in the first column. For example, as shown in FIG. 23 (a), when 1 = 6, V1n = 0, V2n = 1, and F4 = 0, r =
It becomes 2. Then, in step S77, first, the first RA
The data in the 33rd column of M16 is written in the 34th column, the data in the mth column is written in the m + 1th column, and the 1st column is written in the l + 1th column. Next, in step S78, the value of l is set to “+”.
After "1" and the reproduction amount r is "-1", the process proceeds to step S79 to determine whether the reproduction amount r is "0". If it is not "0", the process returns to step S77. For example, when reproducing the D portion in the sixth column of FIG. 23 (a), the F portion is in the ninth column and the E portion is in the eighth column as shown in FIG. The eye and the D part are written in the seventh column. In this case, the vertical flag is also written. Then, by the process of step S78,
"L = 7, r = 1". If "r = 1", the process returns to step S77 via step B79 and the same processing as described above is performed. As a result, the common character, FIG. 23 (b).
Is reproduced from the state shown in FIG.
8, r = 0 ”. When the reproduction amount r becomes “0”, the reproduction processing of the D section is completed, and the process from step S79 to step S72 is completed.
And the next column to be subjected to horizontal compression reproduction is searched from the first column, in this case, the eighth column. Then, by repeating the above operation, all the horizontal compression reproduction for the column in which the vertical flag is set is completed, and when the value of l reaches "35", the process proceeds to the next step S8 to perform the diagonal compression reproduction processing.

In the processing of the oblique compression reproduction, as shown in detail in FIG. 24 (a), a column to be reproduced is searched in steps S81 to S85, and a portion to be reproduced is searched in step S86 and subsequent steps. First, in step S81, the value of l is set to “3”.
After that, in step S82, the vertical flags V1 1-2, V2 1-2 in the first column of the first RAM 16, in this case V1
1. Read V21. Then, as shown in step S83, "V
It is determined whether or not 1 1−2, V2 1−2 = 0,0 ”. If“ 0,0 ”, the process proceeds to step S84 and the value of 1 is incremented by“ +1 ”. Thereafter, in step S85, it is determined whether or not the value of l has reached "35", that is, whether or not the last line of the character area 41 has been passed, and if l has not reached "35", the process proceeds to step S85.
Return to S82. Hereinafter, the same processing is repeated, for example, when the value of l is “6” as shown in FIG.
Is detected, the determination result of step S83 becomes NO,
Proceeding to step S86, "i = 1, m (1) = 3" is set. Next, in step S87, the 1st row m of the first RAM 16
(I) The value (Z) in the row is read, and it is determined in step S88 whether or not “Z = 0”. If “Z = 0”, the process proceeds to step S89, where the value of m (i) is “+”.
In step S89, it is determined whether or not “m (i) = 35” is reached. If “m (i) = 35” is not reached, the process returns to step S87. Then, in this step S87, the first RAM
The value (Z) in the 16th l column, m (i) row is read and checked, and if not “Z = 0”, the flow advances to step S811 to m
After "+1" is added to the value of (i), it is input to n (i). Then, the process proceeds to step S812, where the value (Z) of the l-th column, n (i) -th row of the first RAM 16 is read out, and “Z = 0” in step S813.
It is determined whether or not. If not “Z = 0”, step S814
Then, the value of n (i) is incremented by "+1" and the process returns to step S812. If it is determined in step S813 that "Z = 0", the flow advances to step S815 to set the value of n (i) to "-1", and then to step S816 to set the value of i to "+1". Further, in step S817, n (i-1)
After the value of is incremented by "+1", the process returns to step S87. Now the 25th
As shown in the figure, if attention is paid to the 6th column (l = 6), m (i) and n (i) are the lines starting with "1" (starting line for oblique compression reproduction) and "1". This shows the end line (end line of diagonal compression reproduction). Thereafter, the same processing is repeated, and when it is determined in step S810 that "m (i) = 35", the processing in step S818 and subsequent steps shown in FIG. 24 (b) is executed.

First, after setting the value of “j” to “1” in step S818, the process proceeds to step S819, and the point on the m (j), n (j) th line of the first RAM 16 as shown in FIG. A point around
That is, check the points. However, when the above point is in the flag areas VF and HF, it is set to “0”. Then, in step S820, the reproduction direction α (j) is determined, and then, in step S821, the value of “j” is incremented by “+1”. Thereafter, the process proceeds to step S822, where it is determined whether “i” has become equal to “j”. If not, the process returns to step S819. Hereinafter, the same operation is repeated until “i = j”, and the reproduction direction α (j) is sequentially determined. Direction of this playback α (j)
Is determined as shown in FIGS. 26 (a) to (d). That is, as shown in FIG.
B, C, as shown in FIG. 26 (b), decide D, E, F with
Further, as shown in FIG. 26 (c), α (j) is judged by the combination of A, B, C and D, E, F. In this case, the value of α (j) is “0,1,
The relationship between “2” and the direction is set as shown in FIG. 26 (d).

If it is determined in step S822 that "i = j", the flow advances to step S823 to perform horizontal compression reproduction of the first column. This lateral compression reproduction is performed in the same manner as in step S7 described above, as shown in FIG. In addition,
In FIG. 27 (a), the area A is a range generated by the reproduction, and the area B is a range moved by the reproduction. Next, the process proceeds to step S824 to set the value of “j” to “1”, and then determines in step S825 whether “α (j) = 0”. If “α (j) = 0” is not satisfied, step
Proceeding to S826, the range in which the position changes due to the oblique reproduction, that is, the connected range is divided into the A area and the B area for confirmation. Hereinafter, the processing after step S827 in FIG. 24 (c) is executed. If it is determined in step S825 that "α (j) = 0", the process proceeds to step S839 in FIG. 24 (c).

Thus, in step S827 of FIG. 24 (c),
For example, as shown in FIG. 27 (b), the A area is in the l1 to l2 columns (l1 <l2), and the B area is in the l3 to l4 columns (l3 <l2), if any.
l4). Next, in step S828, “α (j) =
It is determined whether or not “1”, and if “α (j) = 1” is not satisfied, the flow advances to step S829 to perform reproduction in the case of “α (j) = 2”. If “α (j) = 1”, the process proceeds from step S828 to step S830 to set the value of “e” to “1”, and then at step S831, as shown in FIG.
Drop only the "e" in the 1st row of the area. And step
After the value of “l1” is incremented by “+1” as shown in S832, it is determined in step S833 whether “l1> l2”. "L1> l
If it is determined not to be “2”, “e” is determined in step S834.
After the value of is incremented by "+1", the process returns to step S831 and the next column in the area A is dropped by "e", in this case "2". If it is determined in step S833 that "l1>l2", the process proceeds to step S835 to determine whether there is a B area. If there is a B area, as shown in step S836, the l1 of the B area is determined. The column is dropped by "e". Next, in step S837, the value of l1 is incremented by "+1", and then step S838.
Then, it is judged whether "l1>l4" or not, and if "l1>l4" is not satisfied, the process returns to step S836 and the next row in the B area is dropped by "e". That is, as shown in FIG. 27 (c), in the area A, the drop size increases as the column advances, but in the area B, the drop pattern becomes constant for each column. Then, in step S838
When it is determined that "l1>l4" in step 1,
In step S839, the value of "j" is incremented by "+1". This step
S839 is also executed when the process of step S825 or step S829 is finished. Next, in step S840, it is determined whether or not "j = i" has been reached, and if "j = i" has not been reached, the process returns to step S825 in FIG. 24 (b). If it is determined in step S840 that "j = i", then the value of l1 is incremented by "+1" in step S841 and then the process returns to step S82 in FIG. 24 (a). As described above, the character data in the first RAM 16 has 34 columns (l = 34)
The diagonal compression reproduction process is performed up to, and when it is determined in step S85 that "l = 35" is reached, the process of step S8 is terminated and the process proceeds to the next step S9.

Next, the process of reproducing the corrected character in step S11 will be described with reference to the flowchart in FIG. In this correction character reproduction processing, a column that can be corrected by the processing of steps S111 to S115 is searched for, and a position that can be corrected by the processing of step S116 and thereafter is searched. First, after setting the value of "l" to "3" in step S111, the process proceeds to step S112, and the vertical flag (V1l-2, V2l-2) in the lth column of the first RAM 16 is viewed. Then, in step S113, it is determined whether or not “V1 l−2, V2 l−2 = 0,0”, and if the determination result is YES, the process proceeds to step S114 and the value of “l” is incremented by “+1”. . Then, in step S115, it is determined whether or not “l = 35”, and the determination result is YES.
If so, the process proceeds to the next step S12, but if NO, the process returns to step S112. Then, when a row that can be corrected is found by the processing of steps S111 to S115, that is, when the determination result of step S113 is NO, the process proceeds to step S116, and the reproduction amount (r) is determined by the double length flag and the vertical flag. To do.
Next, in step S117, "0" is written in "s" and "3" is written in "m", and then the process proceeds to step S118, and the value (v) of the point at the 1st column and the mth row of the first RAM 16 is checked. Then, step S1
In 19, it is determined whether or not "v = s". If "v = s", the process advances to step S1110 to increment the value of "m" by "+1". Then, in step S36, it is determined whether or not “m = 36”. If “m” has not reached “36”, step S1 is executed.
Return to 18. Then, in step S119, “v =
s ", the subroutine SUB11 shown in FIG. 29 is executed. This subroutine SUB11
Determines whether or not to correct, and if so, determines the type and corrects. When the processing of this subroutine SUB11 is completed, the value of "v" is set to "s" in step S1112, and the process returns to step S1110. Hereinafter, the same operation is repeated, but “m = 3” in step S1111.
When it is determined that “6” has been reached, the process advances from step S1111 to step S1113 to perform an addition process of “l ← l + r + 1”, and then advances to step S115. And this step S1
If it is determined in step 15 that “l = 35”, the step
The process of S11 is ended and the process proceeds to step S12.

Thus, in the subroutine SUB11 shown in detail in FIG. 29, first in step A1, as shown in FIG.
Point A at the l-th column and m-th row of 1RAM16 and point B at the (l + r) -th column and m-th row
And FIG. 30 shows the positions of points A and B when “l = 5, m = 4, (r = 1)”. Next, the process proceeds to step A2, where the points around A and B are viewed by five points. 30th
In the example of the figure, they are -0, -0, -0, -0, .... In this case, the flag areas VF and HF are all set to "0". Then, based on the reproduction amount r and the ten points examined, FIG.
The correction type (t) is viewed from the relationship shown in. And step
In A4, the correction type (t) is "1,2,3,5,", "0", "4"
It is determined which of the two is "1", and in the case of "1, 2, 3, 5,", the process proceeds to step A5 and is corrected as shown in FIG. 31 (b). However, the points surrounded by the squares correspond to A and B. After that, the process returns to the main routine of step S11. If it is determined in step A4 that the correction type (t) is “0”, the process directly returns to the main routine. If it is determined that “t = 4”, the same line is started from “B”. Is checked to the right, and the point at which "1" is finally set is "C".
Then, it is checked in step A7 how many points "B" and "C" are apart, and if it is determined in step A8 that they are four or more points apart, the process returns to the main routine. However, in step A8, "B"
If it is determined that “C” and “C” are not more than 4 points apart,
Proceeding to step A9, a point around "C" is examined. That is, in steps A10 to A13, the area around "C" is (i),
It is checked which of (ii), (iii) and (iv) the condition is. The above (i), (ii), (iii) and (iv) are “C”
Means that the condition shown in FIG. 32 (a) is provided. In FIG. 32 (a), the shaded area is an area which has already been determined and is not considered. Also in this case, the flag areas are all regarded as "0". Then, the correction is performed centering on "C" as shown in FIG. 32 (b). If it is determined in step A10 that the condition (i) is not satisfied, the process returns to the main routine. If the condition of (i) is satisfied but the condition of (ii) is not satisfied, the process proceeds from step A11 to step A14 to correct "I" in FIG. 32 (b), and then to the main routine. Return. Further, when the conditions (i) and (ii) are satisfied but the condition (iii) is not satisfied, or (i) or (i)
If the conditions of i) and (iii) are satisfied but the condition of (iv) is not satisfied, the process proceeds from step A12 or step A13 to step A15 to determine whether "B" and "C" are three points apart. If it is determined that the points are not three points apart, the process proceeds to step A16 to correct "II" in FIG. 32 (b), and then returns to the main routine. Step A15 above
If it is determined that “B” and “C” are separated by 3 points in step 3, it means that the position of the correction flag (vertical flag) currently being viewed does not match the position of the correction “II”. Return to. Further, the above (i) to (i)
If all the conditions of v) are satisfied, go to step A17 and
32 Correction of “III” in FIG.
Return to the main routine.

Next, details of step S13 will be described with reference to FIG. First, in step S131 of FIG. 33 (a), it is determined whether or not “K = 0”. Initially, "K = 0", and the process proceeds to step S132, where "a" (column information) and "b"
The value of (row information) is set to "1". Then step
In S133, the number represented by B13, B14, and B15 (the number of common characters-1) is entered in "h". B13, B14, B1 above
5 is when looking at the first common character (K =
0), indicating the number of common characters. Thereafter, in step S134, as shown in FIG.
The x-th column and the first to y-th columns are "a to a + x-th columns" of the second RAM 18,
Write in the "b-b + yth column" while taking OR. In this case, (k +) reproduced in the first RAM 16 as shown in FIG.
1) When writing the second common character in the second RAM 18, the information of the P point is given by a and b (the P point is in the a column and the b line), and the size of the reproduced common character is x and y. give. Then, in step S135, the value of "b + y + 1" is changed to "b".
And set the value of “K + 1” as “K” and prepare to determine the next “a” and “b”. Then, in step S136, it is determined whether or not “a + x + 1> c”. If the determination result is YES, the process proceeds to step S137 to set “a + x + 1” as “c”. When the process of step S137 is completed or the result of the determination in step S136 is NO, the process proceeds to step S138 and "h-K =-"
It is determined whether it is "1". In step S138, if the determination result is NO, the process returns to step S3, and if YES, the process proceeds to the next step S14 to perform the centering process.

If it is determined in step S131 that "K = 0" is not satisfied, step S1 in FIG. 33 (b) is performed.
Proceed to 39, B13, B1 indicating the positional relationship of the common character
4. Check B15. In this case, the above B13, B14, B15
Is a position flag indicating a positional relationship with another common character, and is looking at the data stored in the "K + 1" th common character instruction memory unit 31b. Then, in step S1310, “B13 = 1” or “B14, B15
= 0,0 "and if the result is YES,
The process advances to step S1311 to determine whether or not “b + y> 32”. If the decision result in the step S1311 is YES, in a step S1312, the value of “b” is set to “0” and the value of the “a” is set to “c”, and then the process proceeds to a step S1313. Also, if NO is determined in steps S1310 and S1311, step S1
Continue to 313. In the above steps S1310 to S1312, as shown in FIG. 34B, the reproduction area 18a (32 columns × 3
(2 lines), and if the common character protrudes from under the reproduction area 18a, the position is moved to the upper right. Then, in step S1313 described above,
It is determined whether or not "B14, B15 = 0, 0". If YES, the process returns to step S134, and if NO, the process proceeds to step S1314 to determine whether or not "B13 = 0". If the decision result in the step S1314 is NO, in a step S1315, "a" and "b" are determined in consideration of the positional relationship with the left side, and thereafter, the process returns to the step S134. In step S1314, “B13 =
If it is determined that the value is "0", the flow advances to step S1316 to set the value of "m0" to "b-1" and the value of "m1" to "0", and then to step S1317, where m0 in the second RAM 18 is set. It is checked whether the row is “0” up to the “a-32” column. Above steps
In S1316 and S1317, the case of attaching a common character is considered, and the line up to which the second character of the second RAM 18 actually exists is examined. When the common character has a margin as shown in FIG. 34 (c), the width of the margin is set to m1 and considered when determining "b". Then, in the above step S1318, the m0-th row of the second RAM 18 has “a to 3”.
When it is determined that all the data up to the 2nd column is “0”, the process proceeds to step S1319, the value of “m0” is set to “−1”, the value of “m1” is set to “+1”, and then the process returns to step S1317. . Hereinafter, the same processing is repeated, and if the decision result in the step S1318 is NO, the process proceeds to a step S1320 in FIG. 33 (c) to set the value of “m0” to “1” and the value of “m2” to “0”. set. Then, it is checked in step S1321 whether all the first rows of the first RAM 16 are "0", and it is determined in step S1322 whether all are "0". If it is determined that they are all “0”, the process proceeds to step S1323, and the value of “m0” and “m
After the value of “2” is incremented by “+1”, the process returns to step S1321. In the above steps S1321 to S1323, considering how to attach a common character, it is checked how many lines of blank (m2) the first RAM 16 has at the top as shown in FIG. 34 (d). If it is determined in step S1322 that all the m0th rows of the first RAM 16 are not "0", the flow advances to step S1324 to set "b-m1-m2" as "b". Then, in step S1325, “B14, B15” is “1,0”,
It is determined which of “0,1” and “1,1”, and if “1,0”, the process returns to step S134. If it is determined in step S1325 that "B14, B15" is "0,1", the value of "b" is incremented by "-1" in step S1326, and then the process returns to step S134 to return to "B14, B15". Is determined to be "1,1", the value of "b" is changed to "-" in step S1327.
After "2", the flow returns to step S134. Above steps S1325 ~ S
In 1327, it is considered that the common character is further overlapped. For example, in the case of "B14, B15 = 1,0", if the common character of the first RAM16 shown in FIG. 35B is overlaid on the common character of the second RAM18 shown in FIG. As shown in. Originally, “b” indicates the line next to the last line of the previous common character, but the position is determined by changing “b” in consideration of m1 and m2 (including B14 and B15).

Next, details of step S14 will be described with reference to the flowchart in FIG. First, in step S141, the value of “l” is set to “32” and the value of “a” is set to “0”. Next, the process proceeds to step S142, where the first column of the first RAM 16 is 1
Check to see if all "0" up to line 32
If all are determined to be “0” in S143, step S1
Proceeding to 44, the value of “l” is set to “−1” and the value of “a” is set to “+”
1 ", and then return to step S142. That is, in the processes of steps S141 to S144, it is checked how many columns of characters are shifted so that the characters are in the center. And the above steps
The processing of S142 to S144 is repeatedly executed, and thereafter, step S1
If the determination result in 43 is NO, the process proceeds to step S145,
"A" is the smallest integer not less than "a / 2".
Next, in step S146, as shown in FIG. 37, the entire character is shifted to the right in column a. At this time, for a column having no column data to be transferred, “0” is shifted to the right. With the above, the centering process of step S14 is completed, and the process proceeds to the next step S15. In step S15, the character data reproduced in the second RAM 18 as described above is written into the stack registers 29a to 29d, and sequentially output to the display unit as 32-bit character data from the stack registers 29a to 29d.

[Effects of the Invention] As described in detail above, according to the present invention, a common character formed by separating fonts such as Chinese characters by radicals and separating the fonts including the radicals into a common portion is stored in a character memory. , In a character generator that forms a font common character by combining a plurality of common characters, when a common character is stored in a character memory, a line that is regularly formed is compressed, and a common character is generated according to the compression process. Since the size of the character is variably set and the flag indicating the size is stored in the character memory in association with each common character, the memory capacity of the character generator can be significantly reduced.

Further, according to the present invention, when compressing a common character, the size of the common character is defined only in one direction in the vertical or horizontal direction and the other is variably set, and after compression, the direction in which the size is defined is aligned in a fixed direction. Since the common character is rotated like this, the memory space can be used efficiently, and the object can be achieved with a small capacity character memory, which is advantageous for downsizing of information processing equipment and cost reduction. Can be achieved.

[Brief description of drawings]

1 shows an embodiment of the present invention. FIG. 1 is a block diagram showing the overall circuit configuration, and FIG.
FIG. 3 is a diagram showing a storage configuration of 1 RAM and 2 RAM, FIG. 3 is a diagram showing a storage configuration of a character ROM in FIG. 1, and FIG. 4 is a diagram showing an outline of a case where characters are separated to form a common character. FIG. 5 is a diagram showing a schematic operation when correcting and compressing a common character, FIG. 6 is a diagram showing an example of a corrected character formed by correcting a common character, and FIG. 7 is a diagram showing an example of vertical and horizontal compression. 8 is a diagram showing a diagonal compression method, FIG. 9 is a diagram showing an example of double compression, FIG. 10 is a diagram showing an example of centering compression, and FIG. 11 is a character area and a flag area in the common character portion of the character ROM. , FIG. 12 (a) to FIG. 12 (c) show the relationship between various flags and their functions, FIG. 13 shows the bit structure of the common character instruction data in the character ROM, and FIG. Is the common character instruction data (B 13, B14, B15) and the number of common characters, FIG. 15 shows the relationship between the above-mentioned common character instruction data (B13, B14, B15) and the contents of the position flag, and FIG. FIG. 17 is a diagram showing the relationship between the vertical variable flag and the rotation flag and the size (x, y) of the common character, and FIG.
FIG. 19 is a flowchart showing the entire processing operation at the time of character character reproduction, FIG. 19 is a diagram showing the state of character reproduction for the main steps in FIG. 18, FIG. 20 is a flowchart showing details of step S4 in FIG. FIG. 21 is a flowchart showing details of step S5 in FIG. 18, FIG. 22 is a flowchart showing details of step S7 in FIG. 18, FIG. 23 is a diagram showing an example of horizontal compression reproduction in FIG. 22,
24 (a) to 24 (c) are flowcharts showing details of step S8 in FIG. 18, and FIGS. 25 (a) and 25 (b) are data storage of the first RAM and the second RAM for explaining the operation of step S8. FIG. 26 shows a state example, and α in step S8
FIG. 27 (a) to FIG. 27 (c) show the lateral compression reproduction operation in step S8, and FIG. 28 shows the details of step S11. A flow chart, a flow chart showing the details of the subroutine SUB11 in FIG. 29, FIG. 30 is a view showing a data check state for the first RAM for explaining the operation of step S11, and FIG. 31 (a) is a check point and a reproduction amount. FIG. 31 (b) shows the details of the correction type, FIG. 32 shows the correction method, FIG. 33 (a).
~ (C) is a flowchart showing the details of step S13 in Fig. 18, Fig. 34 (a) to (d) and 35 (a) to.
(C) is a diagram showing a character character reproduction state in the first RAM and the second RAM, FIG. 36 is a flowchart showing details of step S14 in FIG. 18, and FIG. 37 is a diagram showing a centering operation of the character characters in the first RAM. is there. 11 Oscillator circuit, 12 Program counter, 13 RO
M address stack register, 14 ... Program ROM, 15
…… Instruction decoder, 16 …… First RAM, 17,
27 ... Address counter, 18 ... Second RAM, 22 ... Comparison circuit, 23 ... Operation circuit, 24 ... Decoder, 29a-29d ... Stack register, 31 ... Character ROM.

Claims (2)

[Claims] 1. A common character, which is formed by separating fonts such as Chinese characters according to radicals and separating the fonts including the radicals into a common portion, is stored in a character memory, and the font characters are combined by combining a plurality of common characters. In the constituent character generator, when storing the common character in the character memory, means for compressing regularly formed lines, and variably setting the size of the common character according to the compression processing by this means, And a means for storing a flag indicating its size in the character memory in association with each common character. 2. The method according to claim 1, further comprising means for rotating the common character so that the direction of which the size is regulated is aligned in a fixed direction after the common character is compressed. Character character compression method.