JPH08125119A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPH08125119A
JPH08125119A JP6284542A JP28454294A JPH08125119A JP H08125119 A JPH08125119 A JP H08125119A JP 6284542 A JP6284542 A JP 6284542A JP 28454294 A JP28454294 A JP 28454294A JP H08125119 A JPH08125119 A JP H08125119A
Authority
JP
Japan
Prior art keywords
semiconductor device
wiring board
laminate
semiconductor element
conductor layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6284542A
Other languages
Japanese (ja)
Inventor
Hideo Yamaguchi
秀夫 山口
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nihon Inter Electronics Corp
Original Assignee
Nihon Inter Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nihon Inter Electronics Corp filed Critical Nihon Inter Electronics Corp
Priority to JP6284542A priority Critical patent/JPH08125119A/en
Publication of JPH08125119A publication Critical patent/JPH08125119A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3415Surface mounted components on both sides of the substrate or combined with lead-in-hole components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3421Leaded components

Abstract

PURPOSE: To shorten the dimension of the laminate of a flat semiconductor element and a heat dissipation fin in the breadthwise direction by a structure wherein a wiring board mounting electric protective components, e.g. resistors or capacitors, being connected in parallel with each semiconductor element is disposed coaxially with the laminate. CONSTITUTION: A laminate 4 comprising flat semiconductor elements 2 and heat dissipation fins 3 arranged alternately is provided coaxially, at the opposite ends thereof, with wiring boards 9 where a conductor layer is formed on one side of an insulator plate. The wiring boards 9 are pressed together with the flat semiconductor elements 2 and the heat dissipation fins 3 to come into contact therewith. Conductor layers 10a-10e are formed in a predetermined pattern on one side of the wiring board 9 and connected with electric protective components, e.g. capacitors C or resistors R. The wiring boards 9 are also connected with terminals P, N and U, V, W. The laminate 4 is clamped by means of stands 5, 5 through an insulation spacer 6 and secured by means of stud bolts.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、同心軸上に複数の平型
半導体素子が加圧接触された半導体装置に関し、特に抵
抗、コンデンサ等の電気的保護部品の配置を考慮し、装
置全体の小型化を図った半導体装置に関するものであ
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device in which a plurality of flat semiconductor elements are pressure-contacted to each other on a concentric shaft, and in particular, considering the arrangement of electrical protection parts such as resistors and capacitors, The present invention relates to a miniaturized semiconductor device.

【0002】[0002]

【従来の技術】従来のこの種の半導体装置の概略構造を
図5の平面図及び図6の回路図を参照して説明する。図
5において、半導体装置1は、同心軸上に複数(図示で
は6個)の平型半導体素子2が加圧接触された構造とな
っている。なお、この例では平型半導体素子2としてサ
イリスタを使用している。
2. Description of the Related Art A schematic structure of a conventional semiconductor device of this type will be described with reference to a plan view of FIG. 5 and a circuit diagram of FIG. In FIG. 5, the semiconductor device 1 has a structure in which a plurality of (six in the figure) flat semiconductor elements 2 are pressure-contacted on a concentric axis. In this example, a thyristor is used as the flat semiconductor element 2.

【0003】上記の半導体素子2とブロック状の放熱フ
ィン3とが交互に軸方向に配置され積層体4を構成して
いる。この積層体4の両端には絶縁スペーサ6を介して
スタンド5が配置され、該スタンド5,5間にはスタッ
ドボルト7,7が挿通され、図示を省略した加圧調芯機
構を介して前記積層体4内の平型半導体素子2に加圧力
が付与されるようになっている。
The semiconductor element 2 and the block-shaped heat radiation fins 3 are alternately arranged in the axial direction to form a laminated body 4. Stands 5 are arranged at both ends of the laminated body 4 via insulating spacers 6, stud bolts 7, 7 are inserted between the stands 5, 5, and the pressure aligning mechanism (not shown) is used to form the stand 5. A pressing force is applied to the flat semiconductor element 2 in the laminated body 4.

【0004】上記半導体装置1の回路構成は、図6に示
すようにサイリスタTH1〜TH6を使用した三相ブリ
ッジ回路を形成している。図中、K1〜K6はカソード
電極、G1〜G6はゲート電極、CS、RSは各サイリ
スタTH1〜TH6に並列接続されたサージ電圧吸収用
保護部品である。U,V,Wは交流入力端子、P,Nは
直流出力端子である。
The circuit configuration of the semiconductor device 1 forms a three-phase bridge circuit using thyristors TH1 to TH6 as shown in FIG. In the figure, K1 to K6 are cathode electrodes, G1 to G6 are gate electrodes, and CS and RS are surge voltage absorbing protection components connected in parallel to the thyristors TH1 to TH6. U, V and W are AC input terminals, and P and N are DC output terminals.

【0005】上記サイリスタTH1〜TH6は、平型半
導体素子2として図5に示すように配置され、これらの
半導体素子2に対して電気的保護部品8が半導体装置1
の幅方向Wの両側にそれぞれ配置されている。
The thyristors TH1 to TH6 are arranged as flat semiconductor elements 2 as shown in FIG. 5, and an electrical protection component 8 is provided to these semiconductor elements 2 as a semiconductor device 1.
Are arranged on both sides in the width direction W.

【0008】[0008]

【発明が解決しようとする課題】上記従来の半導体装置
1では、平型半導体素子2に対する電気的保護部品8が
該半導体装置1の幅方向に突出するように配置されてい
るので、装置を大型化させ占有スペースの縮小化の要請
に十分応えることができないという解決すべき課題があ
った。
In the above conventional semiconductor device 1, since the electrical protection component 8 for the flat semiconductor element 2 is arranged so as to project in the width direction of the semiconductor device 1, the size of the device is increased. However, there is a problem to be solved that it cannot fully meet the demand for the reduction of the occupied space.

【0009】[0009]

【発明の目的】本発明は、上記のような課題を解決する
ためになされたもので、小型化に十分寄与することがで
きる半導体装置を提供することを目的とするものであ
る。
SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and an object of the present invention is to provide a semiconductor device which can sufficiently contribute to miniaturization.

【0010】[0010]

【問題点を解決するための手段】本発明の半導体装置
は、同心軸上に複数の平型半導体素子と放熱フィンとを
交互に配置した積層体を加圧接触される半導体装置にお
いて、前記積層体と同心軸上に、前記各半導体素子に並
列に接続される抵抗、コンデンサ等の電気的保護部品を
搭載した配線基板を配置したことを特徴するものであ
る。
A semiconductor device according to the present invention is a semiconductor device in which a laminated body in which a plurality of flat semiconductor elements and heat radiation fins are alternately arranged on a concentric axis is pressure-contacted, A wiring board having electrical protection components such as resistors and capacitors connected in parallel with the respective semiconductor elements is arranged on the axis concentric with the body.

【0011】[0011]

【作用】本発明の半導体装置は、平型半導体素子と放熱
フィンとの積層体と同心軸上に、各半導体素子に並列に
接続される抵抗、コンデンサ等の電気的保護部品を搭載
した配線基板を配置したので、積層体の幅方向の寸法を
小さくすることができ、装置全体の小型化を図ることが
できる。
A semiconductor device according to the present invention is a wiring board on which electrical protection components such as resistors and capacitors connected in parallel to the respective semiconductor elements are mounted on a concentric axis with a laminated body of flat semiconductor elements and heat radiation fins. Since the arrangement is provided, the widthwise dimension of the laminate can be reduced, and the overall size of the device can be reduced.

【0012】[0012]

【実施例】以下に、本発明の一実施例を図1乃至図4を
参照して説明する。図1は第1の実施例である本発明の
半導体装置を模式的にした図である。図において、平型
半導体素子2と放熱フィン3とが交互に配置された積層
体4の両端部に、絶縁物からなる板の一方の面に導体層
が形成された配線基板9が該積層体4と同心軸上に挿入
され平型半導体素子2、放熱フィン3と共に加圧接触さ
れている。上記配線基板9の詳細を図3及び図4に示
す。これらの図において、配線基板9の片側表面には、
所定のパターン形状の導体層10a,10b,10c,
10eが形成されている。これらの導体層10a〜10
e間を跨ぐように抵抗R,コンデンサCのような電気的
保護部品8が複数組、図では3組並列に接続されてい
る。上記複数の電気的保護部品8の一方の端子は、導体
層10aに共通に接続され、他方の端子は、独立した導
体層10b,10c,10eにそれぞれ別個に接続され
ている。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to FIGS. FIG. 1 is a schematic view of a semiconductor device according to the first embodiment of the present invention. In the figure, a wiring board 9 in which a conductor layer is formed on one surface of a plate made of an insulator is provided at both ends of a laminated body 4 in which flat semiconductor elements 2 and heat radiation fins 3 are alternately arranged. 4 is inserted on a concentric axis with the flat semiconductor element 2 and the heat radiation fin 3 and is in pressure contact. Details of the wiring board 9 are shown in FIGS. In these figures, on one surface of the wiring board 9,
Conductor layers 10a, 10b, 10c having a predetermined pattern shape,
10e is formed. These conductor layers 10a-10
A plurality of sets of electrical protection components 8 such as resistors R and capacitors C, three sets in the figure, are connected in parallel so as to straddle between e. One terminal of the plurality of electrical protection components 8 is commonly connected to the conductor layer 10a, and the other terminal is individually connected to the independent conductor layers 10b, 10c, 10e.

【0013】上記共通の導体層10aは、平型半導体素
子2の一方の極性の共通部となっている。すなわち、図
1では端子P及び端子Nが引き出される放熱フィン3に
密着して両側に配線基板9が配置され、図示右側の配線
基板9の導体層10aに、端子U,V,Wが引き出され
る放熱フィン3から二点鎖線で示される結線が施され
る。また、図示左端の配線基板9の独立した導体層10
b,10c,10dに対しても図示のように二点鎖線で
示される結線がそれぞれ施される。図2は本発明の第2
の実施例を示す半導体装置である。この例では積層体4
を二列にしたもので、該積層体4の片側端部のみに配線
基板9を配置してある。これらの積層体4は、絶縁スペ
ーサ6を介してスタンド5,5間に、図示を省略したス
タッドボルトにより固定される構造となっている。な
お、その他の構成は図5に示した従来の半導体装置と同
様であるので、その詳しい説明は省略する。
The common conductor layer 10a is one polarity common part of the flat semiconductor element 2. That is, in FIG. 1, the wiring boards 9 are arranged on both sides in close contact with the radiation fins 3 from which the terminals P and N are drawn out, and the terminals U, V, W are drawn out to the conductor layer 10a of the wiring board 9 on the right side in the drawing. A connection indicated by a chain double-dashed line is applied from the radiation fin 3. In addition, an independent conductor layer 10 of the wiring board 9 at the left end in the figure
The connections indicated by the two-dot chain lines are also applied to b, 10c, and 10d, respectively, as shown in the figure. FIG. 2 shows the second aspect of the present invention.
2 is a semiconductor device showing the embodiment of FIG. In this example, the laminated body 4
In two rows, and the wiring board 9 is arranged only on one end of the laminated body 4. These laminated bodies 4 are structured to be fixed between the stands 5 and 5 via insulating spacers 6 by stud bolts (not shown). Since the other structure is similar to that of the conventional semiconductor device shown in FIG. 5, its detailed description is omitted.

【0014】[0014]

【発明の効果】以上のように、本発明は平型半導体素子
と放熱フィンとの積層体と同心軸上に、各半導体素子に
並列に接続される抵抗、コンデンサ等の電気的保護部品
を搭載した配線基板を配置したので、積層体の幅方向の
寸法を小さくすることができ、装置全体の小型化を図る
ことができるなどの優れた効果がある。
As described above, according to the present invention, electrical protection components such as resistors and capacitors connected in parallel to each semiconductor element are mounted on the concentric axis of the laminated body of the flat semiconductor element and the heat radiation fin. Since the wiring board is arranged, the widthwise dimension of the laminated body can be reduced, and the size of the entire device can be reduced, which is an excellent effect.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の第1の実施例を示す半導体装置の模式
図である。
FIG. 1 is a schematic view of a semiconductor device showing a first embodiment of the present invention.

【図2】本発明の第2の実施例を示す半導体装置の模式
図である。
FIG. 2 is a schematic view of a semiconductor device showing a second embodiment of the present invention.

【図3】上記半導体装置に使用する配線基板の平面図で
ある。
FIG. 3 is a plan view of a wiring board used for the semiconductor device.

【図4】上記配線基板の側面図である。FIG. 4 is a side view of the wiring board.

【図5】従来の半導体装置の平面図である。FIG. 5 is a plan view of a conventional semiconductor device.

【図6】上記半導体装置の回路図である。FIG. 6 is a circuit diagram of the semiconductor device.

【符号の説明】[Explanation of symbols]

1 半導体装置 2 平型半導体素子 3 放熱フィン 4 積層体 5 スタンド 6 絶縁スペーサ 7 スタッドボルト 8 電気的保護部品 9 配線基板 10a,10b,10c,10d 導体層 DESCRIPTION OF SYMBOLS 1 Semiconductor device 2 Flat semiconductor element 3 Radiating fin 4 Laminated body 5 Stand 6 Insulation spacer 7 Stud bolt 8 Electrical protection component 9 Wiring board 10a, 10b, 10c, 10d Conductor layer

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 同心軸上に複数の平型半導体素子と放熱
フィンとを交互に配置した積層体を加圧接触される半導
体装置において、前記積層体と同心軸上に、 前記各半導体素子に並列に接続される抵抗、コンデンサ
等の電気的保護部品を搭載した配線基板を配置したこと
を特徴する半導体装置。
1. A semiconductor device in which a laminated body, in which a plurality of flat semiconductor elements and heat radiation fins are alternately arranged on a concentric axis, is contacted under pressure, wherein each laminated semiconductor element is concentric with the laminated body. A semiconductor device having a wiring board on which electrical protection components such as resistors and capacitors connected in parallel are mounted.
【請求項2】 前記配線基板には、複数組の前記保護部
品が搭載され、かつ、その複数組の一方の端子は共通導
体層上に接続され、他方の端子はそれぞれ別個の導体層
上に接続され、前記配線基板の共通導体層は平型半導体
素子の一方の極性の共通部に、他方の独立した導体層は
前記平型半導体素子の他方の極性にそれぞれ接続されて
いることを特徴とする請求項1に記載の半導体装置。
2. A plurality of sets of the protection component are mounted on the wiring board, and one terminal of the plurality of sets is connected on a common conductor layer, and the other terminal is on a separate conductor layer. And a common conductor layer of the wiring board is connected to a common part of one polarity of the flat semiconductor element, and the other independent conductor layer is connected to the other polarity of the flat semiconductor element. The semiconductor device according to claim 1.
JP6284542A 1994-10-26 1994-10-26 Semiconductor device Pending JPH08125119A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6284542A JPH08125119A (en) 1994-10-26 1994-10-26 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6284542A JPH08125119A (en) 1994-10-26 1994-10-26 Semiconductor device

Publications (1)

Publication Number Publication Date
JPH08125119A true JPH08125119A (en) 1996-05-17

Family

ID=17679811

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6284542A Pending JPH08125119A (en) 1994-10-26 1994-10-26 Semiconductor device

Country Status (1)

Country Link
JP (1) JPH08125119A (en)

Similar Documents

Publication Publication Date Title
US5495889A (en) Cooling device for power electronic components
US4224663A (en) Mounting assembly for semiconductive controlled rectifiers
JP3228021B2 (en) Inverter unit and inverter device
US4492975A (en) Gate turn-off thyristor stack
US3727114A (en) Air cooled semiconductor stack
JP3958156B2 (en) Power semiconductor device
JP2003197861A (en) Power semiconductor submodule and power semiconductor module
JP3851138B2 (en) Power semiconductor device
JPH05243305A (en) Electronic circuit device
JP7240526B2 (en) electronic switching unit
JPH05292756A (en) Power converter
JPH09266125A (en) Multilayer ceramic parts
JPH08125119A (en) Semiconductor device
JP4878424B2 (en) Power converter
JP3085453B2 (en) Semiconductor module and inverter device using the same
US20210400815A1 (en) Solid state switching device including heat sinks and control electronics construction
JPH08274228A (en) Semiconductor mounting board, power semiconductor device and electronic circuit device
JP2004221552A (en) Electronic board, power module, and motor driving unit
JPH1065224A (en) Thermomodule
JP3011308U (en) Semiconductor device
JPH07176796A (en) Thermoelectric converter
JPH058932U (en) Large power, large capacity capacitor
JP3831751B2 (en) Connection structure of screw terminal type capacitor
US20230163105A1 (en) Semiconductor chip stack module and method of fabricating the same
US7271473B1 (en) Semiconductor power transmission device