JPH08123722A - Method and device for controlling storage in information processing system - Google Patents

Abstract

PURPOSE: To suppress a deterioration of storing performance and to improve processing speed by executing a store request from an external device without uselessly waiting the request with respect to storage controlling method and device in an information processing system provided with a store-in system buffer storage for speeding up data access. CONSTITUTION: When a data part for a storage device 11 which is a write request object is stored in a buffer storage 13 at the time of receiving a write request to the storage device 11 from an external device 14, write data following the write request from the device 14 are written in the storage device 11 in parallel with the issue of a move-out request for reading out the data part concerned from the buffer storage 13 and writing it in the storage device 11 to the buffer storage 13.

Description

Detailed Description of the Invention

(Table of Contents) Industrial Application Conventional Technology (FIGS. 12 to 14) Problem to be Solved by the Invention (FIGS. 12 to 14) Means for Solving the Problem (FIG. 1) Operation (FIG. 1) ) Example (FIGS. 2-11) Effect of the invention

[0002]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a storage control method and a storage control device used in an information processing system having a store-in type buffer storage for the purpose of speeding up data access, and more particularly to a store from an external device. The present invention relates to a method and an apparatus for improving write control corresponding to a request (write request).

[0003]

2. Description of the Related Art In recent information processing systems, as shown in FIG.
It has become common to equip a buffer storage 10 between a storage device 1 and a storage device (MSU) 5. That is, by storing a part of the data in the storage device 5 used by the processing device 1 that is determined to be used frequently in a high-speed and small-capacity memory called buffer storage, The effective access time is shortened and the performance of the entire information processing system is improved. In addition, in FIG. 12, the buffer storage 10 is the processing device 1.
In addition to the case where it is provided inside, a signal system for making a store request (write request) from the external device 3 to the storage device 5 is illustrated as will be described later.

Generally, in the buffer storage 10, the inside is divided into units of several tens to several hundreds of bytes called blocks, and the correspondence with the data in the storage device 5 is performed in units of blocks. The buffer storage 10 has a data section 1 that holds data divided into blocks.
0a and a tag portion (TAG1) 10b are provided. The tag unit 10b is a memory that stores an entry corresponding to each block in the data unit 10a on a one-to-one basis. The address of the corresponding block in the storage device 5 is stored in each entry of the tag unit 10b. There is.

When a data request is generated in the processor 1, first, the tag unit 10b of the buffer storage 10 is referred to. If the address of the requested data is stored in any entry of the tag unit 10b, the request is made. When it is determined that the data exists in the buffer storage (data section) 1a, the data in the corresponding block is sent to the processing device 1. If the requested data address is the tag portion 10b
If not stored, the requested data is determined to be absent and the requested data is moved from the storage device 5 to the buffer storage 10.

In FIG. 12, 2 is a channel processor (CHP), 3 is an external device (channel device; C).
H) and 4 are storage control units (MCU), the channel processing device 2 is connected to the external device 3 and is also connected to the storage device 5 via the storage control device 4, and the external device 3 is connected to the storage device 5. When a fetch (read) / store request is received, the request is issued to the storage controller 4.

The storage control device 4 controls the exchange of data between the storage device 5 and the processing device 1 or the channel processing device 2, and includes a tag copying section (TAG2) 4a, a selector 4b and a write control circuit 4c. Is configured.
Here, the tag copying unit 4a holds a copy of the tag unit 10b in the buffer storage 10, and the selector 4b stores the store data from the processing device 1 and the store data from the external device 3 (channel processing device 2). One of the two is selected and output to the storage device 5.

Further, the write control circuit 4c is for controlling writing (store) from the external device 3 to the storage device 5, and controls switching of the data selection state by the selector 4b and sets the size of the store data. Accordingly, in addition to the function of outputting a write inhibit signal to the storage device 5 as described later, when the store address is present in the tag copying unit 4a (hit), the buffer storage 10 is transmitted to the processing device 1. It also has a function to issue a move out request for data in.

By the way, the speeding up of the memory element has not progressed as compared with the speeding up of the semiconductor in the processing apparatus 1, and the development of the memory element is progressing toward the capacity increase rather than the speed up. Therefore, when the store-through method in which the writing operation by the processing device 1 is performed not only on the buffer storage 10 but also on the storage device 5 each time is applied, the processing speed between the storage device 5 and the processing device 1 is increased. The difference can be absorbed only by fetching, which is becoming a problem. Therefore, in recent years, the store-in method in which the writing operation by the processing device 1 is completed by the buffer storage 10 is often applied.

In such a store-in type buffer storage 10, since the latest data may not exist in the storage device 5 but may exist in the buffer storage 10.
The storage device 5 can be processed only after the move-out process of reading the latest data in the buffer storage 10 from the buffer storage 10 to the storage device 5.

Store-in type buffer storage 10
Buffer storage 10 and storage device 5
Data is often exchanged with the block size of the buffer storage 10. Therefore, in order to reduce the physical quantity of the storage device 5, fetch / store of the storage device 5 is also often performed with this block size. However, since a fetch / store request from a device that does not have the buffer storage 10 such as the external device 3 is not required by the block size, it is possible to process a fetch / store of a data amount smaller than the block size. Need to control.

When fetching the data of the block size from the storage device 5, only the necessary data needs to be fetched and transferred to the request device, but since the data smaller than the block size is stored in the storage device 5. After storing the requested data, the write control circuit 4c of the storage control device 4 sends a write inhibit signal to the storage device 5, and the remaining data of the block size is stored in the storage device 5. Suppressed from being stored.

Further, in the store-in type buffer storage 10, since the latest data may be held in the buffer storage 10 as described above, the data in the buffer storage 10 should be stored before the storage in the storage device 5. After moving out to the storage device 5, it is necessary to store in the storage device 5. Regarding the processing operation of the storage control device 4 for controlling such operation, FIG.
(Flowchart) and FIG. 14 (Time chart).

In this case, the block size is 64.
This is a byte, and a case will be described in which the channel processing device 2 (external device 3) requests the storage control device 4 to store 32 bytes of data (see step A1 in FIG. 13 and timing T1 in FIG. 14). . First, when the priority of the store address (tag) from the channel processing device 2 is selected (see timing T2 in FIG. 14) and there is a tag that matches the store address among the tags held in the tag copying unit 4a. (TAG2 hit; Figure 1
If YES is determined in step A2 of 3), refer to timing T3 in FIG. 14), and a data moveout request in the buffer storage 10 is issued from the storage control device 4 to the processing device 1.
(See step A3 in FIG. 13 and timing T4 in FIG. 14).

In response to the move-out request from the write control circuit 4c, the update flag C of the corresponding address in the tag section 10b of the buffer storage 10 is referred to, the update flag C is valid, and the latest data is stored in the data section 10a. If it is determined that the data is stored, a moveout request is issued from the processing device 1 to the storage control device 4 (FIG. 14).
Timing T5). If the update flag C is invalid and the latest data is not stored in the data section 10a, a request indicating that there is no move out is issued to the processing device 1.
Issued to the storage controller 4.

When the priority of the address (tag) of the data to be moved out from the buffer storage 10 is selected in response to the move out request from the processing device 1 (see timing T6 in FIG. 14), the move out data is stored. A request is issued from the storage control device 4 to the storage device 5 (see timing T7 in FIG. 14), and moveout data is stored in the storage device 5 (FIG. 13).
Step A4, timing T8 in FIG. 14).

When the move-out data from the processing device 1 is completely stored in the storage device 5, the priority of the store address (tag) from the channel processing device 2 is selected again to store the store data in the storage device 5. (See timing T9 in FIG. 14), a storage request for 32 bytes of data is issued from the storage control device 4 to the storage device 5 (see timing T10 in FIG. 14), and 32 bytes of data are stored in the storage device 5. Data is stored (see step A5 in FIG. 13 and timing T11 in FIG. 14).

At this time, since the block size is 64 bytes and the size of the store data is 32 bytes, as described above, after the data of 32 bytes is stored, the write control circuit 4c. Sends a write inhibit signal to the storage device 5 to inhibit the remaining 32 bytes of data of the block size from being stored in the storage device 5.

When 32 bytes of data have been stored in the storage device 5 in this way, a storage completion notification is issued from the storage control device 4 to the channel processing device 2 and transmitted (step A6 in FIG. 13; FIG. 14 timing T12). In addition, from the processing device 1 to the storage control device 4,
When a request indicating that there is no move-out is issued, the timing T5 of FIG. 14 is followed by the timing T9 (priority selection of the store address from the channel processing device 2), and the same processing as described above is performed. .

When there is no tag that matches the store address among the tags held in the tag copying section 4a (TAG2 mishit; NO at step A2 in FIG. 13).
13), the process immediately proceeds to step A5 in FIG. 13, and a storage request for 32 bytes of data is issued from the storage control device 4 to the storage device 5, and the storage device 5 executes 3 requests.
Stores 2 bytes of data. Again,
With respect to portions other than the 32 bytes of store data, writing is inhibited by sending a write inhibition signal to the storage device 5.

[0021]

In the conventional storage control procedure (store control procedure) described above with reference to FIGS.
The completion time of the store processing from the external device 3 is the timing T4 to T8 after the move out processing from the buffer storage 10 to the storage device 5 is performed.
Since the store data from the external device 3 is stored in the storage device 5 at 9 to T11, it may take longer to write the data in the store-in method than in the store-through method. However, there was a problem that the writing performance from No. 3 was greatly reduced.

The present invention has been devised in view of the above problems, and when a store-in type buffer storage is provided, a write request from an external device can be executed without wasteful waiting. It is an object of the present invention to provide a storage control method and a storage control device in an information processing system that suppresses a decrease in writing performance from an external device and improves processing speed.

[0023]

FIG. 1 is a block diagram of the principle of the present invention. In FIG. 1, 11 is a storage device that stores data, 12 is a processing device that operates based on the data of the storage device 11, and 13 Is a buffer storage, and the buffer storage 13 holds a copy of a part of the data in the storage device 11 that the processing device 12 can use.
a and a tag unit 13b that holds tag information including the address of the data held in the data unit 13a.

Further, 14 is an external device connected to the information processing system of the present invention, and 15 is a storage control device for controlling data transfer between the storage device 11 and the buffer storage 13 and the external device 14 by a store-in method. is there. The storage control device 15 includes a tag copying unit 16, a moveout request issuing unit 17, and a writing control unit 18.

Here, the tag copying unit 16 holds a copy of part or all of the tag unit 13b of the buffer storage 13. The move-out request issuing unit 17 stores the data in the data unit 13a of the buffer storage 13. Is issued to the buffer storage 13 for reading out and writing to the storage device 11, and the write control unit 18 controls writing of data to the storage device 11.

In the present invention, the external device 14
When the tag copying unit 16 holds the tag information including the address of the data that is the target of the write request at the time of receiving the write request from the storage device 11 by the move-out request issuing unit 17, The data portion corresponding to the information is read from the buffer storage 13 and stored in the storage device 11.
In parallel with issuing the moveout request for writing to the buffer storage 13,
8 writes the write data accompanying the write request from the external device 14 into the storage device 11 (claim 1,
9).

When the read / write processing among the storage device 11, the processing device 12 and the buffer storage 13 is performed in data block units of a predetermined specific block length, writing from the external device 14 is performed. When the data length of the write data accompanying the request is shorter than the specific block length, the write control unit 18 writes only the write data from the external device 14 to the storage device 11 and is issued by the moveout request issuing unit 17. Of the move-out data read from the buffer storage 13 in response to the generated move-out request, only the part other than the write data from the external device 14 is written to the storage device 11 (claims 2 and 10). .

Further, when the move-out request issuing unit 17 issues a move-out request in response to a write request from the external device 14, an information setting unit for setting information indicating that fact is sent to the storage unit 11. May be provided with a write inhibition instruction unit for outputting to the storage device 11 a write inhibition signal for inhibiting writing of the data. At this time, when the write control unit 18 writes the write data from the external device 14 to the storage device 11 in data block units of a specific block length, the write inhibition instruction unit writes the write data to the storage device 11. The inhibition signal is output, and the portion of the data block of the specific block length other than the write data from the external device 14 is stored in the storage device 1.
Suppress writing to 1. Then, the write control unit 1
8 writes the move-out data from the buffer storage 13 to the storage device 11, when it is set in the information setting unit that the move-out data corresponds to the write request from the external device 14. The write inhibition instruction unit outputs a write inhibition signal to the storage device 11, and the external device 1 of the moveout data of the specific block length is output.
It is prevented that the portion corresponding to the write data from No. 4 is written in the storage device 11 (claims 3 and 11).

Furthermore, a move-out sequence control unit for controlling the move-out sequence from the buffer storage 13 is provided, and when the data length of the write data from the external device 14 is half the specific block length, the move-out sequence control unit. Controls the order of move-out from the buffer storage 13 and transfers write data from the external device 14 to the storage device 11.
Output timing of the write inhibit signal from the write inhibit instruction section when writing to the memory and output timing of the write inhibit signal from the write inhibit instruction section when writing the moveout data from the buffer storage 13 to the storage device 11 And can be the same (claims 4 and 12).

Further, the move-out from the buffer storage 13 may be performed only when the move-out target data in the buffer storage 13 is updated (claims 5 and 13). In this case, when the moveout data is received from the buffer storage 13, the write control unit 18 causes the write data portion from the external device 14 and the write data from the external device 14 out of the moveout data from the buffer storage 13. The data may be written in the storage device 11 in combination with a portion that does not correspond to the above (claims 6 and 14). Further, when the move out from the buffer storage 13 is not performed, the write inhibition instruction unit outputs a write inhibition signal to the storage device 11 to output the data block of the specific block length from the external device 14. The write control unit 18 controls the external device 14 while suppressing writing of a portion other than the write data in the storage device 11.
The write data from is written in the storage device 11 (claims 7 and 15).

On the other hand, regardless of the update / unupdate of the move-out target data in the buffer storage 13, the move-out from the buffer storage 13 is performed, and the write control unit 18 always writes the write data portion from the external device 14. Alternatively, the move-out data from the buffer storage 13 and a portion that does not correspond to the write data from the external device 14 may be combined and written to the storage device 11 (claims 8 and 16).

[0032]

In the storage controller 15 in the information processing system of the present invention described above with reference to FIG. 1, when a write request for the storage device 11 is received from the external device 14, the address of the data to be the write request is set. If the tag information including the tag information is held in the tag copying unit 16, that is, if the data portion of the write request target is held in the buffer storage 13, the move-out request issuing unit 17 moves the corresponding data portion out. The request is issued to the buffer storage 13. Also, in parallel with this,
The write control unit 18 writes the write data from the external device 14 into the storage device 11. Therefore, the external device 14
It is possible to execute the write request from the client without wasting the wait (claims 1 and 9).

When the external device 14 requests writing of data shorter than the specific block length, the write control unit 18 writes only the write data from the external device 14 to the storage device 11, and Only the part of the move-out data other than the write data from the external device 14 is written in the storage device 1. Thereby, the external device 14
The move-out data can be written in the storage device 11 without destroying the write data from the storage device 11 (claims 2 and 1).
0).

At this time, the write inhibition instruction section causes the storage device 1 to
The write control unit 18 outputs a write inhibit signal to the write control unit 1 to inhibit writing of a portion of the data block having a specific block length other than the write data from the external device 14 to the storage device 11. Thus, only the write data from the external device 14 can be written in the storage device 11. When it is determined that the move-out data is in response to the write request from the external device 14 by referring to the information setting unit, similarly, the write inhibition instruction unit writes the move-out data to the storage device 11. By outputting the inhibition signal to inhibit the writing of the data portion corresponding to the write data from the external device 14 in the move-out data of the specific block length to the storage device 11, the write control unit 18 moves the data. Out data can be written in the storage device 11 (claims 3 and 11).

Further, when the external device 14 requests the writing of the data of the half size of the specific block length, the buffer storage 13 is controlled by the move-out sequence control unit.
By controlling the moveout sequence from the external device 1
The output timing of the write inhibit signal at the time of writing the write data from 4 and the output timing of the write inhibit signal at the time of writing the moveout data can be made the same, and the write inhibit by the write inhibit instructing section The output control of the signal can be shared by the external write request and the move out (claims 4 and 12).

If the move-out target data in the buffer storage 13 has not been updated, the same data is also held in the storage device 11. Therefore, the move-out is performed only when the target data has been updated. As a result, the move-out process can be simplified (claims 5 and 13). In this case, when the storage controller 15 receives the move-out data from the buffer storage 13, the write controller 18 causes the write controller to move the write-out data from the external device 14 and the move-out data to the external device 14.
By writing to the storage device 11 in combination with a portion that does not correspond to the write data from the storage device 11, the write data from the external device 14 and the moveout data can be written to the storage device 11 as one data block (claim). (6, 14).

However, if the move-out is not performed, the write inhibit signal from the write inhibit instructing unit causes the data block other than the write data from the external device 14 to be included in the data block having the specific block length, as described above. Storage device 11
By suppressing writing to the storage device 11, only the write data from the external device 14 can be written to the storage device 11 by the write control unit 18 (claims 7 and 15).

On the other hand, the move-out is carried out regardless of the update / unupdate of the move-out target data in the buffer storage 13, and the write control section 18 always writes the write-data portion from the external device 14 and the move-out data. By writing to the storage device 11 in combination with a portion that does not correspond to the write data from the external device 14, the write data from the external device 14 and the moveout data can be written to the storage device 11 as one data block. It is possible (claims 8 and 16).

[0039]

Embodiments of the present invention will be described below with reference to the drawings. 2 is a block diagram showing an embodiment of the present invention. In FIG. 2, reference numeral 21 denotes an information processing device (CPU;
Central Processing Unit), 22 is a channel processor (CHP), and 23 is an external device (C
H: CHannel unit), 24 is a storage control unit (MCU; Main)
storage control unit), 25 is a storage device (MSU; Ma
in Storage Unit).

Here, the information processing device 21 is provided with a buffer storage 30 controlled by a store-in method. This buffer storage 30 is similar to that described above with reference to FIG. 12, and has a data section 30a that holds data divided into blocks (a copy of a part of the data in the storage device 25 that can be used by the information processing device 21), and The tag unit (TAG1) 30b holds the tag information including the address of the data held in the data unit 30a.

The tag section 30b is a memory for storing an entry corresponding to each block in the data section 30a on a one-to-one basis. In each entry of the tag section 30b, as shown in FIG. An address on the storage device 25 is stored, and a V (Valid) flag indicating whether or not the entry is valid (a state in which data is stored in the data section 30a) and a V (Valid) flag are stored in the data section 30a. A C (Change) flag indicating whether or not the data has been changed by the information processing device 21 is stored.

In FIG. 2, the buffer storage 30 is used.
Is provided in the information processing device 21, and only the signal system for requesting a store from the external device 23 to the storage device 25 is illustrated, as will be described later. The information processing device 21 also includes registers 21a to 21d. Register 21a
Indicates that the move-out request address (representative address of the data block) from the storage controller 24 is set, and the register 21b sets the representative address of the data block that is moved out from the buffer storage 30. In the register 21c, the data block to be moved out from the buffer storage 30 is set.

The register 21d is composed of one bit or a plurality of bits and functions as an information setting unit. In response to a move-out request from the storage controller 24, a move sent from the information processor 21 to the storage controller 24. Whether the out data is a normal move-out request described later or a move-out request issued in response to a write request from the external device 23 is set as a request type.

On the other hand, the channel processing device 22 is connected to the external device 23 as well as to the storage device 25 via the storage control device 24, and the external device 23 to the storage device 2 is connected.
5 is issued to the storage control device 24 when a fetch / store request for the device 5 is received. As a store request system, a register 22a in which a store request address from the external device 23 is set, and an external device Register 22b to which store request data from 23 is set.

Further, the storage device 25 has a memory section 25a for storing various data and registers 25b to 25d. The register 25b is the memory unit 2
The address of the store data to 5a is set, the register 25c is set to the store data to the memory section 25a, and the register 25d sets the write inhibit signal from the storage controller 24. It is a registered register.

The storage control device 24 of this embodiment is
The data transfer between the storage device 25 and the information processing device 21 and the channel processing device 22 (external device 23) is controlled by a store-in method.
a, data selection circuit 24b, write control circuit 24c, moveout control unit 24d, tag priority unit 24g, and registers 24e, 24f, 24h, 24i, 24.
n, 24p, move-out data buffer 24j, and store data buffer 24k.

Here, the tag copying unit 24a holds a copy of the tag unit 30b in the buffer storage 30, and in each entry of this tag copying unit 24a,
As shown in FIG. 4, together with the data address stored in the buffer storage 30, a V (Valid) flag indicating whether or not the entry is valid is stored.

The data selection circuit 24b selects and outputs either move-out data (store data) from the information processing device 21 or store data from the external device 23 (channel processing device 22). Is.
The write control circuit 24c is for controlling data writing (store) to the storage device 25, and the data selection circuit 2
In addition to the function to switch the data selection state by 4b,
It has a function as a write inhibition instruction unit that outputs a write inhibition signal to be described later to the storage device 5 according to the size of the write data.

Further, the move-out control unit 24d functions as a move-out request issuing unit, and when the store request address from the external device 23 exists in the tag copying unit 24a (hit), the data in the buffer storage 30 is stored. The data in the unit 30a is read out and stored in the storage device 25.
A move-out request for writing to the buffer storage 30 (information processing device 21) is issued. The move-out control unit 24d also functions as a move-out order control unit that controls the move-out order from the buffer storage 30, as will be described later as a modified example of this embodiment.

The register 24e is used by the information processing device 2
The move-out address from 1 is set, the register 24f is set with the store request address from the channel processing device 22, and the tag priority unit 24g is the address held in the registers 24e and 24f. One of (tags) is selected and output. By the tag selection by the tag priority unit 24g, either the writing process according to the move out from the buffer storage 30 or the writing process according to the store request from the external device 23 is selected and executed. Has become.

In the register 24h, the request address selected / output by the tag priority unit 24g is temporarily set, and the request address set in the register 24h is from the external device 23. In this case, the tag search in the tag copying unit 24a is performed. And the register 24i is
Register 2 selected by tag priority unit 24g
The request address after 4h is set as the address of the store request target for the storage device 25.

Further, the moveout data buffer 24
j is for temporarily storing the moveout data from the information processing device 21 (buffer storage 30), and the store data buffer 24k is for temporarily storing the store data from the channel processing device 22. . The register 24m is for setting the move-out request issued from the move-out control unit 24d, and the register 24n is for storing the store data for the storage device 25 selected by the data selection circuit 24b. 24p temporarily stores the move-out request type (information set in the register 21d of the information processing device 21) from the information processing device 21, thereby functioning as an information setting unit.

By the way, in this embodiment, the block size (data length) of the buffer storage 30 is set to, for example, 64 bytes (specific data length), and registers 21c, 22b, 24n for holding moveout data and store data are stored.
The data width of 25c is, for example, 8 bytes, and the buffer 24
The buffer size of j and 24k is, for example, 64 bytes.

Further, it is assumed that writing to the storage device 25 is required in units of 64 bytes, and that store data is sent to the storage device 25 in 8 cycles every 8 bytes. When storing less than 64 bytes of data, a write inhibit signal from the write control circuit 24c is set in the register 25d, and the write inhibit signal is used to set a unit of 8 bytes as described later. Writing of store data can be partially suppressed.

Next, regarding the operation of the present embodiment configured as described above, the flow charts shown in FIGS. 5A, 5B, and 6 will be described with an example in which a 32-byte store request is issued from the external device 23. And the time charts shown in FIGS. 7 to 9 will be described. When the external device 23 requests the storage controller 24 to store 32 bytes of data, which is half the specific block length of 64 bytes [step S1 of FIG. 5A, timing T21 of FIG. 7].
The 32-byte store request address is stored in the storage controller 24 from the register 22a of the channel processor 22.
Is set in the register 24f.

The priority of the address (tag) set in the register 24f is selected by the tag priority unit 24g, and the address is registered in the register 24h.
Is set (see timing T22 in FIG. 7), the address is compared with the address registered in the tag copying section 24a. If there is a tag matching the store address among the tags registered in the tag copying unit 24a, the V flag is set, and the entry is valid, a 64-byte data block including the store address is stored. It is stored in the buffer storage 30. This is called a hit.

When there is a hit in the tag copying section 24a in this way [TAG2 hit; Y in step S2 of FIG. 5 (a)]
In the case of ES determination, refer to timing T23 in FIG. 7]. Since the latest data may be stored in the buffer storage 30, the move-out control unit 24d causes the move-out of the data block to be stored in the buffer storage 30. A request is issued to the information processing device 21 [see step S3 of FIG. 5 (a) and timing T25 of FIG. 7].

Information processing apparatus 2 that has received the move-out request
1, the request is the register 24m of the storage controller 24.
To the register 21c (step S in FIG. 6).
11). Then, the tag portion 30b of the buffer storage 30 is searched based on the move-out request target address (step S12 in FIG. 6), and the buffer storage 3 is searched.
It is checked by referring to the C flag in the corresponding entry whether or not the move-out request target data registered in the 0 data section 30a is updated (step S13 in FIG. 6).

If the C flag is valid (YES in step S13), the latest data of the corresponding data block is held in the buffer storage 30, so that the storage controller 24 is transferred from the register 21b to the register 21b. Move out request (address) through 24e
Is issued (see step S14 in FIG. 6 and timing T27 in FIG. 7).

In this case, information (predetermined value) indicating that the move-out request is a move-out request accompanying the store request from the external device 23 is set in the register 21d as the request type, and the move-out request is processed. Device 2
1 to the storage controller 24, the request type is changed from the register 21d to the register 24 of the storage controller 24.
Set to p.

The information processing device 21 stores the predetermined data stored in its own buffer storage 30 into the storage device 2.
In some cases, a move-out request is issued in order to write the data in the No. 5, but at that time, information (predetermined value) indicating that the move-out process is a normal move-out process is set in the register 21d as the request type. Then, the register 21d is set in the register 24p of the storage controller 24.

In any of the above types of move-out requests, the move-out request target data (move-out data) is passed from the register 21a to the move-out data buffer 24j of the storage controller 24. This move-out data has a specific block length of 64 bytes. If the C flag of the corresponding entry referred to by the tag unit 30b is invalid (NO in step S13), the data for the moveout request in the buffer storage 30 is stored in the storage device 25. Since it is exactly the same as the one, move out processing is unnecessary,
In this embodiment, a request indicating that the move-out process is not performed is issued to the storage controller 24 (step S15 in FIG. 6). In this case, since there is no data to be written in the storage device 25 due to the processing associated with the request, the register 2
Whether the value indicating the request type set in 1d or 24p is a value indicating a normal process or a value indicating a process (response process) according to a store request from the external device 23, the storage controller The processing performed by 24 remains unchanged.

By the way, conventionally, when the store request address from the external device 23 is hit in the tag copying section 24a of the storage control device 24, the latest data exists in the buffer storage 30 and the latest data is moved from the information processing device 21. When performing the out, the move-out process is performed on the storage device 25, and then the 32-byte store from the channel processing device 22 is performed on the storage device 25 (see FIG. 14). Further, when there is no move-out from the information processing device 21, a 32-byte store from the channel processing device 22 is performed to the storage device 25 by receiving a response to that effect from the information processing device 21. .

On the other hand, in the present embodiment, the store request data from the external device 23 is sent to the storage device 2 in parallel with the move out control unit 24d issuing the move out request.
5, the write control circuit 24c executes a store request to the storage device 25 [FIG. 5 (a)].
Step S4 of FIG. 7, timing T24 in FIG. 7]. Stored data from the channel processing device 22 is stored in the register 22.
After being temporarily stored in the store data buffer 24k from b, the write control circuit 24c stores the data in 32 bytes in units of 8 bytes.
The bytes are read and sent to the register 25c of the storage device 25 through the register 24n. In addition, the store request address is stored in the register 2 after the search in the tag copying unit 24a.
4h is set in the register 24i, and further set in the register 25b of the storage device 25, and a 64-byte store is requested to the storage device 25 based on the address.

At this time, the data to be actually stored is 3
Since it is 2 bytes, for example, as shown in FIG. 8, during the first 4τ, the write inhibit signal output from the write control circuit 24c (write inhibit instruction unit) to the storage device 25 and set in the register 25d is set. By invalidating and enabling the write inhibit signal during 4τ in the latter half, the writing of the latter half data to the storage device 25 is inhibited.

Therefore, of the 64-byte data block in the storage device 25, only the first 32-byte data requested to be stored by the external device 23 is destroyed without destroying the portion other than the store data from the external device 23. It is written in the memory unit 25a of the storage device 25 [FIG.
Step S4, timing T26 in FIG. 7]. Note that 1τ is one control cycle, and 8 bytes are written during this 1τ.

When the writing of the store data from the external device 23 is completed in this way, a storage completion notification is transmitted from the storage control device 24 to the channel processing device 22 [FIG.
Step S5 of (a), see timing T31 in FIG. 7] As compared with the conventional case (see timing T12 in FIG. 14), the store completion notification can be sent to the channel processing device 22 extremely quickly.

When there is a move-out request from the information processing device 21 to the storage controller 24, the move-out request (address) is set in the register 24e, and the type of the move-out request is registered. 24p [Step S6 of FIG. 5 (b)]
Refer to timing T27 in FIG. 7]. When the priority of the move-out request address set in the register 24e is selected by the tag priority unit 24g and the address is set in the register 24i (see timing T28 in FIG. 7), the move-out data buffer 24j is transferred from the register 21c. The move-out data from the information processing device 21 temporarily stored in the storage device 25 is read by the write control circuit 24c for 32 bytes in units of 8 bytes, and is transferred to the register 2 of the storage device 25 through the register 24n.
5c. Further, the move-out destination address is from the register 24i to the register 25b of the storage device 25.
, And a 64-byte store is requested to the storage device 25 based on the address (see timing T29 in FIG. 7).

At this time, if normal move-out processing is performed and 64 bytes of data are stored in the storage device 25, the stored data from the channel processing device 22 previously stored at timing T26 in FIG. 7 is destroyed. Will end up. Therefore, in this embodiment, when the storage controller 24 performs the move-out process, the value of the request type set in the register 24p is referred to, and the move-out process this time is performed by the channel processor 22 (external device 23). ) To determine whether or not the request is for a store request (FIG. 5).
Step S7 of (b)].

When the value of the register 24p indicates the move-out process in response to the store request from the channel processing device 22 (YES in step S7), for example, as shown in FIG. During 4τ, the channel processor 22 is enabled by enabling the write inhibit signal.
Writing of the first half 32 bytes of data corresponding to the store data from the storage device 25 to the storage device 25 is suppressed.

During the latter half 4τ, the write inhibition signal is invalidated and the remaining (the latter half) 32-byte latest data of the 64-byte data block is written in the memory unit 25a of the storage device 25. Therefore, of the 64-byte data block in the storage device 25, the 64 blocks that have been moved out of the information processing device 21 without destroying the portion of the stored data from the external device 23 that was previously stored.
Only the latter half of the bytes of the latest data is written in the memory unit 25a of the storage device 25 [reverse store processing of step S8 of FIG. 5B, see timing T30 of FIG. 7].

When the value of the register 24p indicates the normal move-out process (NO in step S7), the normal move-out process in which the write inhibit signal is not issued is executed, and the information processing is performed. The 64-byte move-out data from the device 21 is stored as it is in the memory unit 25a of the storage device 25 [step S of FIG. 5 (b)].
9].

Further, when there is no tag that matches the store address from the external device 23 among the tags held in the tag copying section 24a [TAG2 mishit; FIG. 5 (a)]
If NO is determined in step A2 of No.], the buffer storage 30 does not hold the data to be stored, and therefore the process immediately shifts to step S4 in FIG.
A request to store 32 bytes of data is issued to the storage device 5, and 32 bytes of data is stored in the storage device 25.

Also at this time, similarly to the example shown in FIG. 8, the write inhibit signal is invalidated during the first 4τ, and the write inhibit signal is enabled during the latter 4τ, so that the latter half of the 4τ is enabled. By suppressing the writing of data to the storage device 25,
Of the 64-byte data block in the storage device 25, only the first 32-byte data requested to be stored by the external device 23 is stored in the memory of the storage device 25 without destroying the portion other than the store data from the external device 23. Part 2
Write to 5a.

Thus, according to one embodiment of the present invention,
When the store request from the external device 23 changes and holds the data portion of the store request target in the buffer storage 30, the store process from the external device 23 to the storage device 25 is executed in parallel with the issue of the moveout request. Therefore, the write request from the external device 23 can be executed without waiting unnecessarily, the deterioration of the write performance from the external device 23 is suppressed, and the processing speed is significantly improved.

At this time, even if the stored data from the external device 23 is less than 64 bytes (specific block length),
As described above, only the store data is stored in the storage device 25.
Then, the latest data of the part of the move-out data that does not correspond to the store data from the external device 23 is written to the storage device without destroying the store data from the external device 23.

Therefore, the processing time required to store data of less than the specific block length (64 bytes in this case) can be completed at least in the time equivalent to the write processing time by the store-through method, and the channel processing device 22 (external) The store completion notification to the device 23) can be promptly issued. Even if the moveout is not performed from the buffer storage 30, before the request indicating that the moveout process is not performed is returned from the information processing device 21 as a response, as shown in FIG.
The store from No. 2 can be executed, and the store completion notification to the channel processing device 22 can be sent earlier.

In the above-described embodiment, the case where the external device 23 requests the data storage of 32 bytes, which is half the specific block length of 64 bytes, has been described.
The present invention is not limited to this, and if there is a store request for data in 8-byte units, which is smaller than the specific block length of 64 bytes, the write inhibit signal is output in the same manner as described above, thereby making it possible to realize the above-mentioned embodiment. The same effect can be obtained.

For example, FIG. 10 shows the valid / invalid timing of the write inhibit signal for each data length when the store data from the external device 23 is 32, 16 and 8 bytes.
In FIG. 10, "0" indicates that writing to storage device 25 is not inhibited, that is, store is executed, and "1" indicates that writing to storage device 25 is inhibited. As shown in the upper part of FIG. 10, when the store data from the external device 23 is 32 bytes (the same as the above-mentioned embodiment), during the store process from the channel processing device (CHP) 22, the latter half 4τ. , The write inhibit signal is validated, and during the move out process from the information processing device (CPU) 21,
During the first half 4τ, the write inhibit signal is enabled.

When the store data from the external device 23 is 16 bytes, as shown in the middle part of FIG.
During the CHP store processing, the write inhibit signal is valid during the latter half 6τ, and during the CPU moveout processing, the write inhibit signal is valid during the first half 2τ. Further, when the store data from the external device 23 is 8 bytes, as shown in the lower part of FIG. 10, the write inhibit signal is enabled during the latter half 7τ during the CHP store processing, and the first half during the CPU moveout processing. The write inhibit signal is enabled for 1τ.

In the above-described embodiment, the tag section 30b is used.
If the update bit (C flag) is invalid, the memory controller 24 issues a request indicating that the move-out process is not to be performed. It may be executed regardless of the validity / invalidity of the update bit (C flag) in 30b. In this case, 3 from the channel processor 22
At the time of 2-byte store, the write inhibit signal is not enabled, that is, the write inhibit control can be made unnecessary. However, during the move-out process from the information processing device 21, the write inhibition is performed at the timing described with reference to FIG. 9 so that the data part previously written by the store access from the channel processing device 23 is not overwritten and erased. The signal is validated and write inhibition control is performed.

By the way, when the data length of the store data from the external device 23 is half (32 bytes) of the specific block length (64 bytes) as in the above-mentioned embodiment, the move out order from the buffer storage 30 is set. By providing the move-out control unit 24d with a function as a move-out sequence control unit for controlling, the following control can be performed.

That is, by using the function as the move-out sequence control unit, the store address from the channel processing device 22 is sent as the address (the first 32 bytes) when the information processing device 21 is requested to perform the move-out operation. By pushing out the data to be out from the buffer storage 30 in the latter half 32 bytes first, the write inhibit signal when writing the move-out data to the storage device 25 can be made valid only in the latter half 4τ (32 bytes). .

Thus, the output timing of the write inhibit signal when writing the store data from the external device 23 to the storage device 25 and the write inhibit signal when writing the moveout data from the buffer storage 30 to the storage device 25. It is also possible to make the output timing of the same. In addition,
The information processing device 21 can change the order of move-out data.
Instead of changing the store address to be sent to the storage controller 24, the order of erasing data from the move-out data buffer 24j in the storage controller 24 and the order of addresses transferred to the storage device 25 can be changed.

As described above, when the stored data from the external device 23 is half of the specific block length, the output control of the write inhibit signal is controlled by the external write request by controlling the move-out order. There is an advantage that the output can be shared and the output control can be simplified. On the other hand, the store processing from the channel processing device 22 to the storage device 25 waits for the move-out data from the information processing device 21 to be stored in the move-out data buffer 24j, and then the write control circuit 24c displays the data in FIG. By controlling the data selection circuit 24b at the timing shown, the store data from the store data buffer 24k and the move-out data from the move-out data buffer 24j are selected and combined to make a 64-byte data (one data block). The store can also be performed in the storage device 25.

In this case, it is not necessary to control and validate the write inhibit signal to the storage device 25, and the store data and move out data from the external device 23 are combined into one without using the write inhibit signal. Storage device as data block 25
Can be written in, and the control system and control method can be simplified. At this time, the move-out process from the information processing device 21 is performed by the update bit (C
By executing it regardless of whether the flag) is enabled or disabled,
The write data from the external device 23 and the move-out data are always written in the storage device 25 as one data block without enabling the write inhibit signal at all, that is, without using the write inhibit signal at all. Therefore, the control system and control method can be greatly simplified.

Although the specific block length is 64 bytes in the above-mentioned embodiment, the present invention is not limited to this.

[0088]

As described above in detail, according to the storage control method and the storage control device in the information processing system of the present invention, when a write request is made from an external device, the data portion of the write request is buffered. When it is held in the storage, the writing process from the external device to the storage device is executed in parallel with the issuance of the moveout request, so that the writing request from the external device can be executed without wastefully waiting, It is possible to obtain the effect that the deterioration of the writing performance from the external device is suppressed and the processing speed is significantly improved (claims 1 and 9).

When the write data from the external device is shorter than the specific block length, only the write data is written in the storage device, and only the portion of the moveout data other than the write data from the external device is stored in the storage device. By writing to the memory device, the move-out data is written to the storage device without destroying the write data from the external device, and the processing time required for the data write request less than the specific block length is
It can be completed at least in the time equivalent to the write processing time by the store-through method (claims 2 and 10).

At this time, by inhibiting the writing of the portion of the data block other than the write data from the external device to the storage device, the portion other than the write data from the external device is not destroyed from the external device. Only the write data from the external device is written to the storage device, and the write data from the external device is prevented by suppressing the writing of the data portion of the moveout data corresponding to the write data from the external device to the storage device. The move-out data is written in the storage device without being destroyed, and the processing time required to write the data smaller than the specific block length can be completed at least in a time equivalent to the write processing time by the store-through method ( Claim 3,
11).

Furthermore, when the write data from the external device is half of the specific block length, the move-out order is controlled so that the write-inhibit signal output control by the write-inhibit instruction section is externally written. The request and the moveout can be shared, and the output control can be simplified (claims 4 and 12). Further, by executing the move-out only when the target data has been updated, unnecessary move-out processing is not required, and the move-out processing can be simplified (claims 5 and 13).

In this case, when the move-out data is received, the write data part from the external device and the part of the move-out data that does not correspond to the write data from the external device are combined and written in the storage device. The write data from the external device and the move-out data can be written in the storage device as one data block without using the write inhibit signal, and the control system and control method can be simplified (claims 6 and 14). .

If the move-out is not performed, the write inhibit signal inhibits the writing of a portion of the data block other than the write data from the external device to the storage device, and Only the write data from the external device can be written in the storage device without destroying the parts other than the write data from the device (claims 7 and 15). on the other hand,
The moveout is performed regardless of whether the data to be moved out is updated or not, and the storage device is always a combination of a write data portion from the external device and a portion of the moveout data that does not correspond to the write data from the external device. By writing to the memory device, the write data from the external device and the move-out data can always be written to the storage device as one data block without using the write inhibit signal at all, greatly simplifying the control system and control method. It is possible (claims 8 and 16).

[Brief description of drawings]

FIG. 1 is a principle block diagram of the present invention.

FIG. 2 is a block diagram showing an embodiment of the present invention.

FIG. 3 is a diagram showing entry contents of a tag part (TAG1) of the present embodiment.

FIG. 4 is a diagram showing entry contents of a tag copying unit (TAG2) of this embodiment.

5A and 5B are flowcharts for explaining the operation of the storage control unit (MCU) of this embodiment.

FIG. 6 is a flowchart for explaining the operation of the processing device (CPU) of this embodiment.

FIG. 7 is a time chart for explaining the operation of this embodiment.

FIG. 8 is a time chart for explaining the operation of this embodiment.

FIG. 9 is a time chart for explaining the operation of the present embodiment.

FIG. 10 is a diagram for explaining an output example of a write inhibit signal in the present embodiment.

FIG. 11 is a time chart for explaining the operation of the modified example of the present embodiment.

FIG. 12 is a block diagram showing a configuration of a general information processing system.

FIG. 13 is a flowchart for explaining a processing operation of a storage control device in a general information processing system.

FIG. 14 is a time chart for explaining a processing operation of a storage control device in a general information processing system.

[Explanation of symbols]

11 Storage Device 12 Processing Device 13 Buffer Storage 14 External Device 15 Storage Control Device 16 Tag Copying Unit 17 Moveout Request Issuing Unit 18 Writing Control Unit 21 Processing Devices 21a to 21c Registers 21d Register (Information Setting Unit) 22 Channel Processing Device 22a , 22b register 23 external device 24 storage controller 24a tag copying unit 24b data selection circuit 24c write control circuit (write inhibition instruction unit) 24d moveout control unit (moveout request issuing unit, moveout order control unit) 24e, 24f, 24h, 24i, 24n register 24j move out data buffer 24k, store data buffer 24p register (information setting unit) 25 storage device 25a memory unit 25b to 25d register 30 buffer storage 30a data unit 30b Tag section

Claims (16)

[Claims] 1. A storage device, a processing device that operates based on data in the storage device, and a store-in type buffer storage that holds a copy of part of the data in the storage device that can be used by the processing device. A storage control method in an information processing system having an external device connected to an external device, the data part of the storage device being a target of the write request when a write request to the storage device is received from the external device. Is held in the buffer storage, the move-out request for reading the corresponding data portion of the buffer storage and writing it in the storage device is issued to the buffer storage in parallel with the external device. The write control data according to the write request is written in the storage device. 2. A write request from the external device when read / write processing among the storage device, the processing device and the buffer storage is performed in a data block unit of a predetermined specific block length. When the data length of the write data associated with is shorter than the specific block length, only the write data from the external device is written to the storage device and read from the buffer storage in response to the moveout request. 2. The storage control method in the information processing system according to claim 1, wherein only the part of the move-out data other than the write data from the external device is written to the storage device. 3. When the write data from the external device is written to the storage device in data block units of the specific block length, a portion of the data block of the specific block length other than the write data from the external device. Is written to the storage device by outputting a write inhibit signal to the storage device, and when the moveout data from the buffer storage is written to the storage device, the moveout of the specific block length is performed. 3. A write inhibit signal is output to the storage device to inhibit the portion of the data corresponding to the write data from the external device from being written to the storage device. A storage control method in the described information processing system. 4. When the data length of the write data from the external device is half the specific block length, the moveout order from the buffer storage is controlled, and the write data from the external device is stored. 4. The output timing of the write inhibit signal when writing to the device and the output timing of the write inhibit signal when writing the moveout data from the buffer storage to the storage device are the same. A storage control method in the described information processing system. 5. The relevant data portion is read as move-out data only when the relevant data portion of the buffer storage has been updated.
A storage control method in the described information processing system. 6. When the corresponding data portion is read out as move-out data from the buffer storage, the write data portion from the external device and the write-out data from the external device out of the move-out data from the buffer storage. The storage control method in an information processing system according to claim 5, wherein the storage device is written in combination with a portion that does not correspond to the embedded data. 7. When moveout data is not read from the buffer storage, a portion of the data block of the specific block length other than the write data from the external device is written to the storage device, 7. The storage control method in an information processing system according to claim 6, wherein write data from the external device is written to the storage device while outputting and suppressing a write inhibition signal to the storage device. . 8. A combination of a write data portion from the external device and a portion of the moveout data from the buffer storage that does not correspond to the write data from the external device is written to the storage device. The storage control method in the information processing system according to claim 2. 9. A storage device and a processing device that operates based on data in the storage device, and a data section that holds a copy of part of the data in the storage device that can be used by the processing device; In an information processing system having a buffer storage including a tag unit that holds tag information including an address of data held in a data unit, and connecting an external device to the storage device, the buffer storage, and the external device. A storage control device for controlling data transfer between data storage devices by a store-in method, which reads a data in a tag copying unit that holds a copy of a part or all of the tag unit of the buffer storage and a data unit of the buffer storage. Move-out request issuing unit that issues a move-out request for writing to the storage device to the buffer storage A write control unit that controls writing of data to the storage device, and at the time of receiving a write request to the storage device from the external device, sets an address of the data to be the write request. When the tag information including the tag information is held in the tag copying unit, the move-out request issuing unit issues a move-out request for reading the data portion corresponding to the tag information from the buffer storage and writing the data portion in the storage device. In the information processing system, the write control unit writes write data in response to a write request from the external device to the storage device in parallel with issuing to the buffer storage. Storage controller. 10. A write request from the external device when read / write processing among the storage device, the processing device and the buffer storage is performed in data block units of a predetermined specific block length. When the data length of the write data accompanying the write is shorter than the specific block length, the write control unit writes only the write data from the external device to the storage device, and the move out request issuing unit issues the write data. 10. The move-out data read from the buffer storage in response to the generated move-out request, only the part other than the write data from the external device is written to the storage device. Storage device in the information processing system of. 11. An information setting unit configured to set information indicating that a move-out request is issued by the move-out request issuing unit in response to a write request from the external device, and to the storage device. A write inhibition instruction section for outputting a write inhibition signal for inhibiting writing of data to the storage device, and the write control section specifies the write data from the external device. When writing to the storage device in data block units of block length, the write inhibition instruction section outputs a write inhibition signal to the storage device, and the data block of the specific block length from the external device is output. A portion other than the write data is prevented from being written in the storage device, and when the write control unit writes the moveout data from the buffer storage to the storage device, the moveout data is When it is set in the information setting unit that it is in response to a write request from an external device, the write inhibition instruction unit outputs a write inhibition signal to the storage device, and the identification 11. The storage control device in the information processing system according to claim 10, wherein a portion of the block-length moveout data corresponding to write data from the external device is prevented from being written in the storage device. 12. A move-out sequence control unit for controlling a move-out sequence from the buffer storage is provided, and when the data length of write data from the external device is half the specific block length, the move-out sequence is performed. An order control unit controls the move-out order from the buffer storage, and outputs the write inhibit signal from the write inhibit instruction unit when writing the write data from the external device to the storage device; 12. The information processing system according to claim 11, wherein the move-out data from the buffer storage is written to the storage device at the same output timing of the write inhibit signal from the write inhibit instructing unit. Storage controller in. 13. The storage control device in an information processing system according to claim 10, wherein the move-out from the buffer storage is performed only when the move-out target data in the buffer storage is updated. 14. When receiving the move-out data from the buffer storage, the write control unit writes the write data portion from the external device and the write-out data from the external device out of the move-out data from the buffer storage. 14. The storage control device in the information processing system according to claim 13, wherein the storage control device is written in the storage device in combination with a portion that does not correspond to the embedded data. 15. When the move-out from the buffer storage is not performed, the write inhibition instruction section outputs a write inhibition signal to the storage device to output one of the data blocks of the specific block length. The write control unit writes the write data from the external device to the storage device while suppressing a portion other than the write data from the external device from being written to the storage device. Claim 14
A storage controller in the information processing system described. 16. The write control unit combines the write data portion from the external device with a portion of the moveout data from the buffer storage that does not correspond to the write data from the external device. The storage control device in the information processing system according to claim 10, wherein the storage control device writes data in a storage device.