JPH08115056A - Display device - Google Patents

Display device

Info

Publication number
JPH08115056A
JPH08115056A JP24933594A JP24933594A JPH08115056A JP H08115056 A JPH08115056 A JP H08115056A JP 24933594 A JP24933594 A JP 24933594A JP 24933594 A JP24933594 A JP 24933594A JP H08115056 A JPH08115056 A JP H08115056A
Authority
JP
Japan
Prior art keywords
current
input terminals
terminal
light emitting
luminance
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP24933594A
Other languages
Japanese (ja)
Other versions
JP3354317B2 (en
Inventor
Mitsuhiro Bizen
充弘 尾前
Hidenori Hirao
英紀 平尾
Fukuji Higuchi
福司 樋口
Akiyoshi Sudo
彰良 須藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokyo Sanyo Electric Co Ltd
Sanyo Electric Co Ltd
Original Assignee
Tokyo Sanyo Electric Co Ltd
Tottori Sanyo Electric Co Ltd
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Sanyo Electric Co Ltd, Tottori Sanyo Electric Co Ltd, Sanyo Electric Co Ltd filed Critical Tokyo Sanyo Electric Co Ltd
Priority to JP24933594A priority Critical patent/JP3354317B2/en
Publication of JPH08115056A publication Critical patent/JPH08115056A/en
Application granted granted Critical
Publication of JP3354317B2 publication Critical patent/JP3354317B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item

Landscapes

  • Led Device Packages (AREA)
  • Led Devices (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Control Of El Displays (AREA)

Abstract

PURPOSE: To provide a display device easy for adjusting luminance and capable of miniaturizing by connecting a metallic terminal with a metallic fine wire of a prescribed combination, selecting a prescribed current and making the current when all input terminals are connected by the metallic fine wires the same as the current when all input terminals are opened. CONSTITUTION: The current is selected by connecting the input terminals of one combination to the metallic fine wires 30-32 in a current selection means 18, and a drive current is supplied to a light emitting diode 14 according to the current. Then, the luminance is measured, and when the luminance is low, the input terminal of other combination is connected to the metallic fine wires 30-32 so as to select the current of the current selection means 18 for increasing the drive current. In such a manner, by combining the input terminals to the prescribed metallic fine wires 30-32, the required current is selected, and the required luminance is obtained easily. Further, the current connecting and selecting all input terminals to the metallic fine wires 30-32 is made the same as the current opening and selecting the input terminal. Thus, two ways of luminance adjustment are performed, and convenience is improved.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は発光ダイオードを有する
表示装置に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a display device having a light emitting diode.

【0002】[0002]

【従来の技術】従来、発光ダイオードを有する表示装置
が例えば実開昭62−83640号公報に開示され、そ
れを図5のブロック図に従い説明する。図5に於て、シ
フトレジスタ61にデータが供給され、そのデータがラ
ッチ回路62を介して駆動手段63に送られている。電
流供給手段64から出力電流が駆動手段63に供給され
駆動手段63から駆動電流が発光ダイオードアレイ65
に供給され、発光ダイオード66が選択的に点灯されて
いる。そして、電流供給手段64内には、可変抵抗器6
7が設けられ、それを調整する事により出力電流を増減
し、発光ダイオードアレイ65の輝度調整を行ってい
る。
2. Description of the Related Art Conventionally, a display device having a light emitting diode is disclosed in, for example, Japanese Utility Model Laid-Open No. 62-83640, which will be described with reference to the block diagram of FIG. In FIG. 5, data is supplied to the shift register 61, and the data is sent to the driving means 63 via the latch circuit 62. The output current is supplied from the current supply means 64 to the drive means 63, and the drive current is supplied from the drive means 63 to the light emitting diode array 65.
And the light emitting diode 66 is selectively turned on. The variable resistor 6 is provided in the current supply means 64.
7 is provided, the output current is increased or decreased by adjusting it, and the brightness of the light emitting diode array 65 is adjusted.

【0003】[0003]

【発明が解決しようとする課題】しかし上述の表示装置
では、最初に可変抵抗器67を任意値に設定し、発光ダ
イオード66を全数点灯し、輝度測定を行っている。そ
して、その輝度が所望値にならない場合は、可変抵抗器
67を再び調整し同じ動作を繰り返している。この様
に、可変抵抗器67を試行錯誤により調整し輝度調整を
行っているので、少なくとも3〜4回の抵抗調整が必要
となる欠点がある。更に、可変抵抗器67は比較的大き
なスペースを必要とし、表示装置が小型化出来ない欠点
がある。故に本発明はこの様な従来の欠点を考慮して、
輝度調整し易い、かつ小型化出来る表示装置を提供する
ものである。
However, in the above-described display device, first, the variable resistors 67 are set to arbitrary values, all the light emitting diodes 66 are turned on, and the luminance is measured. When the brightness does not reach the desired value, the variable resistor 67 is readjusted and the same operation is repeated. As described above, since the variable resistor 67 is adjusted by trial and error to adjust the brightness, there is a drawback that the resistance adjustment needs to be performed at least 3 to 4 times. Further, the variable resistor 67 requires a comparatively large space and has a drawback that the display device cannot be downsized. Therefore, the present invention takes such a conventional defect into consideration,
It is an object of the present invention to provide a display device in which the brightness can be easily adjusted and the size can be reduced.

【0004】[0004]

【課題を解決するための手段】本発明は上述の課題を解
決するために、電流選択手段と、電流選択手段で選択さ
れた電流に応じて駆動電流を発光ダイオードに供給する
駆動手段とを備え、電流選択手段は所定の組合せの入力
端子を金属細線に接続する事により所定の電流を選択
し、全ての入力端子を金属細線で接続した時の電流と、
全ての入力端子を開放した時の電流を同一に設けるもの
である。
In order to solve the above-mentioned problems, the present invention comprises a current selecting means and a driving means for supplying a driving current to a light emitting diode according to the current selected by the current selecting means. , The current selection means selects a predetermined current by connecting a predetermined combination of input terminals to a metal thin wire, and a current when all input terminals are connected by a metal thin wire,
The current is the same when all the input terminals are opened.

【0005】[0005]

【作用】本発明は上述の様に、電流選択手段に於て1つ
の組合せの入力端子を金属細線に接続する事により電流
を選択し、その電流に応じて発光ダイオードに駆動電流
を供給する。そして輝度測定し、もし低輝度ならば駆動
電流を上げるために電流選択手段の電流を選択する様
に、他の組合せの入力端子を金属細線に接続する。この
様に入力端子を所定の金属細線に組合せる事により、所
望の電流を選択でき所望の輝度が容易に得られる。
As described above, the present invention selects a current by connecting one combination of input terminals to a thin metal wire in the current selecting means, and supplies a drive current to the light emitting diode according to the current. Then, the luminance is measured, and if the luminance is low, the input terminal of another combination is connected to the metal thin wire so that the current of the current selecting means is selected to increase the drive current. In this way, by combining the input terminal with a predetermined thin metal wire, a desired current can be selected and a desired brightness can be easily obtained.

【0006】更に、入力端子を全て金属細線に接続し選
択した電流と、入力端子を開放し選択した電流を同一に
する。故に、入力端子を全て金属細線に接続し遂次金属
細線を切断し輝度調整する方法と、入力端子を開放し遂
次金属細線を接続し輝度調整する方法の2通りが行な
え、利便性が向上する。
Further, all the input terminals are connected to the thin metal wires and the selected current is made equal to the selected current by opening the input terminal. Therefore, the convenience can be improved by two methods, one is to connect all the input terminals to the thin metal wires and cut the thin metal wires to adjust the brightness, and the other is to open the input terminal and connect the thin metal wires to adjust the brightness. To do.

【0007】[0007]

【実施例】以下に本発明の基になる参考例を図1と図2
に従い説明する。図1は本参考例に係る表示器の断面
図、図2は図1のAA断面図である。これらの図に於
て、放熱体1は例えばアルミニウムの押出し材等の熱伝
導度の高い材質からなり、長尺のものである。基板2は
放熱体1上に設けられ、例えばセラミック混合樹脂等か
らなり表面に導電パターン3、4、5、6が形成され、
その大きさは例えば長さが約227mm、幅が約13m
m、厚さが約1mmの長尺のものである。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Reference examples based on which the present invention is based are shown in FIG. 1 and FIG.
Follow the explanation below. FIG. 1 is a sectional view of a display device according to the present reference example, and FIG. 2 is a sectional view taken along the line AA of FIG. In these figures, the radiator 1 is made of a material having a high thermal conductivity, such as an extruded aluminum material, and is long. The substrate 2 is provided on the radiator 1 and is made of, for example, ceramic mixed resin or the like, and the conductive patterns 3, 4, 5, 6 are formed on the surface thereof.
The size is, for example, about 227 mm in length and about 13 m in width.
m, and the length is about 1 mm.

【0008】発光ダイオードアレイ7は、例えば砒化ガ
リウムからなる半導体基板上に燐化ガリウム砒素からな
るエピタキシャル層が形成されたものである。発光ダイ
オードアレイ7は表面に1列又は千鳥配置の2〜3列に
整列された発光領域(発光ダイオード)と、それにオー
ミック接触された個別電極と、裏面に共通電極(いずれ
も図示せず)が形成されている。1個の発光ダイオード
アレイ7の表面には、例えば約125μmのピッチで6
4個の発光領域が整列しており、その大きさは長さが約
8mm、幅が約2mm、厚さが約0.35mmである。
複数の発光ダイオードアレイ7が各々近接して基板2の
長尺方向に整列する様に、基板2の導電パターン3上に
導電性接着剤を介して固着されている。
The light emitting diode array 7 is formed by forming an epitaxial layer made of gallium arsenide phosphide on a semiconductor substrate made of gallium arsenide, for example. The light-emitting diode array 7 has light-emitting regions (light-emitting diodes) arranged on the front surface in one row or in two or three rows in a zigzag pattern, individual electrodes ohmic-contacted with the light-emitting areas, and a common electrode (neither shown) on the back surface. Has been formed. On the surface of one light emitting diode array 7, for example, at a pitch of about 125 μm, 6
The four light emitting regions are aligned, and the size thereof is about 8 mm in length, about 2 mm in width, and about 0.35 mm in thickness.
A plurality of light emitting diode arrays 7 are fixed on the conductive pattern 3 of the substrate 2 via a conductive adhesive so that the light emitting diode arrays 7 are closely arranged and aligned in the longitudinal direction of the substrate 2.

【0009】集積回路素子8は基板2の導電パターン4
上に絶縁性接着剤を介して固着され一方が金属細線によ
り発光ダイオードアレイ7に配線され、他方が導電パタ
ーン5、6に配線されている。
The integrated circuit element 8 is a conductive pattern 4 on the substrate 2.
One is wired to the light emitting diode array 7 by a thin metal wire, and the other is wired to the conductive patterns 5 and 6, which are fixed to each other via an insulating adhesive.

【0010】支持体9は基板2上に配置され、例えばポ
リブチレンテレフタレート樹脂からなり、上面に透孔と
側面の適所に凸部10が形成されている。レンズアレイ
11は支持体9の透孔に配置され接着剤にて固着され、
短焦点ロッドレンズアレイからなるものである。固定具
12は側面の孔が凸部10に挿入する事により、放熱体
1と基板2と支持体9を一体的に固定するものであり、
例えばステンレス板からなる。これらの部材により、本
参考例の表示器13が構成されている。
The support 9 is arranged on the substrate 2, is made of, for example, polybutylene terephthalate resin, and has a through hole on the upper surface and projections 10 formed at appropriate positions on the side surfaces. The lens array 11 is arranged in the through hole of the support 9 and fixed by an adhesive,
It is composed of a short focus rod lens array. The fixture 12 is for integrally fixing the radiator 1, the substrate 2, and the support body 9 by inserting the holes on the side faces into the convex portions 10.
For example, it is made of a stainless plate. The display 13 of this reference example is configured by these members.

【0011】次に、本発明の実施例を図3と図4に従い
説明する。図3は本実施例に係る表示装置のブロック
図、図4は図3の要部詳細図である。これらの図に於
て、発光ダイオードアレイ7は上述の様に例えば64個
の発光ダイオード14からなり各々の発光ダイオードア
レイ7に各々の集積回路素子8が配線されている。
Next, an embodiment of the present invention will be described with reference to FIGS. FIG. 3 is a block diagram of the display device according to the present embodiment, and FIG. 4 is a detailed view of essential parts of FIG. In these figures, the light emitting diode array 7 is composed of, for example, 64 light emitting diodes 14 as described above, and each integrated circuit element 8 is wired to each light emitting diode array 7.

【0012】集積回路素子8内のシフトレジスタ15は
直列して供給されたデータ、すなわち点灯又は非点灯を
指示する2進数を並列に出力するものである。ラッチ回
路16はシフトレジスタ15に接続され、データを貯蔵
している。アンドゲート17はラッチ回路16からのデ
ータとストロボ信号が入力され、点灯信号を出力するも
のである。
The shift register 15 in the integrated circuit element 8 outputs data supplied in series, that is, binary numbers instructing lighting or non-lighting in parallel. The latch circuit 16 is connected to the shift register 15 and stores data. The AND gate 17 receives the data and the strobe signal from the latch circuit 16 and outputs a lighting signal.

【0013】電流選択手段18は例えば3個の入力端子
19、20、21が設けられ、各々の入力端子19、2
0、21に近接して端子22、23、24が設けられ、
共に接地されている。各入力端子19、20、21には
電圧設定回路25、26、27が接続されている。各入
力端子19、20、21に論理回路28が接続され、7
個の出力線が接続されている。各出力線はトランジスタ
29を介して、各々抵抗R1〜R7に接続されている。
そして抵抗R1〜R7の抵抗値は例えば各々が標準値±
0%、−10%、−30%、−20%、+10%、+3
0%、+20%になる様に製造者が事前に知り得た値に
設定されている。
The current selection means 18 is provided with, for example, three input terminals 19, 20 and 21, and the respective input terminals 19 and 2 are provided.
Terminals 22, 23, 24 are provided close to 0, 21,
Both are grounded. Voltage setting circuits 25, 26, 27 are connected to the respective input terminals 19, 20, 21. A logic circuit 28 is connected to each of the input terminals 19, 20, 21 and
Output lines are connected. Each output line is connected to the resistors R1 to R7 via the transistor 29.
The resistance values of the resistors R1 to R7 are, for example, standard values ±
0%, -10%, -30%, -20%, + 10%, +3
It is set to a value that the manufacturer can know in advance so that it becomes 0% or + 20%.

【0014】上述の電流選択手段18に於て、各入力端
子19、20、21と端子22、23、24は所定の組
合せによって、金属細線30、31、32にて接続され
ている。図3に於て、最初の集積回路素子8では、金属
細線30、31、32が全て接続され、3番目の集積回
路素子8では、入力端子19、20、21が全て開放し
ている。そして図4に於て入力端子19、20、21が
開放していると、入力端子19、20、21にはHiレ
ベル電圧が印加される(図では1として表示)。入力端
子19、20、21に接続されたインバータ33、3
4、35を経た出力線では、Loレベル電圧が印加され
ている(図では0として表示)。この3個の出力線が適
切に組合されて、インバータ付きアンドゲート36に右
側から順に、000、100、010、110、00
1、101、011、111の電圧が印加されている。
これらの出力がオアゲート37と6個のインバータ38
に印加され、1、0、0、0、0、0、0の電圧が7個
のトランジスタ29に印加され、1番右側のトランジス
タ29のみが通電されている。その結果、電流選択手段
18の入力端子19、20、21を開放、すなわち金属
細線を接続しない場合は、抵抗R1が選択され、電流i
1=1.8/R1が選択される。
In the above-mentioned current selecting means 18, the input terminals 19, 20, 21 and the terminals 22, 23, 24 are connected by thin metal wires 30, 31, 32 in a predetermined combination. In FIG. 3, in the first integrated circuit element 8, all the metal wires 30, 31, 32 are connected, and in the third integrated circuit element 8, all the input terminals 19, 20, 21 are open. When the input terminals 19, 20 and 21 are open in FIG. 4, a Hi level voltage is applied to the input terminals 19, 20 and 21 (indicated as 1 in the figure). Inverters 33, 3 connected to input terminals 19, 20, 21
The Lo level voltage is applied to the output lines passing through 4 and 35 (displayed as 0 in the figure). These three output lines are properly combined to form an AND gate 36 with an inverter in order from the right side in the order of 000, 100, 010, 110, 00.
Voltages of 1, 101, 011 and 111 are applied.
These outputs are OR gate 37 and six inverters 38.
The voltage of 1, 0, 0, 0, 0, 0, 0 is applied to the seven transistors 29, and only the rightmost transistor 29 is energized. As a result, when the input terminals 19, 20, 21 of the current selecting means 18 are opened, that is, when the thin metal wire is not connected, the resistor R1 is selected and the current i
1 = 1.8 / R1 is selected.

【0015】また、入力端子19、20、21と端子2
2、23、24との間に各々金属細線30、31、32
が接続された場合、上述の説明から判る様に、1番右側
のトランジスタ29のみが通電され、抵抗R1が選択さ
れ、電流i1=1.8/R1が選択される。
Also, the input terminals 19, 20, 21 and the terminal 2
2, 23, 24 and thin metal wires 30, 31, 32, respectively.
Is connected, only the transistor 29 on the rightmost side is energized, the resistor R1 is selected, and the current i 1 = 1.8 / R1 is selected, as is understood from the above description.

【0016】この様に、入力端子19、20、21が金
属細線に組合された種々の組合せに対する選択された抵
抗と、選択された電流を以下の表に示す。
Thus, the following table shows selected resistances and selected currents for various combinations in which the input terminals 19, 20, 21 are combined with thin metal wires.

【0017】[0017]

【表1】 [Table 1]

【0018】この表に於て、ADJ1とADJ2とAD
J3は各々、入力端子19と端子22との間、入力端子
20と端子23との間、入力端子21と端子21との間
を示す。0と1は各々、金属細線で接続した事と、開放
した事を示す。この表から判る様に、入力端子19、2
0、21と金属細線の接続の組合せにより、所望の抵抗
を選択し、所望の電流を選択できる。
In this table, ADJ1, ADJ2 and AD
J3 indicates between the input terminal 19 and the terminal 22, between the input terminal 20 and the terminal 23, and between the input terminal 21 and the terminal 21, respectively. 0 and 1 indicate that they are connected with a metal thin wire and that they are opened. As can be seen from this table, input terminals 19 and 2
A desired resistance can be selected and a desired current can be selected by a combination of connections of 0 and 21 and a thin metal wire.

【0019】電流供給手段39は分圧回路40とオペア
ンプ41とトランジスタ42、43からなる。オペアン
プ41のマイナス端子は分圧回路40に接続され、プラ
ス端子は抵抗R1〜R7の共通線44に接続されてい
る。オペアンプ41の出力端子はトランジスタ42と出
力線45に共通に接続されている。端子46に所定の電
圧V1が印加されると分圧回路40により、オペアンプ
41のマイナス端子に例えば1.8Vが印加される。抵
抗R1〜R7のうち選択された抵抗をRとすれば電流選
択手段18で選択された電流、すなわち共通線44に流
れる電流i1はi1=1.8/Rとなる。
The current supply means 39 comprises a voltage dividing circuit 40, an operational amplifier 41, and transistors 42 and 43. The negative terminal of the operational amplifier 41 is connected to the voltage dividing circuit 40, and the positive terminal is connected to the common line 44 of the resistors R1 to R7. The output terminal of the operational amplifier 41 is commonly connected to the transistor 42 and the output line 45. When a predetermined voltage V 1 is applied to the terminal 46, the voltage dividing circuit 40 applies, for example, 1.8 V to the negative terminal of the operational amplifier 41. If the resistance selected from the resistances R1 to R7 is R, the current selected by the current selection means 18, that is, the current i 1 flowing through the common line 44 is i 1 = 1.8 / R.

【0020】駆動手段47は例えば、インバータ48と
4個のトランジスタ49、50、51、52からなり、
トランジスタ52のソースと端子D1が接続され、端子
D1は発光ダイオード14に接続されている。そして、
トランジスタ49のソースは出力線45に接続され、ト
ランジスタ49のゲートはアンドゲート17の出力線に
接続されている。トランジスタ50のドレインは端子4
6からの出力線に接続され、トランジスタ52のドレイ
ンは端子53からの出力線に接続されている。同様にし
て、合計64個の駆動手段47が各々アンドゲート17
の出力線と、出力線45に共通して接続され、端子D1
〜D64に接続されている。
The driving means 47 comprises, for example, an inverter 48 and four transistors 49, 50, 51 and 52,
The source of the transistor 52 is connected to the terminal D1, and the terminal D1 is connected to the light emitting diode 14. And
The source of the transistor 49 is connected to the output line 45, and the gate of the transistor 49 is connected to the output line of the AND gate 17. The drain of the transistor 50 is terminal 4
6 and the drain of the transistor 52 is connected to the output line from the terminal 53. Similarly, a total of 64 driving means 47 are provided for each AND gate 17.
Of the output line and the output line 45 are commonly connected to the terminal D1.
To D64.

【0021】端子54に接続された共通線により、例え
ば27個のシフトレジスタ15に共通にクロック信号が
印加される。そして端子55に接続された共通線によ
り、27個のラッチ回路16に共通にラッチ信号が印加
される。端子56に接続された線により、直列のデータ
が27個のシフトレジスタ15に供給される。そして端
子57に接続された共通線により、64×27=172
8個のアンドゲート17に共通にストロボ信号が印加さ
れる。
A clock signal is commonly applied to, for example, 27 shift registers 15 by a common line connected to the terminal 54. Then, a latch signal is commonly applied to the 27 latch circuits 16 by the common line connected to the terminal 55. A line connected to the terminal 56 supplies serial data to the 27 shift registers 15. Then, by the common line connected to the terminal 57, 64 × 27 = 172
A strobe signal is commonly applied to the eight AND gates 17.

【0022】次に、本実施例の表示装置の動作を再び図
3と図4に従い説明する。最初に上述の様に、入力端子
19、20、21を所定の組合せにより金属細線にて選
択的に配線する。例えば図4に示す様に配線しないで、
入力端子19、20、21を開放する。この時上述した
様に、選択手段18の論理回路28と各素子36、3
7、38、29の構成により、表に示した様に抵抗R1
(基準抵抗)が選択される。すなわち電流供給手段39
の出力線44は抵抗R1を介して接地される。
Next, the operation of the display device of this embodiment will be described again with reference to FIGS. First, as described above, the input terminals 19, 20, and 21 are selectively wired with a thin metal wire in a predetermined combination. For example, do not wire as shown in FIG.
The input terminals 19, 20, 21 are opened. At this time, as described above, the logic circuit 28 of the selecting means 18 and each element 36, 3
As shown in the table, the resistance R1
(Reference resistance) is selected. That is, the current supply means 39
The output line 44 of is connected to the ground via the resistor R1.

【0023】そして端子56を介して1728ビットの
データ(s)が端子54からのクロック信号(CLOC
K)に同期して、27個のシフトレジスタ15に順次供
給される。次に、端子55を介してラッチ信号(LAT
CH)が各ラッチ回路16に入ると、64ビットのデー
タがシフトレジスタ15から読込まれ、アンドゲート1
7に出力される。アンドゲート17には点灯時間を指示
するストロボ信号(STROBE)が端子57を介して
入力され、上述のデータとアンドがとられ、点灯信号
(点灯するか又は点灯しないかを指示する信号)を駆動
手段47へ出力する。
Then, 1728-bit data (s) is sent to the clock signal (CLOC) from the terminal 54 via the terminal 56.
It is sequentially supplied to 27 shift registers 15 in synchronization with K). Next, the latch signal (LAT
CH) enters each latch circuit 16, 64-bit data is read from the shift register 15, and the AND gate 1
7 is output. A strobe signal (STROBE) indicating a lighting time is input to the AND gate 17 via a terminal 57, ANDed with the above-described data, and a lighting signal (a signal indicating whether to light or not to light) is driven. Output to the means 47.

【0024】電流供給手段39に於て、オペアンプ41
が負帰還ループに形成される事により、電圧V2が変動
しても、位置58の電圧は1.8Vに維持されている。
その結果、出力線44には一定電流i1=1.8/Rが
流れる。
In the current supply means 39, the operational amplifier 41
Is formed in the negative feedback loop, the voltage at the position 58 is maintained at 1.8V even if the voltage V2 fluctuates.
As a result, a constant current i 1 = 1.8 / R flows through the output line 44.

【0025】次に駆動手段47に於て、電流供給手段3
9の出力線45からの出力電流が供給され、アンドゲー
ト17から点灯信号が供給される。そして、点灯信号が
Hiレベルになると、トランジスタ49がONし、位置
59の電圧がトランジスタ52のゲートに伝わる。この
時、トランジスタ43等からなる回路と、トランジスタ
52等からなる回路により、カレントミラー回路が構成
され、例えばミラー比を1:2に設定する。その結果、
駆動電流i2(端子D1を介して発光ダイオード14に
流れる電流)は、i2=2×i1=3.6/Rとなる。
Next, in the drive means 47, the current supply means 3
An output current is supplied from the output line 45 of No. 9 and a lighting signal is supplied from the AND gate 17. Then, when the lighting signal becomes Hi level, the transistor 49 is turned on, and the voltage at the position 59 is transmitted to the gate of the transistor 52. At this time, a circuit including the transistor 43 and the like and a circuit including the transistor 52 and the like form a current mirror circuit, and the mirror ratio is set to 1: 2, for example. as a result,
The driving current i 2 (current flowing through the light emitting diode 14 via the terminal D1) is i 2 = 2 × i 1 = 3.6 / R.

【0026】また、駆動電流i2は上述のオペアンプ4
1により、電圧V2の変動に対して略一定となる。すな
わち、1つの発光ダイオードアレイ7に於て、点灯する
発光ダイオード14の個数が変化しても、個々の発光ダ
イオード14を流れる電流が略一定となる。以上の動作
により発光ダイオード14を選択的に点灯する事が出来
る。
Further, the drive current i 2 is the operational amplifier 4 described above.
1 makes it substantially constant with respect to the fluctuation of the voltage V2. That is, in one light emitting diode array 7, even if the number of light emitting diodes 14 that are turned on changes, the current flowing through each light emitting diode 14 becomes substantially constant. With the above operation, the light emitting diode 14 can be selectively turned on.

【0027】また、製造に於て、データ(s)を全てH
iレベルのものを供給し、発光ダイオード14を全数点
灯させる。そして、発光ダイオードアレイ7毎に輝度測
定する。その結果、測定輝度が所望値の許容範囲であれ
ば、選択手段18の出力端子19、20、21の接続
は、このままで良い。
Also, in manufacturing, all data (s) is H
A light source of i level is supplied to turn on all the light emitting diodes 14. Then, the luminance is measured for each light emitting diode array 7. As a result, if the measured luminance is within the allowable range of the desired value, the connection of the output terminals 19, 20, and 21 of the selection means 18 may be left as it is.

【0028】しかし、例えば測定輝度が所望値の−30
%ならば、現在の輝度を+30%に調整する必要があ
る。そして、輝度が±30%以内の範囲であれば、輝度
と駆動電流は線形的に変化するので駆動電流を+30%
に調整すれば良い。また上述の様に、駆動電流i2
3.6/Rなので、抵抗Rを−30%にすればよい。
However, for example, the measured luminance is -30 of the desired value.
%, It is necessary to adjust the current brightness to + 30%. If the brightness is within ± 30%, the brightness and the drive current change linearly, so the drive current is + 30%.
You can adjust it to. Further, as described above, the drive current i 2 =
Since it is 3.6 / R, the resistance R should be set to -30%.

【0029】すなわち上述の表より、電流選択手段18
の電流を所望値i1として得られる様に、抵抗Rとして
R3を選択すればより、ADJ1=1、ADJ2=1、
ADJ3=0の組合せにすれば良い事が判る。つまり、
出力端子21と端子24のみを金属細線21にて接続す
ればよい。
That is, from the above table, the current selection means 18
If R3 is selected as the resistor R so that the current of 1 is obtained as the desired value i 1 , ADJ1 = 1, ADJ2 = 1,
It is understood that the combination of ADJ3 = 0 should be used. That is,
Only the output terminal 21 and the terminal 24 may be connected by the thin metal wire 21.

【0030】次に、出力端子19、20、21の、この
組合せにて発光ダイオード14を全数点灯させ輝度測定
する。その結果、上述の理論通りに測定輝度は所望値の
許容範囲に入っている。この様に本発明の構成をする事
により、多くても1回の輝度調整を行い、表示装置につ
き、所望の輝度が得られる。
Next, all the light emitting diodes 14 are turned on by this combination of the output terminals 19, 20, and 21, and the luminance is measured. As a result, the measured luminance falls within the allowable range of the desired value according to the theory described above. By thus configuring the present invention, the brightness can be adjusted at most once and the desired brightness can be obtained for the display device.

【0031】また抵抗Rの初期設定として上述の様に、
入力端子19、20、21を開放し輝度調整するため
に、入力端子19、20、21に選択的に金属細線を接
続している。これを第1の手段と呼ぶ。そして抵抗Rの
初期設定として図3の1番目の集積回路素子8に示した
様に、入力端子19、20、21を全数金属細線30、
31、32で接続し、輝度調整するために、金属細線3
0、31、32を選択的に切断している。これを第2の
手段と呼ぶ。
Further, as the initial setting of the resistance R, as described above,
In order to open the input terminals 19, 20, 21 and adjust the brightness, thin metal wires are selectively connected to the input terminals 19, 20, 21. This is called the first means. As the initial setting of the resistance R, as shown in the first integrated circuit element 8 of FIG. 3, the input terminals 19, 20, and 21 are all metal thin wires 30,
Connected with 31 and 32, thin metal wire 3 to adjust brightness
0, 31, 32 are selectively cut. This is called the second means.

【0032】この様に第2の手段では、輝度調整するの
に金属細線30、31、32を切断するだけなので、配
線するのに比べ作業が容易である。しかし、金属細線3
0、31、32を切断した後に、その切りくずが回路上
に残され、短絡する恐れがある。また、この表示装置で
は抵抗R1〜R7は印刷にて形成する事が出来、金属細
線30、31、32も小さいスペースで済むので、1つ
の集積回路素子8内に組込む事が出来る。故に、従来の
様に、大きなスペースを必要とする可変抵抗器を集積回
路素子に外付けしなくてよいから、小型化が出来る。
As described above, in the second means, since the fine metal wires 30, 31, 32 are simply cut to adjust the brightness, the work is easier than the wiring. However, thin metal wire 3
After cutting 0, 31, 32, the chips may be left on the circuit and short-circuited. Further, in this display device, the resistors R1 to R7 can be formed by printing, and the thin metal wires 30, 31 and 32 can be formed in a small space, and thus can be incorporated in one integrated circuit element 8. Therefore, unlike the conventional case, a variable resistor which requires a large space does not have to be externally attached to the integrated circuit element, and the size can be reduced.

【0033】なお上述の表示装置13では、複数の発光
ダイオードアレイ7と複数の集積回路素子8を有する光
プリントヘッドを例示した。しかし、本発明はこの例示
に限らず、例えば1個の発光ダイオードアレイ7と1個
の集積回路素子8を有する表示装置にも適用出来る。
In the above-mentioned display device 13, an optical print head having a plurality of light emitting diode arrays 7 and a plurality of integrated circuit elements 8 is illustrated. However, the present invention is not limited to this example, but can be applied to a display device having, for example, one light emitting diode array 7 and one integrated circuit element 8.

【0034】[0034]

【発明の効果】本発明は上述の様に、電流選択手段に於
て1つの組合せの入力端子を金属細線に接続する事によ
り電流を選択し、その電流に応じて発光ダイオードに駆
動電流を供給する。そして輝度測定し、もし低輝度なら
ば駆動電流を上げるために電流選択手段の電流を選択す
る様に、他の組合せの入力端子を金属細線に接続する。
この様に入力端子を所定の金属細線に組合せる事によ
り、所望の電流を選択でき所望の輝度が容易に得られ
る。
As described above, the present invention selects a current by connecting one combination of input terminals to a thin metal wire in the current selecting means, and supplies a drive current to the light emitting diode according to the current. To do. Then, the luminance is measured, and if the luminance is low, the input terminal of another combination is connected to the metal thin wire so that the current of the current selecting means is selected to increase the drive current.
In this way, by combining the input terminal with a predetermined thin metal wire, a desired current can be selected and a desired brightness can be easily obtained.

【0035】更に、入力端子を全て金属細線に接続し選
択した電流と、入力端子を開放し選択した電流を同一に
する。故に、入力端子を全て金属細線に接続し遂次金属
細線を切断し輝度調整する方法と、入力端子を開放し遂
次金属細線を接続し輝度調整する方法の2通りが行な
え、利便性が向上する。
Further, all the input terminals are connected to the thin metal wires and the selected current is made equal to the selected current by opening the input terminal. Therefore, the convenience can be improved by two methods, one is to connect all the input terminals to the thin metal wires and cut the thin metal wires to adjust the brightness, and the other is to open the input terminal and connect the thin metal wires to adjust the brightness. To do.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の基になる参考例に係る表示装置の断面
図である。
FIG. 1 is a cross-sectional view of a display device according to a reference example on which the present invention is based.

【図2】図1のAA断面図である。FIG. 2 is a sectional view taken along line AA of FIG.

【図3】本発明の実施例に係る表示装置のブロック図で
ある。
FIG. 3 is a block diagram of a display device according to an exemplary embodiment of the present invention.

【図4】図3の要部詳細図である。FIG. 4 is a detailed view of a main part of FIG.

【図5】従来の表示装置のブロック図である。FIG. 5 is a block diagram of a conventional display device.

【符号の説明】[Explanation of symbols]

14 発光ダイオード 18 電流選択手段 19、20、21 入力端子 R1、R2、R3、R4、R5、R6、R7 抵抗 39 電流供給手段 47 駆動手段 14 Light Emitting Diode 18 Current Selection Means 19, 20, 21 Input Terminals R1, R2, R3, R4, R5, R6, R7 Resistor 39 Current Supply Means 47 Driving Means

───────────────────────────────────────────────────── フロントページの続き (72)発明者 樋口 福司 大阪府守口市京阪本通2丁目5番5号 三 洋電機株式会社内 (72)発明者 須藤 彰良 大阪府守口市京阪本通2丁目5番5号 三 洋電機株式会社内 ─────────────────────────────────────────────────── ─── Continuation of front page (72) Inventor Fukushi Higuchi 2-5-5 Keihan Hondori, Moriguchi City, Osaka Prefecture Sanyo Electric Co., Ltd. (72) Inventor Akiyoshi Sudo 2-5 Keihan Hondori, Moriguchi City, Osaka Prefecture No. 5 Sanyo Electric Co., Ltd.

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 電流選択手段と、その電流選択手段で選
択された電流に応じて駆動電流を発光ダイオードに供給
する駆動手段とを備え、前記電流選択手段は所定の組合
せの入力端子を金属細線に接続する事により所定の電流
を選択し、全ての入力端子を金属細線で接続した時の電
流と、全ての入力端子を開放した時の電流を同一に設け
る事を特徴とする表示装置。
1. A current selecting means and a driving means for supplying a driving current to a light emitting diode according to a current selected by the current selecting means, wherein the current selecting means has a predetermined combination of input terminals as a metal thin wire. A display device, characterized in that a predetermined current is selected by connecting to, and a current when all the input terminals are connected with a thin metal wire and a current when all the input terminals are opened are provided in the same manner.
JP24933594A 1994-10-14 1994-10-14 Display device Expired - Lifetime JP3354317B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP24933594A JP3354317B2 (en) 1994-10-14 1994-10-14 Display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP24933594A JP3354317B2 (en) 1994-10-14 1994-10-14 Display device

Publications (2)

Publication Number Publication Date
JPH08115056A true JPH08115056A (en) 1996-05-07
JP3354317B2 JP3354317B2 (en) 2002-12-09

Family

ID=17191492

Family Applications (1)

Application Number Title Priority Date Filing Date
JP24933594A Expired - Lifetime JP3354317B2 (en) 1994-10-14 1994-10-14 Display device

Country Status (1)

Country Link
JP (1) JP3354317B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013506305A (en) * 2009-09-30 2013-02-21 オスラム オプト セミコンダクターズ ゲゼルシャフト ミット ベシュレンクテル ハフツング OPTOELECTRONIC SEMICONDUCTOR CHIP AND METHOD FOR MATCHING CONTACT PATTERN PART FOR CONDUCTING OPTICAL ELECTRONIC SEMICONDUCTOR CHIP

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013506305A (en) * 2009-09-30 2013-02-21 オスラム オプト セミコンダクターズ ゲゼルシャフト ミット ベシュレンクテル ハフツング OPTOELECTRONIC SEMICONDUCTOR CHIP AND METHOD FOR MATCHING CONTACT PATTERN PART FOR CONDUCTING OPTICAL ELECTRONIC SEMICONDUCTOR CHIP

Also Published As

Publication number Publication date
JP3354317B2 (en) 2002-12-09

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