JPH0811066Y2 - PWM inverter current control circuit - Google Patents

Description

[Detailed Description of the Device] A. Industrial Application Field The present invention relates to a PWM inverter having a current control system,
In particular, it relates to a current control circuit.

B. Outline of the Invention The present invention, in a PWM inverter having a current control system, suppresses switching loss of the inverter while increasing the loop gain of the current control system by adding a primary delay capacitor to the feedback circuit of the current control amplifier. It was made possible.

C. Conventional Technology A PWM inverter having a current control system has, for example, a circuit configuration shown in FIG. DC power is extracted from the AC power supply 1 by the rectifier 2. The inverter main circuit 3 to which this DC power is supplied is configured as a voltage-controlled inverter that uses a power transistor as a switching element, and obtains AC power of a PWM waveform with the fundamental frequency and voltage adjusted to the induction motor 4 as a load. Supply. The controller of the inverter main circuit 3 performs current control by vector calculation and PWM control by the current tracking method. This control device configuration obtains a torque current command I _β in the speed control amplifier 5 by comparing the speed command ω _n * and the speed detection signal ω _r, and from this command, the exciting current command I _α and the speed detection signal ω _r. Vector operation circuit 6
The sine wave phase current commands i _a *, i _b *, i _c * are obtained at. This current command is compared with the detected currents i _a , i _b , i _c of each phase of the motor 4, and the current control amplifiers 7 _a , 7 _b , 7 _{c respectively} have a signal V _a , which is proportional to the positive and negative polarities and the magnitude of the deviation, Obtain V _b and V _c . This signal is PWN
By inputting the hysteresis hinparators 8 _a , 8 _b , and 8 _c of the circuit 8, the gate signals are converted into PWM waveform gate signals, which are respectively amplified by the gate amplifier 9 to be drive signals for the inverter main circuit 3. 10 is a pickup that detects the speed of the electric motor,
Reference numeral 11 is a speed calculation circuit.

D. Problem to be solved by the invention In the conventional PWM inverter, the loop gain of the current control system is set to the oscillation limit in order to obtain the inverter output current that matches the current commands i _a *, i _b *, i _c *. It is desired that the gain be close to high. However, when increasing the loop gain amplifier 7 _a, 7 _b, 7 _c output V _a of, V _b, is inverted in polarity are many V _c by increasing the switching frequency of the PWM signal. This means that in addition to the increase in the size of the snubber circuit of the transistor,
If the switching loss of the power transistor of the inverter main circuit 3 is increased and the switching loss is improper, the power transistor may be damaged. In particular, switching loss during regeneration easily causes transistor damage.

An object of the present invention is to provide a PWM inverter capable of suppressing switching loss while increasing the loop gain of the current control system.

E. Means and Actions for Solving the Problem In order to achieve the above object, the present invention provides a current control amplifier for comparing each phase sine wave current command and each phase output current of a transistor inverter, and each current control amplifier. In a PWM inverter equipped with a PWM circuit for converting the output voltage of each phase into a PWM waveform and performing switch control of the power transistor of the transistor inverter, the current control amplifier includes a series circuit of a capacitor and a resistor for proportional integration, and a primary delay. A feedback capacitor is included in the feedback circuit to increase the loop gain of the current control system, but the increase in the polarity reversal frequency of the amplifier output is suppressed by the integration operation of the primary delay capacitor, and the PWM waveform on / off frequency and power transistor switching are suppressed. Control the increase in frequency.

F. Embodiment FIG. 1 is a circuit diagram of essential parts showing an embodiment of the present invention.
In the figure, a current control amplifier 7 _a, 7 _b, 7 _c includes an operational amplifier OP _a, OP _b, the capacitor C _a proportional-integral to the feedback circuit OP _c (PI) computation, C _b, and C _c resistance In addition to having a series circuit of R _a , R _b , and R _c , integration capacitors C _da , C _db , and C _dc are provided. The gain of the current control amplifier 7 _a, 7 _b, 7 _c is a high gain, the loop gain of the current control is a value close to the oscillation limit.

In such a configuration, the current control amplifier 7 _a, 7 _b, 7 _c has a primary delay integrating capacitor C _da, C _db, the C _dc, current command _{i a *, i b *,} i c * and the detected current i _Although it responds with a high loop gain in comparison with _a , i _b , and i _c , the polarity reversal frequency of the outputs V _a , V _b , and V _c decreases due to the first-order lag. As a result, an increase in the on / off frequency of the output PWM waveform of the PWM circuit 8 is suppressed, an increase in the switching frequency of the power transistor of the inverter main circuit 3 is reduced, and the switching loss is reduced. Further, the snubber circuit of the power transistor can be downsized, for example, a small-capacity discharge resistance is sufficient for the snubber circuit, and the restriction on the characteristic selection of the power transistor can be reduced.

Incidentally, the means for generating the current command and PW in the embodiment
The M waveform generating means has the same operation and effect even when it has another configuration, and the inverter can be applied to the one having a single-phase inverter configuration.

G. Effect of the Invention As described above, according to the present invention, the loop circuit of the current control system is increased because the current control system is provided with the primary delay capacitor in the feedback circuit of the current control amplifier to obtain the PWM waveform. As a result, the inverter output current can be made close to a sine wave to suppress the switching loss, and consequently, the power transistor can be prevented from being damaged and the snubber circuit can be prevented from becoming large.

[Brief description of drawings]

FIG. 1 is a circuit diagram of an essential part showing an embodiment of the present invention, and FIG.
It is a circuit diagram of a PWM inverter. 3 ... Inverter main circuit, 4 ... Induction motor, 6 ... Vector arithmetic circuit, _7a , _7b , _7c ... Current control amplifier, 8 ...
… PWM circuit, C _da , C _db , C _dc … Capacitor.

Claims (1)

[Scope of utility model registration request] 1. A current control amplifier for comparing a sine wave current command for each phase and an output current for each phase of a transistor inverter, and a power transistor for a transistor inverter by converting each phase output voltage of each current control amplifier into a PWM waveform. In a PWM inverter having a PWM circuit for switch control, the current control amplifier includes a series circuit of a proportional integration capacitor and a resistor, and a primary delay capacitor that suppresses an increase in the polarity reversal frequency of the amplifier output in a feedback circuit. A current control circuit for a PWM inverter, which is equipped with.