JPH08110513A - Plasma address display device - Google Patents

Abstract

PURPOSE: To realize the pulse drive of a plasma address display device, to eliminate an analog driver and to suppress cross talk. CONSTITUTION: The plasma address display device is provided with a flat panel structure alternately superposing a liquid crystal cell and a plasma cell. The liquid crystal cell is provided with signal electrodes D arranged in a column state. The plasma cell is provided with discharge channels arranged in a row state. Every discharge channel consists of a pair of an anode A and a cathode K. A pixel 4 is provided on a crossing part between the singnal electrode D and the discharge channel. A scan circuit 2 supplies a selection pulse to the cathode K of the discharge channel by line sequenciality scanning. A signal circuit 2 applies a signal pulse to each signal electrode D synchronizing with the line sequencial scanning. The signal circuit 1 outputs an image signal consisting of a signal pulse of a fixed voltage Vp of which fall timing Sd is modulated based on the fall timing Td of each selection pulse to perform a gradation display.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plasma addressed display device having a laminated structure in which a display cell such as a liquid crystal cell and a plasma cell are superposed, and more specifically, an image on the liquid crystal cell side synchronized with line sequential scanning of the plasma cell. Regarding signal output method.

[0002]

2. Description of the Related Art Conventionally, a switching element such as a thin film transistor is provided for each pixel as a means for improving resolution and contrast of a matrix type electro-optical device using a liquid crystal cell as an electro-optical cell, for example, a liquid crystal display device. An active matrix system is generally known in which a plurality of pixels are provided and are driven line-sequentially. However, in this case, it is necessary to provide a large number of semiconductor elements such as thin film transistors on the substrate, and there is a disadvantage that the manufacturing yield is deteriorated especially when the area is increased. Therefore, as a means for solving this disadvantage, Buzaku et al. In JP-A-1-217396 propose a method of using a plasma switch instead of an element composed of a thin film transistor and the like. Hereinafter, the configuration and operation of the plasma addressed display device that drives a liquid crystal cell using a switch based on plasma discharge will be briefly described.

In this plasma addressed display device, as shown in FIG. 3, a liquid crystal layer 101, which is an electro-optical material layer, and a plasma chamber 102 are arranged adjacent to each other via a thin dielectric sheet 103 made of glass or the like. It was done. The plasma chamber 102 is configured by forming a plurality of grooves 105 parallel to each other with respect to the glass substrate 104. The glass substrate 104 and the dielectric sheet 103 are hermetically sealed,
An ionizable gas is enclosed in this. or,
Each groove 105 has a pair of electrodes 106, 10 parallel to each other.
7 are provided, and these electrodes 106 and 107 function as an anode A and a cathode K for ionizing the gas in the plasma chamber 102 to generate discharge plasma.
For example, the electrode 106 functions as a cathode and is connected to an output transistor of a scanning circuit (not shown) via a current limiting resistor. The electrode 107 also functions as an anode and is commonly grounded. On the other hand, the liquid crystal layer 101 is sandwiched between the dielectric sheet 103 and the transparent substrate 108, and the signal electrode D is formed on the surface of the transparent substrate 108 on the liquid crystal layer 101 side. The transparent signal electrode D is formed in the plasma chamber 10 formed by the groove 105.
It is orthogonal to the discharge channel consisting of 2 and the intersection of these signal electrodes and the discharge channel corresponds to each pixel.

FIG. 4 is a schematic view showing only two pixels cut out. In this figure, for ease of understanding, only two signal electrodes D1 and D2, one cathode electrode K1 and one anode electrode A1 are shown. Each pixel 204 includes a signal electrode (D1, D2) and a liquid crystal layer 301.
And a dielectric layer 303 and a discharge channel. The liquid crystal layer 301 and the dielectric layer 303
Correspond to the liquid crystal layer 101 and the dielectric sheet 103 of FIG. 3, respectively. The discharge channel is connected to substantially the anode potential during plasma discharge. When a signal voltage is applied to the pixel in this state, charges are injected into the liquid crystal layer 301 and the dielectric layer 303. On the other hand, when the plasma discharge ends, the discharge channel returns to the insulating state, so that a floating potential is obtained and the injected charges are held in each pixel 204. A so-called sampling hold operation is performed. Here, since the signal electrodes (D1, D2) are not provided between the individual pixels 204, the pixels 204 are in a substantially insulating state even during plasma discharge, so that the independence of the pixels 204 is maintained. Therefore, the discharge channel functions as an individual sampling switching element provided in each pixel 204, and is therefore schematically represented by the switching symbol S1. On the other hand, the liquid crystal layer 301 and the dielectric layer 303 sandwiched between the signal electrodes (D1, D2) and the discharge channel.
Functions as a sampling capacitor. When the sampling switch S1 is turned on by the line-sequential scanning, the signal voltage is held in the sampling capacitor, and each pixel is turned on or off according to the signal voltage level. Even after the sampling switch S1 is turned off, the signal voltage is held in the sampling capacitor and the active matrix operation of the display device is performed.

FIG. 5 is a waveform diagram of the image signal applied to the signal electrode and the selection pulse supplied to the cathode of the discharge channel. When a predetermined negative voltage Vs is applied to the cathode electrode of one discharge channel at a certain selection timing,
Plasma discharge occurs in the discharge channel. The plasma discharge is stopped when the cathode electrode is set to the ground potential (0V). That is, the selection pulse rises to the negative voltage Vs side at the timing Tu, and falls to the ground potential (0V) at Td after the elapse of a predetermined selection period. The anode potential is always set to the ground potential. At the time of falling Td, charged particles such as ions generated by plasma discharge remain in the discharge channel, so that the lower surface of the dielectric sheet is electrically connected to the anode and the cathode and is at the ground potential (0 V). Therefore, at this time Td, the image signal Vsig
Are sampled, and a predetermined image signal can be written in the liquid crystal layer substantially according to the capacitance division ratio of the liquid crystal and the dielectric sheet. Eventually, the ions and the like generated by the plasma discharge return to the ground state and remain in the discharge channel with a small floating capacitance, so that the resistance becomes high. Therefore, the image signal written in the liquid crystal layer is maintained until the next selection timing. Therefore, by scanning the discharge channels line-sequentially, it is possible to display an image with a desired gradation.

[0006]

By the way, in order to perform a desired gradation display in the plasma addressed display device, it is necessary to supply the image signal Vsig to the signal electrode group. However, since this image signal is written in each pixel according to the capacitance division of the liquid crystal layer and the dielectric sheet, a large signal voltage is required in advance. This signal voltage reaches several tens of volts, which is much higher than that of an active matrix liquid crystal display device including a single liquid crystal cell layer using a TFT or the like. Therefore, when the signal circuit connected to the signal electrode group is configured by an analog driver, there is a problem that high integration is difficult due to the breakdown voltage and the like. Further, since the signal electrode groups are arranged in a row, when different signal voltages are applied between the adjacent electrodes, the alignment of the liquid crystal is disturbed by the electric field generated between the adjacent electrodes. Among them, if the period in which different signal voltages are applied is long, the liquid crystal alignment becomes seriously disturbed, and there is a problem that so-called crosstalk occurs.

[0007]

In view of the above-mentioned problems of the prior art, the present invention makes it possible to drive the display cell side of a plasma addressed display device by using a signal circuit instead of an analog driver which is difficult to be highly integrated. The purpose is to do. In addition, the purpose is to suppress the occurrence of the above-mentioned crosstalk. The following measures have been taken in order to achieve this object.
That is, it has a flat panel structure in which a liquid crystal cell having signal electrodes arranged in columns and a plasma cell having discharge channels arranged in rows are overlapped with each other, and a selection pulse is applied to the discharge channels by line-sequential scanning. A scanning circuit for supplying,
In a plasma address display device including a signal circuit that applies an image signal to each signal electrode in synchronization with line-sequential scanning, the rising timing of the signal pulse applied to the signal electrode is the rising timing and the falling timing of the selection pulse. It is set during the timing, and the gradation display is performed by outputting the image signal composed of the signal pulse of the constant voltage in which the falling timing of the signal pulse is modulated with reference to the falling timing of the selection pulse. This constant voltage is controlled to be as low as possible within a range where a practical contrast can be realized in order to reduce crosstalk, and the application time is also shortened.

[0008]

The discharge channel constituting the plasma switching element has an operating characteristic that the metastable particles serving as the ion source gradually decrease after the plasma discharge is completed. Utilizing this,
The image signal to be written to the pixel is composed of signal pulses having a constant voltage value. A desired gradation display is performed by modulating a period in which the voltage value of the signal pulse is constant. That is, after outputting a signal pulse having a fixed voltage value before the falling edge of the selection pulse, when the signal pulse is immediately dropped after the falling edge of the selection pulse, a large number of the metastable particles remain in the discharge channel. After the writing of the fixed voltage value, the action of writing the voltage value after the signal pulse falls largely occurs. Therefore, of the voltage after the rising of the signal pulse and the voltage after the falling of the signal pulse, a voltage close to the voltage after the falling of the signal pulse is written. On the other hand, after outputting the signal pulse having the fixed voltage value before the falling edge of the selection pulse and then lowering the signal pulse after maintaining the output of the signal pulse for a while after the falling edge of the selection pulse, the metastable particles in the discharge channel Since the remaining amount becomes small, the action of writing the voltage value after the signal pulse falls becomes small. Therefore, of the voltage after the signal pulse rises and the voltage after the signal pulse fall, a voltage close to the voltage after the signal pulse rises is written. In this way, by modulating the output sustain period of the signal pulse after the selection pulse falls, it is possible to effectively write an arbitrary voltage between the voltage after the signal pulse rises and the voltage after the signal pulse fall. it can.

From the electro-optical characteristics of liquid crystal, when a high voltage is applied to the liquid crystal, the transmittance is saturated within a short time, and the change in the light transmittance with respect to the fluctuation of the voltage applied to the liquid crystal is small in the vicinity of the transmittance saturation voltage. It is possible to shorten the writing time by setting the output voltage of the signal pulse high.
Also, since the output period of the signal pulse applied to the adjacent column-shaped signal electrodes changes according to the write information,
By shortening the output period of the signal pulse, it is possible to effectively suppress the amount of crosstalk that occurs when different voltages are applied to the adjacent signal electrodes.

[0010]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT A preferred embodiment of the present invention will be described below with reference to the drawings. The plasma addressed display device according to the present invention basically has the laminated flat panel structure shown in FIG. 3 and includes a liquid crystal cell and a plasma cell. This display device basically has the circuit configuration shown in FIG. As shown in the figure, the drive circuit includes a signal circuit 1, a scanning circuit 2, and a control circuit 3. Signal circuit 1
Is connected to a plurality of signal electrodes D1 to Dm via a buffer. On the other hand, the cathode electrodes K1 to Kn of the plasma electrodes are connected to the scanning circuit 2 through the same buffer. The cathode electrode corresponds to the electrode 106 of FIG. Further, the anode electrodes A1 to An are grounded. The anode electrode corresponds to the electrode 107 of FIG. The signal circuit 1 and the scanning circuit 2 are controlled by the control circuit 3 so as to synchronize with each other. The cathode electrodes K1 to Kn are line-sequentially selected by the scanning circuit 2.
For example, when the cathode electrode K1 is selected, plasma discharge is generated between the cathode electrode K1 and the adjacent anode electrode A1, and a localized discharge region is formed. This discharge area constitutes a row scanning unit. The row scanning unit is the plasma chamber 10 of FIG.
It corresponds to 2 (discharge channel). On the other hand, a signal pulse is applied to each of the signal electrodes D1 to Dm in synchronization with this line-sequential scanning. Therefore, each of the signal electrodes D1 to Dm constitutes a column driving unit. Individual pixels 4 are defined at the intersections of the column driving units and the row scanning units. A feature of the present invention is that grayscale display is performed by modulating the timing and pulse width of the signal pulse from the signal circuit 1 with reference to the falling timing of the selection pulse from the scanning circuit 2.

The operation of the plasma addressed display device according to the present invention will be described in detail with reference to FIG. FIG. 1B shows the output timing of the signal pulse and the selection pulse when focusing on one pixel. The selection pulse rises from the ground potential (0V) to a predetermined negative potential −Vs at timing Tu. As a result, a plasma discharge occurs in the discharge channel, and the discharge channel is filled with charged particles and has a substantially ground potential except in the vicinity of the cathode electrode. The selection pulse falls to the ground potential at timing Td after the lapse of a predetermined selection period. This ends the plasma discharge in the discharge channel. However, even after the plasma discharge is completed, the metastable particles, which serve as the ion source, remain, gradually decreasing, and finally the inside of the discharge channel becomes a high resistance state. On the other hand, the signal pulse has its rising timing Su set between the rising timing Tu and the falling timing Td of the selection pulse, and corresponds to the constant voltage value Vp set for adjusting the writing time and the display data. Modulated pulse width Fpw
have. In actual setting, in order to effectively control the crosstalk, the maximum modulation width is first determined by adjusting the signal pulse voltage Vp, and then the falling timing Td of the selection pulse and the signal pulse rising timing Su are adjusted. Optimize the key display. The signal circuit that performs such pulse width modulation has a simpler structure than a conventional analog driver, is suitable for high breakdown voltage, and can be highly integrated. In addition, since the period in which different voltages are applied between the adjacent signal electrodes can be shortened, crosstalk via the stray capacitance between the signal electrodes can be effectively suppressed.

When the drive waveform shown in FIG. 1B is output, a constant voltage value Vp set to adjust the writing time and a signal pulse width F modulated according to the display data.
FIG. 2 shows the results of actual measurement of changes in transmittance of the plasma addressed display device according to the present invention with respect to changes in pw.
In FIG. 2, the effective signal pulse width is redefined as the time from the fall of each selection pulse to the fall of each signal pulse for the sake of description, and is represented by the symbol Fpwn. When the constant voltage value is 60V and a sufficiently long signal pulse width is output,
The transmittance changes according to the characteristic curve (a), and a sufficient black level can be written. On the other hand, when the constant voltage value is 30 V, even if a sufficiently long signal pulse width is output, a sufficient black level cannot be reached because the transmittance changes according to the characteristic curve (b). In the plasma addressed display device according to the present invention, a constant voltage value V is set in order to adjust the writing time to be short.
It turns out that it is necessary to set p high. Further, by increasing the constant voltage value, it becomes possible to write a sufficient black level in a short time. In the plasma addressed display device having the characteristics shown in FIG. 2, a constant voltage value of 60 V and a maximum signal pulse width of 20 μs are appropriate as drive waveform conditions. Further, at this time, when the non-interlace type NTSC signal is displayed, the drivable time of one row scanning unit is 32μ.
Therefore, when the driving method according to the present invention is used, the maximum period during which different voltages are applied between the adjacent signal electrodes is 20 μs, and the crosstalk amount through the stray capacitance between the signal electrodes is about 2 μs. It can be controlled to / 3. Further, the crosstalk suppressing effect is enhanced by increasing the constant voltage value.

[0013]

As described above, according to the present invention, the selection pulse is line-sequentially supplied to the discharge channel, while the time from the fall of each selection pulse to the fall of each signal pulse is modulated. An image signal composed of a signal pulse of a fixed voltage is applied to each signal electrode to perform gradation display. For this reason, the high withstand voltage analog driver, which has been conventionally required, is unnecessary, and the signal circuit can be highly integrated. Further, since the voltage of the signal pulse applied to the adjacent signal electrodes is the same, there is an effect of suppressing the crosstalk through the stray capacitance between the signal electrodes.

[Brief description of drawings]

FIG. 1 is a schematic block diagram showing an example of a drive circuit used in a plasma addressed display device according to the present invention and an operation waveform diagram thereof.

FIG. 2 is an electro-optical characteristic diagram when operating waveforms of the plasma addressed display device according to the present invention shown in FIG. 1 are used.

FIG. 3 is a partially cutaway perspective view showing an example of a conventional plasma addressed display device.

FIG. 4 is a schematic diagram in which pixels of the display device shown in FIG. 3 are cut out and shown.

FIG. 5 is an operation waveform diagram of a conventional plasma addressed display device.

[Explanation of symbols]

 1 signal circuit 2 scanning circuit 3 control circuit 4 pixel A anode D signal electrode K cathode

Claims (3)

[Claims] 1. A flat panel structure in which display cells having signal electrodes arranged in columns and plasma cells having discharge channels arranged in rows are overlapped with each other, and the discharge channels are line-sequentially scanned. In a plasma address display device including a scanning circuit that supplies a selection pulse and a signal circuit that applies an image signal to each signal electrode in synchronization with line-sequential scanning, the signal circuit is A plasma address display device characterized in that an image signal consisting of a signal pulse of a fixed voltage in which the time until the fall of the signal pulse is modulated is outputted to perform gradation display. 2. The plasma address display device according to claim 1, wherein the rising timing of each signal pulse is delayed from the rising timing of each selection pulse. 3. The plasma addressed display device according to claim 1, wherein the fixed voltage value of each signal pulse is adjusted so as to obtain a sufficient black level based on the electro-optical characteristics of the display cell.