JPH0810972Y2 - Amplitude modulator - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial field of application] The present invention relates to an amplitude modulator suitable for application to an RF modulator in the UHF band.

[Outline of device]

The present invention relates to a double balance mixer including first and second differential circuits each including a pair of differential transistors, and respective bases of a pair of differential transistors of the first and second differential circuits. An oscillator that supplies a carrier signal to
A pair of differential transistors are provided, a modulation voltage signal is input to each base, and a modulation current signal output from the collector of the one differential transistor is supplied to the pair of differential transistors of the first differential circuit. Supply to the emitter of
(M = 1, 2, 3, ...) First voltage / current conversion circuits and a pair of differential transistors are provided, and a modulation voltage signal is input to each base of the differential transistors, and the difference between the two. N (N = 2, 3, 4, ..., And N> supplies the modulated current signal output from the collector of the moving transistor to the emitters of the pair of differential transistors of the second differential circuit.
M) second voltage / current conversion circuits and a capacitance balance adjustment transistor connected to the emitters of the pair of differential transistors of the first differential circuit. Even if the number of voltage / current conversion circuits connected to the driving circuit is different, the modulation degree is kept constant regardless of changes in carrier level and carrier frequency.

[Conventional technology]

In a home VTR, an RF modulator is provided, and a reproduced video signal is modulated by this RF modulator and supplied to an antenna terminal of a television receiver via a feeder.

The broadcast wave of European television broadcasting (PAL and SECAM system) adopts the UHF band, the empty channel differs depending on the country, and the frequency of the empty channel is 540 to 630.
There are 10 types in the MHz range.

First, a conventional example of such a UHF band RF modulator [amplitude modulator having a semiconductor integrated circuit (hereinafter referred to as IC)] configuration will be described with reference to FIG. This RF modulator
This is a secondary coil with a single balanced mixer that uses a pair of diodes. It supplies the carrier signal from the oscillator OSC to both ends of the primary coil CL ₁ of the transformer TR, and the middle point is connected to the positive pole of the power supply E. Connect both ends of CL ₂ to the anode of diode D _{1 and} the cathode of diode D ₂ ,
The cathode of the diode D ₁ and the anode of the diode D ₂ are connected to each other to supply a modulation signal to this connection point, and the output terminal TO is connected from this connection point via the capacitor C _1.
Is derived. SIG (V) and SIG (T) are a video signal source and a test pattern signal source, respectively. The switch SW is used to switch the video voltage signal and the test pattern voltage signal from these signal sources SIG (V) and SIG (T). in switched connection midpoint resistor resistor connected to the anode of the cathode and the diode D ₂ of the diode D ₁ through R ₂ R _1,
Applied across R ₃ in series.

The test pattern signal is used to display, for example, two white bars vertically on a black background as a test pattern on the screen of the television receiver. This is for facilitating confirmation of the channel selection state when the frequency is variably adjusted to the predetermined free channel frequency.

[Problems to be solved by the device]

In such a conventional RF modulator, by the power source E,
If the DC voltage applied to the middle point of the secondary coil CL ₂ and the DC voltage at the connection point of the changeover switch SW and the resistor R ₁ do not match, the degree of modulation fluctuates, and accordingly the image on the receiving screen changes. The brightness changes. Therefore, each time the power source E is a variable power source and the changeover switch SW is switched to the video signal source SIG (V) side and the test pattern signal source SIG (T) side, the DC voltage applied to the middle point of the secondary coil CL ₂ Since the variable power source E is adjusted so that the DC voltage at the connection point of the changeover switch SW and the resistor R ₁ matches, there is a drawback that the operation is very complicated.

Also, the middle point of the secondary coil CL ₂ of the transformer TR is not always a strict middle point when the reactance component that changes with frequency is taken into consideration, so that when the carrier frequency changes, the modulation degree also changes. Since it fluctuates, the brightness of the image receiving screen changes accordingly.

Therefore, if a double balance mixer is used as described in Japanese Patent Application No. 60-17131 instead of the single balance mixer in such an RF modulator, the above-mentioned problems are once solved.

However, in the case of an actual RF modulator, not only a video signal and a test pattern signal but also an FM-modulated audio signal is used as a modulation signal. Therefore, an RF modulator using a double balance mixer is as follows. There is no choice but to adopt the configuration.

That is, a double balance mixer including first and second differential circuits each including a pair of differential transistors, and a carrier signal to each base of the pair of differential transistors of the first and second differential circuits, respectively. Is provided with an oscillator and a pair of differential transistors, and a modulation voltage signal (FM voltage modulated voice voltage signal) is input to each base of the oscillator.
One first voltage that supplies the modulation current signal (FM-modulated audio current signal) output from the collector of the one differential transistor to the emitters of the pair of differential transistors of the first differential circuit. A current conversion circuit and a pair of differential transistors are provided, and the modulation voltage signal (video voltage signal and test pattern voltage signal) is input to each base and the modulation output from the collector of one of the differential transistors. Two second voltage / current conversion circuits for supplying the current signal (video current signal and test pattern current signal) to the emitters of the pair of differential transistors of the second differential circuit are provided.

However, if one voltage / current conversion circuit is connected to the first differential circuit of the double balance mixer and two voltage / current conversion circuits are connected to the second differential circuit, the carrier of FIG. As shown in the characteristic curve diagram of the image modulation degree (%) with respect to the level (dBm), the higher the carrier level, the lower the modulation degree (image modulation degree) and the modulation It was found that the higher the frequency is, the lower the modulation degree is, as indicated by the curves Fl, Fm, and Fh that represent low, medium, and high carrier frequencies as parameters of the signal (video signal).

In view of such a point, the present invention is an amplitude modulator using a double balance mixer, even if the number of differential type voltage / current conversion circuits to which a pair of differential circuits of the double balance mixer are respectively connected is different, The present invention intends to propose an amplitude modulation device in which the degree of modulation is constant regardless of changes in carrier level and carrier frequency.

[Means for solving the problem]

The present invention relates to a pair of differential transistors (11), (1
2); Double balance mixer (1) composed of first and second differential circuits DA ₁ and DA ₂ composed of (15) and (16)
And an oscillator OSC that supplies a carrier signal to the bases of the pair of differential transistors (11), (12); (15) and (16) of the first and second differential circuits DA ₁ and DA ₂ , respectively. , A pair of differential transistors (21), (22), the modulation voltage signal is input to each base, and the modulation current signal output from the collector of the one differential transistor (22) is
A pair of differential transistors (11) of the first differential circuit DA ₁ ,
Supply to the emitter of (12) M (M = 1, 2, 3, ...
・) First voltage / current conversion circuit (2) and a pair of differential transistors (31), (32); (41), (42) are provided, and the modulation voltage signal is input to each base. In addition, the modulated current signal output from the collector of one of the differential transistors (31) and (42) is applied to the emitters of the pair of differential transistors (15) and (16) of the second differential circuit DA _2. , N (N = 2, 3, 4, ..., And N> M) second voltage / current conversion circuits (3) and (4), and a first differential circuit DA. ₁ pair of differential transistors (11), (12)
And a capacitance balance adjusting transistor (60) connected to the emitter of the.

[Action]

According to the present invention, the carrier signal from the oscillator OSC is output from the M first voltage / current conversion circuits (2) and the N second voltage / current conversion circuits (3), (4). Amplitude modulation is performed by each modulation current signal.

〔Example〕

Hereinafter, an embodiment of the present invention will be described in detail with reference to FIG. The amplitude modulator of this embodiment is a case of an RF modulator having a UHF band IC configuration similar to the conventional example,
It is integrated into an IC as a whole and is to be installed in a VAL for PAL and SECAM systems for Europe, as in the conventional example.

In FIG. 1, (1) is a double balance mixer,
It is composed of first and second differential circuits DA ₁ and DA ₂ , and each of the differential circuits DA ₁ and DA ₂ has a pair of differential transistors (11),
(12); (15) and (16). The collectors of the transistors (11) and (15) are connected to the power source + B through the common load resistor (13) and also to the output terminal TO ₂ . The collectors of the transistors (12) and (16) are connected to the power source + B through the common load resistor (14) and also to the output terminal TO ₁ .

OSC is an oscillator, and its oscillation frequency is
It is a variable oscillator that can be continuously and manually varied in the range of 0MHz to 630MHz. The carrier signal from the oscillator OSC is supplied to the bases of the transistors (12) and (15) of the double balance mixer (1) and the transistor (11),
(16) Connected to the base.

(2) is a voice voltage / current conversion circuit, which is a voice input terminal
The FM audio voltage signals from TA ₁ and TA ₂ are converted into FM audio current signals and supplied to the emitters of the transistors (11) and (12) of the double balance mixer (1).

(21) and (22) are a pair of differential transistors, the collector of one of the transistors (21) is connected to the power supply + B, and the collector of the other transistor (22) is the transistor (11) of the double balance mixer (1). ), (12) emitters, the respective emitters of the transistors (21), (22) are connected to each other through a linearity improving resistor (23), and a constant current transistor (2) is provided.
4), (25) Between collector-emitter and resistor (2
Grounded through 6) and (27).

Then, audio input terminals TA ₁ and TA ₂ are derived from the bases of the pair of differential transistors (21) and (22), respectively.
A bias voltage from a bias power source (28) is commonly applied to the bases of the transistors (24) and (25).

Here, (60) is a transistor for capacitance balance adjustment in which the base and the emitter are directly connected, and is formed in the IC in the same manner as a normal transistor as shown in the sectional structure of FIG. The collector of the transistor (60), a first differential circuit DA ₁ of the transistor (11), (1
2) Connected to the emitter.

Explaining the structure of the transistor (60) in FIG. 4, P
^An N ⁻ type epitaxial layer is formed on the ⁻ type substrate, and the epitaxial layer is separated by a P ⁺ type separation layer, and the epitaxial layer is used as a collector region, and the P type is formed in the collector region. Is formed, and an N ⁺ type emitter region is formed in the base region. In addition, in the electrode formation portion of the collector region,
An N ⁺ type region is formed. Further, an SiO ₂ layer as an insulating layer is formed on the upper surface of the epitaxial layer, and a through hole is formed in the SiO ₂ layer at a portion corresponding to each of the collector region, the base region and the emitter region, and an electrode made of Al is formed at that portion. Are formed. The substerate is grounded, and the emitter region and the base region are directly connected to each other.

A PN junction is formed between the collector region and the substrate and between the collector region and the separation layer,
Since these PN junctions are reverse-biased, capacitance (stray capacitance) is formed in the PN junction.

(3) is a video voltage / current conversion circuit, which is a video input terminal
Video voltage signals from TV ₁ and TV ₂ are converted into video current signals, and the transistor (1) of the double balance mixer (1) is converted.
Supply to the emitters of 5) and (16).

(31) and (32) are a pair of differential transistors, the collector of one of the transistors (32) is connected to the power supply + B, and the collector of the other transistor (31) is the transistor (15) of the double balance mixer (1). ), (16), the emitters of the transistors (31), (32) are connected to each other through a linearity improving resistor (33), and a constant current transistor (3) is provided.
4), (35) Between collector-emitter and resistor (3
Grounded through 6) and (37).

Then, the video input terminals TV ₁ and TV ₂ are derived from the bases of the pair of differential transistors (32) and (31) through the resistors (38) and (39), respectively. Transistor (34),
The bias voltage from the bias power source (28) is commonly applied to each base of (35).

Between the bases of the transistors (31) and (32) and the ground, video signal / test pattern signal changeover switches SW ₁ and SW _{2 which} are turned on / off in conjunction with each other are connected.

(4) is a test pattern voltage / current conversion circuit, which converts a test pattern voltage signal from the test pattern input terminals TT ₁ and TT ₂ into a test pattern current signal, and outputs the test pattern current signal to the transistor (15) of the double balance mixer (1). ), (16) emitter.

(41) and (42) are a pair of differential transistors, the collector of one of the transistors (42) is connected to the power supply + B, and the collector of the other transistor (41) is the transistor (15) of the double balance mixer (1). ), (16), the emitters of the transistors (41), (42) are connected to each other through a linearity improving resistor (43), and the constant current transistors (4) are connected to each other.
4), (45) Between collector-emitter and resistor (4
Grounded through 6) and (47).

Then, test pattern input terminals TT ₁ and TT ₂ are derived from the bases of the pair of differential transistors (41) and (42), respectively. A bias voltage from a bias power source (48) [may be the same as the bias power source (28) described above] is commonly applied to the bases of the transistors (44) and (45).

(5) is a test pattern signal generation circuit, which is a power supply (55)
Is connected to the test pattern input terminals TT ₁ and TT ₂ through resistors (53) and (54) each having a predetermined resistance value, and these input terminals TT ₁ and TT ₂ are turned on / off switches (51), respectively. , (52) to be grounded.

The switch (51) is a horizontal sync signal generation switch.
With horizontal synchronization, it is turned on every predetermined time. The waveform of the horizontal synchronizing signal a supplied to this transistor (42) is
Shown in Figure A. The switch (52) is a switch for generating a white bar in the vertical direction, and is turned on for a predetermined time with a predetermined time interval between adjacent horizontal synchronizing signals a. The waveform of the test pattern signal b supplied to the transistor (42) is shown in FIG. 2B. FIG. 2C shows a composite waveform of these signals a and b. Further, FIG. 3 shows a monitor screen of such a test pattern on a television receiver.

Video / test pattern switch SW ₁ and SW ₂ described above
When these are off, the video current signal from the video voltage / current conversion circuit (3) is supplied to the emitters of the transistors (15) and (16) of the double balance mixer (1), and when it is on Is supplied with the test pattern current signal from the test pattern voltage / current conversion circuit (4) to the emitters of the transistors (15) and (16) of the double balance mixer (1).

Next, the operating principle of the double balance mixer (1) will be described with reference to FIG. Incidentally, in FIG. 5, parts corresponding to those in FIG. 1 are designated by the same reference numerals. Fifth
In the figure, a modulation signal source SIG is connected between the bases of the transistors (22) and (31) and each emitter thereof is grounded through a constant current source IK for the sake of easy understanding of the operation description.

In Fig. 5, constant current of constant current source IK is 4I, oscillator OS
The carrier voltage signal of C is represented by ey, and the modulation voltage signal is represented by ex.

The currents flowing through the collectors of the transistors (22) and (31) are expressed as follows.

2I (1 + x) (1) 2I (1-x) (2) where x is a coefficient proportional to the instantaneous voltage of the modulation voltage signal ex, and is in the range of 0 ≦ x ≦ 1.

The currents i ₁ and i ₃ flowing in the collectors of the transistors (11) and (15) are expressed as follows, respectively.

i ₁ = I (1 + y) (1 + x) (3) i ₃ = I (1-y) (1-x) (4) where y is a coefficient proportional to the instantaneous voltage of the carrier voltage signal ey, It is in the range of 0 ≦ x ≦ 1.

Thus, the output current i ₁₁ flowing through the resistor (13) becomes
It is expressed as follows.

i ₁₁ = i ₁ + i ₃ = I (1 + y) (1 + x) + I (1-y)
(1-x) = 2I + 2Ixy (5) In this equation (2), 2I represents a constant direct current and 2Ixy represents a signal current. Due to the output current flowing through the resistor (14)
I ₁₂ is the sum of the currents i ₂ and i ₄ flowing through the collectors of the transistors (12) and (16), and is expressed as follows.

i ₁₂ = i ₂ + i ₄ = I (1-y) (1 + x) + I (1 + y)
(1-x) = 2I-2Ixy (6) Therefore, the stray capacitance C of the transistor (41) connected to the emitters of the transistors (15) and (16) of the second differential circuit DA ₂ in FIG. Considering the above equation (5)
Can be rewritten as the following expression in which y in Expression (5) is replaced with ky.

i ₁₁ = i ₁ + i ₃ = I (1 + y) (1 + x) + I (1-ky)
(1-x) = I (1 + y + x + xy) + I (1-ky-x +
kyx) = 2I + I (y−ky + xy + kxy) = 2I + Ixy (1 + k) + Iy (1-k) (7) In this formula (7), 2I is a constant direct current, Ixy (1 + k) + Iy (1-k) = i ₀ (8) is the signal current. In this equation (7), k is the reactance due to the stray capacitance C of the transistor (41), that is,
A coefficient that changes approximately in proportion to 1 / ωC, and the range is 0 <k
<1 and changes according to the angular frequency ω, that is, the frequency of the carrier voltage signal ey.

Iy (1-k) in equation (8) is a term that changes in proportion to the carrier level, and this term is Ixy (1 + k)
Is a term that greatly changes in response to a change in k, that is, a change in frequency, in other words, Iy (1-k) is a carrier leak that greatly changes in accordance with a carrier frequency. In this case, the characteristic of the modulation degree (video modulation degree) with respect to the carrier level and the carrier frequency is the eighth
It has the characteristics shown in the figure.

Therefore, as shown in FIG. 1, by connecting the collectors of the transistors (11) and (12) of the first differential circuit DA ₁ to the collectors of the transistors (60) whose base and emitter are connected, First and second differential circuits DA ₁ and D
The capacitance of each differential transistor with respect to A _{2 is} balanced with respect to the emitter, whereby the coefficient k is set to 1 and the output current i ₁₁ is expressed by the above-mentioned equation (6). By doing so, as shown by the curve F in FIG. 6, the image modulation degree (modulation degree) (%) becomes constant regardless of the change of the carrier level (dBm), and moreover, it becomes constant regardless of the change of the carrier frequency. Becomes

In the above-described embodiment, since M = 1 and N = 2, the capacity balance adjusting transistor (60) is replaced by the transistor of the _first differential circuit DA ₁ . (1
I connected to each emitter of 1) and (12), but NM was 2,
In the case of 3, 4 ..., the N−M capacitance balancing transistors are connected to the emitters of the transistors (11) and (12) of the first differential circuit DA _1. Just do it. However, when the value of the stray capacitance of the capacitance balance adjusting transistor is made different from the stray capacitance values of the other transistors formed in the IC, it is said that the number of capacitance balancing adjusting transistors is equal to NM. Not exclusively.

[Effect of device]

According to the present invention described above, in an amplitude modulation device using a double balance mixer, even if the number of differential type voltage / current conversion circuits respectively connected to a pair of differential circuits of the double balance mixer is different, It is possible to obtain an amplitude modulator in which the degree of modulation is constant regardless of changes in carrier level and carrier frequency.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing an embodiment of the present invention, FIG. 2 is a timing channel showing signals of a test signal generating circuit, and FIG.
FIG. 4 is a diagram showing a test pattern, FIG. 4 is an explanatory diagram of elements used in the embodiment, FIG. 5 is a circuit diagram for explaining the operation of the double balance mixer, and FIG. 6 is a carrier level vs. image of the embodiment. FIG. 7 is a curve diagram showing the modulation degree characteristic, FIG. 7 is a circuit diagram showing the conventional example, and FIG. 8 is a curve diagram showing the carrier level vs. image modulation degree characteristic of the conventional example. (1) is a double balance mixer, (2) is the audio voltage /
Current conversion circuit, (3) voltage / current conversion circuit for video,
(4) is a voltage / current conversion circuit for test pattern, (5)
Is a test pattern signal generating circuit, and (60) is a capacitance balance adjusting transistor.

Claims (1)

[Scope of utility model registration request] 1. A double balance mixer including first and second differential circuits each including a pair of differential transistors, and a pair of differential transistors in each of the first and second differential circuits. An oscillator for supplying a carrier signal to the base and a pair of differential transistors are provided. A modulation voltage signal is input to each of the bases, and a modulation current signal output from the collector of one of the differential transistors is supplied to the above The first differential circuit includes M (M = 1, 2, 3, ...) First voltage / current conversion circuits to be supplied to the emitters of the pair of differential transistors, and a pair of differential transistors. A modulation voltage signal is input to each base, and a modulation current signal output from the collector of one of the differential transistors is supplied to the emitters of the pair of differential transistors of the second differential circuit. N (N = 2, 3, 4, ..., And N> M) second voltage / current conversion circuits, and emitters of a pair of differential transistors of the first differential circuit. And an amplitude modulation device connected to the capacitor for adjusting the capacitance balance.