JPH0786401A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

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Publication number
JPH0786401A
JPH0786401A JP23060093A JP23060093A JPH0786401A JP H0786401 A JPH0786401 A JP H0786401A JP 23060093 A JP23060093 A JP 23060093A JP 23060093 A JP23060093 A JP 23060093A JP H0786401 A JPH0786401 A JP H0786401A
Authority
JP
Japan
Prior art keywords
film
refractory metal
alloy
wiring
metal film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP23060093A
Other languages
Japanese (ja)
Inventor
Toshio Taniguchi
敏雄 谷口
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP23060093A priority Critical patent/JPH0786401A/en
Publication of JPH0786401A publication Critical patent/JPH0786401A/en
Pending legal-status Critical Current

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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PURPOSE:To restrain imperfect contact and increase of wiring resistance, and improve reliability of wiring, regarding the wiring formation of a multilayered structure of high melting point metal (upper layer)/Al, alloy (lower layer). CONSTITUTION:(1) Process wherein an Al alloy film 4 and a high melting point metal film 5 are formed in order on a semiconductor substrate 1 is prepared, and the film formation temperature of the Al, alloy film is made higher than that of the high melting point metal film 5. (2) The Al alloy film 4 does not contain Si. (3) TiN is used as the high melting point metal film 5 and Al-Cu-Ti (0.15% or lower) alloy is used as the Al alloy film 4. (4) The film formation temperature of the high melting point metal film 5 is set to be 400 deg.C, and preliminarily heating is performed within 10 seconds. (5) The film formation temperature of the Al alloy film 4 is set to be 500 deg.C or higher.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は半導体装置の製造方法に
係り, 特に, 高融点金属(上層)/アルミニウム(Al)合
金(下層)の積層膜を用いて配線を形成する方法に関す
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for forming wiring using a laminated film of refractory metal (upper layer) / aluminum (Al) alloy (lower layer).

【0002】[0002]

【従来の技術】従来の半導体装置では,配線膜として単
層のAl合金膜, あるいはAl合金膜 (上層) /高融点金属
膜(下層のバリアメタル)の積層構造が用いられてき
た。
2. Description of the Related Art In a conventional semiconductor device, a single-layer Al alloy film or a laminated structure of an Al alloy film (upper layer) / refractory metal film (lower barrier metal) has been used as a wiring film.

【0003】ところが,素子の微細化とともに, 層間絶
縁膜に開けられたコンタクトホールを通じて上下配線を
接続する際に接続の信頼度が問題となり, Al合金膜の上
にさらに高融点金属膜を成膜している。従って, 上層高
融点金属膜/Al合金膜/下層高融点金属膜(バリアメタ
ル)の3層構造をとっている。下層高融点金属膜の成膜
は, 下地とのコンタクトのために必要な技術であるが,
本発明には直接関係がないので,以下の本発明の説明で
は省略して, 上層高融点金属膜/Al合金膜の積層構造に
ついて説明する。
However, with the miniaturization of the device, the reliability of the connection becomes a problem when connecting the upper and lower wirings through the contact holes formed in the interlayer insulating film, and a refractory metal film is further formed on the Al alloy film. is doing. Therefore, it has a three-layer structure of upper refractory metal film / Al alloy film / lower refractory metal film (barrier metal). The formation of the lower refractory metal film is a necessary technique for contacting the base,
Since it is not directly related to the present invention, it is omitted in the following description of the present invention, and the laminated structure of the upper refractory metal film / Al alloy film will be described.

【0004】[0004]

【発明が解決しようとする課題】従来, Al合金膜の上に
高融点金属膜を成膜した場合の問題点としては以下のも
のがある。
[Problems to be Solved by the Invention] Conventionally, there are the following problems when a refractory metal film is formed on an Al alloy film.

【0005】 Al合金上に高融点金属を成膜するた
め,後工程における熱処理によるAlのグレイン成長が抑
制され,配線の信頼度が積層しない場合に比し劣る。 Alのグレインを高融点金属を成膜する前に大きくす
るために, Alの成膜温度を上げるとシリコン(Si)を含む
Al合金 (例えば, Al-Si-Cu) ではSiのノジュール (塊,
結節) が大きくなり,配線の形成過程において残渣を残
してしまう。
Since the refractory metal is deposited on the Al alloy, grain growth of Al due to the heat treatment in the subsequent process is suppressed, and the reliability of the wiring is inferior to that when the wiring is not stacked. In order to increase the Al grains before forming the refractory metal, increasing the Al film formation temperature causes silicon (Si) to be contained.
In Al alloys (for example, Al-Si-Cu), Si nodules (lumps,
The nodules become large, leaving a residue in the wiring formation process.

【0006】 上層高融点金属膜/Al合金膜として,
TiN/Al-Cu-Tiの積層構造においては,TiN 中のTiがAl-C
u-Ti中に拡散し,Al-Cu-Ti金属の固溶限度(0.15 %) 以
上のTiは過剰となり結晶粒界に存在しグレインの成長を
妨げる。
As the upper refractory metal film / Al alloy film,
In the TiN / Al-Cu-Ti laminated structure, Ti in TiN is Al-C.
It diffuses into u-Ti, and Ti exceeding the solid solution limit (0.15%) of the Al-Cu-Ti metal becomes excessive and exists at the grain boundaries, hindering grain growth.

【0007】 高融点金属の成膜温度が 400℃以上で
あると,また, 400 ℃以下であっても30秒程度のプレヒ
ートを行うと, 高融点金属成膜時にAl合金膜にヒロック
(突起) を発生し, 配線の形成仮定で残渣となる。
If the film forming temperature of the refractory metal is 400 ° C. or higher, and if preheating is performed for about 30 seconds even at 400 ° C. or lower, hillocks are formed on the Al alloy film during the film formation of the refractory metal.
(Protrusions) are generated and become residues on the assumption that the wiring is formed.

【0008】 膜質を良くするために高温で成膜した
高融点金属を用いた場合は,上記の問題が生じる。 上層高融点金属膜/Al合金膜上の層間絶縁膜にコン
タクトホールを開口し,開口された状態で熱処理を行う
と, 高融点金属が酸化され,上層配線との間にコンタク
ト不良が発生する。
If a refractory metal formed at a high temperature is used to improve the film quality, the above problem occurs. If a contact hole is opened in the interlayer insulating film on the upper refractory metal film / Al alloy film and heat treatment is performed in the opened state, the refractory metal is oxidized and contact failure occurs with the upper wiring.

【0009】 上層高融点金属膜/Al合金膜の積層構
造では, 後工程の熱処理温度が高いと, 配線のシート抵
抗が上がり低い配線抵抗が得られなくなる。 本発明は上記の問題点を解決し,上層高融点金属膜/Al
合金膜の積層構造の上下配線のコンタクト不良や配線抵
抗の増加を抑え, 配線の信頼性を向上することを目的と
する。
In the laminated structure of the upper refractory metal film / Al alloy film, if the heat treatment temperature in the subsequent step is high, the sheet resistance of the wiring increases and a low wiring resistance cannot be obtained. The present invention solves the above problems and solves the problem of the upper refractory metal film / Al.
The purpose of the present invention is to improve the reliability of the wiring by suppressing the contact failure of the upper and lower wiring and the increase of the wiring resistance of the laminated structure of the alloy film.

【0010】[0010]

【課題を解決するための手段】上記課題の解決は,1)
半導体基板 1上にアルミニウムまたはアルミニウム合金
膜 4と高融点金属膜または高融点金属化合物膜 5とを順
に成膜する工程を有し,該アルミニウム合金膜の成膜温
度を該高融点金属膜の成膜温度より高くする半導体装置
の製造方法,あるいは2)前記アルミニウム合金膜 4
は,その成分にシリコンを含まない前記1)記載の半導
体装置の製造方法,あるいは3)前記高融点金属膜 5に
窒化チタン(TiN) を用い, 前記アルミニウム合金膜(4)
にアルミニウム(Al)−銅(Cu)−チタン(Ti)合金を用い,
かつ該チタンの濃度を0.15%以下とする前記1)記載の
半導体装置の製造方法,あるいは4)前記高融点金属膜
5の成膜温度を 400℃とし,かつ成膜前に成膜温度で10
秒以下の時間で予備加熱を行う前記1)記載の半導体装
置の製造方法,あるいは5)前記アルミニウム合金膜 4
の成膜温度を 500℃以上とする前記1)記載の半導体装
置の製造方法により達成される。
[Means for Solving the Problems] 1)
There is a step of sequentially forming an aluminum or aluminum alloy film 4 and a refractory metal film or refractory metal compound film 5 on the semiconductor substrate 1, and the film formation temperature of the aluminum alloy film is set to the film formation temperature of the refractory metal film. Semiconductor device manufacturing method in which the temperature is higher than the film temperature, or 2) the aluminum alloy film 4
Is a method for manufacturing a semiconductor device as described in 1) above, which does not contain silicon, or 3) uses titanium nitride (TiN) for the refractory metal film 5, and the aluminum alloy film (4)
Aluminum (Al) -copper (Cu) -titanium (Ti) alloy is used for
And the method for manufacturing a semiconductor device according to 1), wherein the concentration of titanium is 0.15% or less, or 4) the refractory metal film.
The film-forming temperature of 5 was 400 ° C, and the film-forming temperature was 10
1) The method for manufacturing a semiconductor device according to 1) above, wherein the preheating is performed for a time of not more than 2 seconds;
This is achieved by the method for producing a semiconductor device according to 1), wherein the film forming temperature is 500 ° C. or higher.

【0011】[0011]

【作用】本発明では,上層高融点金属膜/Al合金膜の積
層構造において,Al合金の成膜温度を上げ,高融点金属
の成膜温度をこれより下げており,高融点金属の成膜前
にAlの成膜温度を高くすることによりAlのグレインを成
長させ,また,高融点金属の成膜温度を下げることによ
り, 高融点金属の成膜後にAlのヒロックを発生させない
ようにしている。
In the present invention, in the upper layer refractory metal film / Al alloy film laminated structure, the Al alloy film formation temperature is raised and the refractory metal film formation temperature is lowered below this temperature. By increasing the Al film formation temperature before, the Al grains grow, and by decreasing the refractory metal film formation temperature, Al hillocks are not generated after the refractory metal film formation. .

【0012】また,本発明では, 後工程の熱処理により
コンタクト孔内に露出した高融点金属を酸化させないよ
うに,ウエハの熱処理装置へのロードイン/アウトの際
の温度を決め,さらに配線抵抗の上昇を防ぐために後工
程の熱処理温度の最大値を決めている。
Further, in the present invention, the temperature at the time of load-in / out of the wafer to / from the heat treatment apparatus is determined so that the refractory metal exposed in the contact hole is not oxidized by the heat treatment in the subsequent step, and the wiring resistance In order to prevent the rise, the maximum heat treatment temperature in the subsequent process is set.

【0013】[0013]

【実施例】図1は本発明の実施例を説明する断面図であ
る。この例は16M SRAMの1層目配線を示す。半導体基板
1上に被着された層間絶縁層 2にコンタクトホールを形
成する。次いで, スパッタ法等によりバリアメタル膜
(下層高融点金属膜) 3として厚さ100 nm/20 nmのTiN
(上層)/Ti (下層) の2層からなる積層膜を被着する。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a sectional view for explaining an embodiment of the present invention. This example shows the first layer wiring of 16M SRAM. Semiconductor substrate
A contact hole is formed in the interlayer insulating layer 2 deposited on the layer 1. Then, a TiN film with a thickness of 100 nm / 20 nm is formed as a barrier metal film (lower refractory metal film) 3 by sputtering or the like.
A laminated film consisting of two layers (upper layer) / Ti (lower layer) is applied.

【0014】次いで,上層と下層間のバリア性の向上及
び上層Al合金膜のエレクトロマイグレーション防止のた
めに, バリアメタルのアニールを窒素(N2)雰囲気中で 4
50℃, 30分程度行う。
Next, in order to improve the barrier property between the upper and lower layers and prevent electromigration of the upper Al alloy film, annealing of the barrier metal was performed in a nitrogen (N 2 ) atmosphere.
Perform at 50 ℃ for 30 minutes.

【0015】次に, 本発明の工程である上層高融点金属
膜/Al合金膜の積層構造の形成工程に入る。Al合金膜 4
として, Al-0.1%Cu-0.1%Ti合金を用い, 成膜温度 350
℃で 350nmの厚さに成膜する。ここで,Tiの濃度は合金
中の固溶限度である0.15%以下にして,過剰チタンがAl
グレインの境界に析出して, グレインの成長を妨げない
ようにする (請求項3対応)。
Next, the step of forming the laminated structure of the upper refractory metal film / Al alloy film, which is the step of the present invention, is started. Al alloy film 4
Al-0.1% Cu-0.1% Ti alloy was used as the
Form a film with a thickness of 350 nm at ℃. Here, the Ti concentration is set to 0.15% or less, which is the solid solution limit in the alloy, and the excess titanium is Al
It is not deposited on the grain boundaries and hinders grain growth (corresponding to claim 3).

【0016】上層高融点金属膜 5として,高融点金属化
合物膜TiN を用い, 同一真空内で連続して 300℃で10nm
の厚さに成膜する (請求項3対応)。このように,上層
高融点金属膜 5の成膜温度よりAl合金膜 4の成膜温度よ
り高くして,上層高融点金属膜 5の成膜前にAlのグレイ
ンを成長させて配線の信頼性を向上している (請求項1
対応)。
As the upper refractory metal film 5, a refractory metal compound film TiN is used, and the film is continuously grown in the same vacuum at 300 ° C. for 10 nm.
The film is formed to a thickness of (corresponding to claim 3). As described above, the temperature of the upper refractory metal film 5 is higher than that of the Al alloy film 4, and the Al grains are grown before the upper refractory metal film 5 is formed to improve the reliability of the wiring. Has been improved (claim 1
Correspondence).

【0017】ここで,Al合金膜 4として, 従来用いられ
ていたAl-Si-Cu合金はこの温度でもSiノジュールが発生
し残渣となるため,Siが含まれるAl合金は使用しない方
がよい (請求項2対応)。
Here, as the Al alloy film 4, since the Al-Si-Cu alloy that has been conventionally used produces Si nodules and remains as a residue even at this temperature, it is better not to use an Al alloy containing Si ( Corresponding to claim 2).

【0018】また,上層高融点金属膜(TiN) 5 の成膜前
には成膜温度でプレヒートを行うが, この時間を 5秒と
短くした。TiN 成膜前にプレヒートを行う理由は,良質
の膜質を得るためにウエハの脱ガスを行うためと,プレ
ヒートにより成膜温度を安定化させてから成膜を行うた
めである。プレヒート時間の最小限は成膜装置内のガス
圧が安定する時間を目安とし,成膜装置内の放電が安定
する時間を選ぶ。プレヒート時間が10秒を越すとAlのヒ
ロックが発生するので,この時間を最大限とする。 (請
求項4対応)。
Before the upper refractory metal film (TiN) 5 is formed, preheating is performed at the film forming temperature, but this time was shortened to 5 seconds. The reason for performing preheating before TiN film formation is to degas the wafer in order to obtain good film quality and to perform film formation after stabilizing the film formation temperature by preheating. The minimum preheating time is based on the time during which the gas pressure in the film deposition system stabilizes, and the time during which the discharge within the film deposition system stabilizes is selected. If the preheat time exceeds 10 seconds, hillocks of Al will occur, so this time should be maximized. (Corresponding to claim 4).

【0019】また, TiN/Alの相互拡散はTiN の成膜温度
が高いほど抑制されることがわかっている。例えば, Ti
N を 500℃で成膜した場合は, 300 ℃で成膜した場合よ
り膜質は良い(図2参照)。
Further, it has been known that the TiN / Al interdiffusion is suppressed as the TiN film forming temperature increases. For example, Ti
When N is formed at 500 ° C, the film quality is better than when it is formed at 300 ° C (see Fig. 2).

【0020】図2はTiN/Tiの相互拡散によるシート抵抗
の熱処理温度依存を示す図である。図中, パラメータは
TiN/の成膜温度を示し, (1) はTiN を 500℃で成膜した
場合, (2) はTiN を 300℃で成膜した場合である。
FIG. 2 is a diagram showing the heat treatment temperature dependence of the sheet resistance due to the mutual diffusion of TiN / Ti. In the figure, the parameters are
The TiN / deposition temperature is shown in (1) when TiN is formed at 500 ℃ and (2) when TiN is formed at 300 ℃.

【0021】TiN を 500℃でAl上に成膜すると, Alにヒ
ロックを生ずるが, ヒロックはAlをこれよりさらに高い
温度, 例えば 550℃で成膜することで防止できる (請求
項5対応)。
When TiN is formed on Al at 500 ° C., hillocks are generated in Al. The hillocks can be prevented by forming Al at a higher temperature, for example, 550 ° C. (corresponding to claim 5).

【0022】次に, 上記3層構造の配線膜をパターニン
グして配線を形成し,その上に層間絶縁膜 6を被着し,
上層配線に対するコンタクトホール 7を形成する。コン
タクトホール 7を開口後に, 通常層間絶縁膜及びコンタ
クトホール側壁の脱ガスのための熱処理を行う。
Next, the wiring film having the three-layer structure is patterned to form wiring, and the interlayer insulating film 6 is deposited on the wiring,
A contact hole 7 for the upper wiring is formed. After opening the contact hole 7, heat treatment is usually performed for degassing the interlayer insulating film and the side wall of the contact hole.

【0023】この熱処理は, 窒素雰囲気中で 300℃でロ
ードインし,400 ℃ (請求項7対応)で30分程度のアニ
ールを行い, 300 ℃でロードアウトする。ここで,ロー
ドイン/アウトの温度 350℃より高くすると配線が酸化
するため, この温度以下とする。 (請求項6対応) 図3はTiN/Tiの相互拡散によるシートコンダクタンスの
変化率の経過時間依存を示す図である。
In this heat treatment, load-in is performed at 300 ° C. in a nitrogen atmosphere, annealing is performed at 400 ° C. (corresponding to claim 7) for about 30 minutes, and load-out is performed at 300 ° C. If the load-in / out temperature is higher than 350 ° C, the wiring will be oxidized, so the temperature should be below this temperature. (Corresponding to Claim 6) FIG. 3 is a graph showing the elapsed time dependence of the change rate of the sheet conductance due to the mutual diffusion of TiN / Ti.

【0024】図中, パラメータは熱処理温度を示し,
(1) は 400℃の熱処理, (2) は 450℃の熱処理である。
この結果より, 配線形成後の後工程の熱処理は400 ℃以
下の温度で行うようにする (請求項7対応)。
In the figure, the parameter indicates the heat treatment temperature,
(1) is heat treatment at 400 ℃ and (2) is heat treatment at 450 ℃.
From this result, the heat treatment in the post process after the wiring formation is performed at a temperature of 400 ° C. or less (corresponding to claim 7).

【0025】実施例では上層高融点金属膜の下層の配線
膜としてAl合金膜を用いたが, これの代わりに純Alを用
いても本発明を適用できる。また,上層高融点金属化合
物膜としてTiN を用いたが, これの代わりにTiを用いて
も,またはその他の高融点金属膜(高融点金化合物膜)
を用いても本発明は適用できる。
In the embodiment, the Al alloy film is used as the lower wiring film of the upper refractory metal film, but the present invention can be applied by using pure Al instead. Although TiN was used as the upper refractory metal compound film, Ti may be used instead of TiN or other refractory metal film (high melting point gold compound film).
The present invention can be applied by using

【0026】[0026]

【発明の効果】本発明によれば,高融点金属(上層)/
Al合金(下層)の積層構造の配線のコンタクト不良や配
線抵抗の増加を抑え, 配線の信頼性が向上した。
According to the present invention, refractory metal (upper layer) /
The reliability of the wiring was improved by suppressing contact failure and increase in wiring resistance of the wiring of the laminated structure of Al alloy (lower layer).

【図面の簡単な説明】[Brief description of drawings]

【図1】 本発明の実施例を説明する断面図FIG. 1 is a sectional view illustrating an embodiment of the present invention.

【図2】 TiN/Tiの相互拡散によるシート抵抗の熱処理
温度依存を示す図
FIG. 2 is a diagram showing the heat treatment temperature dependence of sheet resistance due to TiN / Ti interdiffusion.

【図3】 TiN/Tiの相互拡散によるシートコンダクタン
スの変化率の経過時間依存を示す図
FIG. 3 is a diagram showing the elapsed time dependence of the change rate of the sheet conductance due to the TiN / Ti interdiffusion.

【符号の説明】[Explanation of symbols]

1 半導体基板 2 層間絶縁層 3 バリアメタル膜(下層高融点金属膜)でTiN(上層)/T
i (下層) 膜 4 Al合金膜でAl-0.1%Cu-0.1%Ti膜 5 上層高融点金属膜でTiN 膜 6 上層の層間絶縁膜 7 上層の層間絶縁膜に開口されたコンタクトホール
1 semiconductor substrate 2 interlayer insulating layer 3 barrier metal film (lower layer refractory metal film) made of TiN (upper layer) / T
i (lower layer) film 4 Al alloy film, Al-0.1% Cu-0.1% Ti film 5 Upper layer, refractory metal film, TiN film 6 Upper interlayer insulating film 7 Contact hole opened in upper interlayer insulating film

Claims (5)

【特許請求の範囲】[Claims] 【請求項1】 半導体基板(1) 上にアルミニウムを含む
金属膜(4)と高融点金属膜または高融点金属化合物膜
(5) とを順に成膜する工程を有し,該アルミニウム合金
膜の成膜温度を該高融点金属膜の成膜温度より高くする
ことを特徴とする半導体装置の製造方法。
1. A metal film (4) containing aluminum and a refractory metal film or refractory metal compound film on a semiconductor substrate (1).
(5) is sequentially formed, and the film forming temperature of the aluminum alloy film is set higher than the film forming temperature of the refractory metal film.
【請求項2】 前記アルミニウム合金膜(4)は,その成
分にシリコンを含まないことを特徴とする請求項1記載
の半導体装置の製造方法。
2. The method of manufacturing a semiconductor device according to claim 1, wherein the aluminum alloy film (4) does not contain silicon as a component.
【請求項3】 前記高融点金属膜(5) に窒化チタン(Ti
N) を用い, 前記アルミニウム合金膜(4)にアルミニウ
ム(Al)−銅(Cu)−チタン(Ti)合金を用い, かつ該チタン
の濃度を0.15%以下とすることを特徴とする請求項1記
載の半導体装置の製造方法。
3. A titanium nitride (Ti) is formed on the refractory metal film (5).
N) is used, an aluminum (Al) -copper (Cu) -titanium (Ti) alloy is used for the aluminum alloy film (4), and the titanium concentration is 0.15% or less. A method for manufacturing a semiconductor device as described above.
【請求項4】 前記高融点金属膜(5) の成膜温度を 400
℃とし,かつ成膜前に成膜温度で10秒以下の時間で予備
加熱を行うことを特徴とする請求項1記載の半導体装置
の製造方法。
4. The deposition temperature of the refractory metal film (5) is set to 400.
2. The method for manufacturing a semiconductor device according to claim 1, wherein preheating is performed at a film forming temperature of 10 seconds or less before film forming.
【請求項5】 前記アルミニウム合金膜(4)の成膜温度
を 500℃以上とすることを特徴とする請求項1記載の半
導体装置の製造方法。
5. The method of manufacturing a semiconductor device according to claim 1, wherein the film forming temperature of the aluminum alloy film (4) is 500 ° C. or higher.
JP23060093A 1993-09-17 1993-09-17 Manufacture of semiconductor device Pending JPH0786401A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP23060093A JPH0786401A (en) 1993-09-17 1993-09-17 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP23060093A JPH0786401A (en) 1993-09-17 1993-09-17 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPH0786401A true JPH0786401A (en) 1995-03-31

Family

ID=16910289

Family Applications (1)

Application Number Title Priority Date Filing Date
JP23060093A Pending JPH0786401A (en) 1993-09-17 1993-09-17 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPH0786401A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1997006562A1 (en) * 1995-08-10 1997-02-20 Siemens Aktiengesellschaft Metal interconnect structure for an integrated circuit with improved electromigration reliability

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1997006562A1 (en) * 1995-08-10 1997-02-20 Siemens Aktiengesellschaft Metal interconnect structure for an integrated circuit with improved electromigration reliability

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