JPH0786356A - Evaluating device for semiconductor characteristic - Google Patents

Abstract

PURPOSE:To measure the life time of silicon wafer in a highly efficient manner and to contrive high reliability of the silicon wafer by a method wherein, when the life time of the silicon wafer is measured, the resistvity of an oxide film is measured before measrement of C-t characteristics, and the present or not of leakage on a gate oxide film is confirmed. CONSTITUTION:A probe 6 is placed on the MOS capacitor 5 on the specific position of a silicon wafer, a current-voltage characteristics measuring device 8 is selected by a change-over switch 7, and the resistivity of a gate oxide film is measured. Whether this resistivity is higher than the prescribed value, which is determined by referring to the formula I, is judged by a control computer, and if it is in excess of the prescribed value, a capacitance meter 9 is selected by a changeover switch 7, and the life time is computed by measuring Ct characteristics. If the specific resistance is lower than the prescribed value, the specific data showing the presence of an oxide film leakage is written in as the data of life time while the change-over switch is being maintained in the current-voltage characteristic measuring device 8.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to efficiency and high reliability of lifetime measurement of silicon wafers.

[0002]

2. Description of the Related Art The conventional lifetime measurement of a silicon wafer is performed according to the flow chart shown in FIG.
The characteristic is measured, and the lifetime is calculated by Zerbst analysis or the like.

Here, the MOS capacitor has a structure shown in FIG. 3, and is composed of a gate 1, a gate oxide film 2, a silicon wafer 3, and a back surface electrode 4. When the lifetime of the silicon wafer is evaluated by the procedure of FIG. 2, a normal Ct curve as shown in FIG. 4 is obtained when the gate oxide film 2 has no leak. However, if there is a leak in the gate oxide film 2 due to an abnormality in the manufacturing process of the MOS capacitor, the C-t characteristic is as shown in FIG.
It changes like.

[0004]

According to our analysis,
In FIG. 5, since there is a leak in the gate oxide film 2, minority carriers generated inside the silicon wafer 3 flow into the gate 1 through the oxide film, and the apparent lifetime becomes infinite. It turned out that it showed a phenomenon.

As described above, when the gate oxide film 2 has a leak and the specific resistance becomes small, it becomes impossible to measure the lifetime of the silicon wafer, and the Ct measurement itself becomes useless. . In addition, even if there is a leak in the oxide film, it is at least 5 if the presence or absence of a leak in the gate oxide film is determined by measuring only the Ct characteristic.
It is necessary to measure more than the points and it takes time to evaluate. Furthermore, if there is something wrong with the measurement equipment (for example, if the gate voltage is not applied properly).
However, since the waveform of FIG. 5 can be observed, it was not possible to specify whether the waveform was caused by the apparatus or the object to be measured when the waveform shown in FIG. 5 was obtained.

[0006]

According to the present invention, when measuring the lifetime of a silicon wafer, the specific resistance of the oxide film is measured before measuring the Ct characteristic to determine whether or not there is a leak in the gate oxide film. It is characterized by confirming that the lifetime of the silicon wafer can be measured.

[0007]

The present invention will be described in detail below with reference to the drawings.

A flowchart of the lifetime evaluation of the present invention is shown in FIG. The feature is that the specific resistance of the gate oxide film is measured before the measurement of the Ct characteristic, the Ct characteristic is measured if the specific resistance is equal to or more than a predetermined value, and the lifetime is measured if it is smaller than that. Do not do it. This is the content of claim 1.

Here, the most important thing is the above-described determination of the predetermined value, and the method of determining the predetermined value that we have derived will be described in detail below.

First, the (diffused) current component Igen due to minority carriers generated from the depletion layer of the silicon wafer 3 to form the inversion layer is

[0011]

[Equation 2]

It is represented by Here, q is the electron charge amount, n _i is the intrinsic carrier concentration of silicon, t _dep is the over-depletion state (the bias applied to finally form the inversion layer when measuring the Ct characteristics). The depletion layer thickness of the thermally non-equilibrium depletion state where the MOS capacitor first falls depending on the voltage), A
_cap represents the area of the MOS capacitor, and τ represents the generation lifetime of minority carriers in the silicon wafer. At this time, the lateral expansion of the depletion layer is ignored. This approximation holds for a MOS capacitor having a size larger than the depletion layer thickness, but the normal depletion layer thickness is on the order of 1 μm at most, and the size of the MOS capacitor is on the order of 1 mm. This approximation holds. The leak current I _leak in the oxide film is

[0013]

[Equation 3]

Is represented by Where V _od is Ova
Depletion voltage, _tox is the gate oxide film thickness, and ρ is the specific resistance of the oxide film.

In order for the inversion layer to be formed, I _gen > I
It must be a _leak , but let's think about the specific resistance of the oxide film that must be secured because an inversion layer is obtained. The condition that the inversion layer is most easily obtained is the minimum voltage as V _od that can form the inversion layer on the silicon wafer surface.
That is, the case where the threshold voltage is applied. When V _od is made larger than this, I _gen increases almost in proportion to the square root of V _od , but I _leak is in proportion to V _od , so that inversion is less likely to occur. At this time, the thickness t _{dep of the} depletion layer spreading on the silicon wafer is

[0016]

[Equation 4]

Is given. Here, ε _si is the inductivity of silicon. Further, the over depletion voltage V _od applied to the oxide film at this time is

[0018]

[Equation 5]

It becomes V _fb is the flat band voltage of the MOS capacitor, C _ox is the capacitance per unit area of the gate oxide film, and the amount given as C _ox = ε _ox / t _ox , where ε _ox is the dielectric constant of silicon dioxide. Is.

Under the condition of I _gen = I _leak , if the maximum value of the lifetime that can occur in the silicon wafer is τ _max and (4) to (6) are substituted into the current equation, the lifetime can be measured. The following equation is obtained as the minimum value ρ of the gate oxide film.

[0021]

[Equation 6]

In order to allow a margin for the value of ρ at the time of actually measuring the lifetime, a value larger than this value will be used as the predetermined value shown in FIG. This is the content of claim 2.

[0023]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to the drawings.

FIG. 6 shows an apparatus for measuring a large number of MOS capacitors formed on a silicon wafer and evaluating the in-plane distribution of the lifetime of the silicon wafer.

MOS formed in large numbers in a silicon wafer
The capacitor is represented as device under test 5 in this figure. A probe 6 is connected to the gate of the MOS capacitor, and the back side is grounded. The connection from the probe 6 is a current-voltage characteristic measuring device 8 for measuring the specific resistance of the oxide film through a changeover switch 7, and C
It is connected to a capacitance meter 9 for measuring the -t characteristic. The probe 6, the changeover switch 7, the current-voltage characteristic measuring device 8, and the capacitance meter 9 are controlled by the control computer 10 so that the flowchart of FIG. 1 can be realized. In FIG.
The dashed arrows schematically show the exchange of instructions and data between the control computer 10 and the controlled object.

In order to evaluate the lifetime according to the flow chart of FIG. 1, first, a probe is placed on a MOS capacitor at a specific position on a silicon wafer, a current-voltage characteristic measuring device 8 is selected by a changeover switch 7, and a gate is selected. The specific resistance of the oxide film is measured. This resistivity is
The control computer determines whether the value is equal to or higher than the predetermined value determined by referring to the equation (6). If the value is equal to or higher than the predetermined value, the capacitor meter 9 is selected by the changeover switch 7 to obtain the Ct characteristic. To calculate the lifetime. If the value is less than the predetermined value, the changeover switch 7 writes the peculiar data indicating the existence of the oxide film leak as the lifetime data while keeping the current-voltage characteristic measuring device 8. Subsequently, in order to measure another MOS capacitor, the probe is moved to another position, and the lifetime is evaluated by the same means.

[0027]

As described above, according to the present invention, it is possible to omit the unnecessary Ct characteristic evaluation in the measurement of the lifetime of the silicon wafer, and to obtain the fact that the lifetime measurement due to the existence of the oxide film leak is impossible. It is possible to achieve higher efficiency and higher reliability.

[Brief description of drawings]

FIG. 1 is a flow chart showing the features of a silicon wafer lifetime evaluation apparatus of the present invention.

FIG. 2 is a flowchart showing the features of a conventional silicon wafer lifetime evaluation apparatus.

FIG. 3 is a cross-sectional structure diagram of a MOS capacitor.

FIG. 4 is a measurement example of a normal Ct characteristic.

FIG. 5 is a measurement example of Ct characteristics showing an abnormality due to leakage of a gate oxide film and the like.

FIG. 6 is a device configuration diagram showing an embodiment of a lifetime evaluation device for a silicon wafer according to the present invention.

[Explanation of symbols]

 1: Gate 2: Gate oxide film 3: Silicon wafer 4: Backside electrode 5: Object to be measured 6: Probe 7: Changeover switch 8: Current-voltage measurement and measurement device 9: Capacitance meter 10: Control computer

Claims (2)

[Claims] 1. An apparatus for evaluating the lifetime of a silicon wafer by measuring the Ct characteristic of a MOS capacitor, wherein the resistivity of an oxide film is measured before the Ct measurement, and this resistivity is the lifetime. An apparatus for evaluating lifetime of a silicon wafer, wherein Ct measurement is performed when the value is equal to or larger than a predetermined value ρ determined from the upper limit value of Ct, and Ct measurement is not performed when the value is smaller than that. 2. The predetermined value ρ of the specific resistance is given by: The lifetime evaluation device according to claim 1, which is the above. Here, V _fb is the flat band voltage of the MOS capacitor, q is the charge amount of electrons, ε _si is the dielectric constant of silicon, N _sub is the impurity concentration in the silicon wafer, and Φ _F
Is the Fermi potential of the silicon wafer, where Φ _F = (KT / q) ln (N _sub / where Boltzmann constant is k, absolute temperature is T, and intrinsic carrier concentration of silicon is n _i.
n _i) an amount given and, C _ox is the capacitance per unit area of the gate oxide film, the dielectric constant of silicon dioxide epsilon _ox, the gate oxide film圧厚and t _ox C _ox = _{ε ox} / T
It is a quantity given as _ox, and τ _max is the upper limit value of the lifetime to be measured.