JPH0782041B2 - Power supply abnormality detection method - Google Patents

Power supply abnormality detection method

Info

Publication number
JPH0782041B2
JPH0782041B2 JP1044935A JP4493589A JPH0782041B2 JP H0782041 B2 JPH0782041 B2 JP H0782041B2 JP 1044935 A JP1044935 A JP 1044935A JP 4493589 A JP4493589 A JP 4493589A JP H0782041 B2 JPH0782041 B2 JP H0782041B2
Authority
JP
Japan
Prior art keywords
power supply
voltage
count value
time
abnormality
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP1044935A
Other languages
Japanese (ja)
Other versions
JPH02223864A (en
Inventor
徳康 松藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koki Holdings Co Ltd
Original Assignee
Hitachi Koki Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Koki Co Ltd filed Critical Hitachi Koki Co Ltd
Priority to JP1044935A priority Critical patent/JPH0782041B2/en
Publication of JPH02223864A publication Critical patent/JPH02223864A/en
Publication of JPH0782041B2 publication Critical patent/JPH0782041B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、電源異常検出回路、特に商用電源の停電時の
異常を検出する電源異常検出回路に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power supply abnormality detection circuit, and more particularly to a power supply abnormality detection circuit that detects an abnormality when a commercial power supply fails.

〔従来の技術〕[Conventional technology]

第4図に従来より用いられている電源異常検出回路の一
例を示す。同図は商用電源の停電検出に用いられる回路
で、1は商用電源、2は整流回路、3はツエナーダイオ
ード、4はトランジスタ、5は停電表示端子である。
FIG. 4 shows an example of a power supply abnormality detection circuit conventionally used. This figure shows a circuit used for detecting a power failure of a commercial power source, 1 is a commercial power source, 2 is a rectifier circuit, 3 is a zener diode, 4 is a transistor, and 5 is a power failure display terminal.

電源1が正常状態にあるときは直流電圧Vcはツエナーダ
イオード3のツエナー電圧より高く、したがって抵抗R
の両端にはツエナーダイオード3を流れる電流により電
圧降下を生じトランジスタ4はこの電圧降下によりオン
となって端子5の電圧は零となり異常は表示されない。
ここで停電が生ずると電圧Vcが低下するからツエナーダ
イオード3を流れる電流が零とない、したがって抵抗R
の電圧降下が零となるのでトランジスタ4はオフとな
る。トランジスタ4がオフとなれば端子5には電圧Vcが
印加され停電の表示がなされることになる。
When the power supply 1 is in the normal state, the DC voltage Vc is higher than the Zener voltage of the Zener diode 3, and therefore the resistance R
A voltage drop occurs at both ends of the transistor due to the current flowing through the Zener diode 3, and the transistor 4 is turned on by this voltage drop so that the voltage at the terminal 5 becomes zero and no abnormality is displayed.
When a power failure occurs here, the voltage Vc drops, so the current flowing through the Zener diode 3 is not zero, and therefore the resistance R
Since the voltage drop of 0 becomes zero, the transistor 4 is turned off. When the transistor 4 is turned off, the voltage Vc is applied to the terminal 5 and the power failure is displayed.

この回路で停電事故を生じてもトランジスタ4が動作す
るのは整流回路2に大きなキャパシタンスが接続されて
おり、停電時にもある時間直流電圧Vcを保持するためで
ある。
Even if a power failure occurs in this circuit, the transistor 4 operates because a large capacitance is connected to the rectifier circuit 2 and holds the DC voltage Vc for a certain time even during a power failure.

〔発明が解決しようとする課題〕[Problems to be Solved by the Invention]

上述したように第4図に示す回路は部品数も比較的少な
く一電源で済む利点はあるが、反面、停電を生じても直
流電源電圧が保持されることは例えば1〜2サイクル、
あるいはそれ以下の短時間停電に対しても誤動作を生ず
る機器が交流電源に接続されている場合は、この停電検
出器は信頼することができず、むしろ機器誤動作の原因
を調べる場合に障害とさえなりかねぬ嫌いがある。
As described above, the circuit shown in FIG. 4 has an advantage that the number of components is relatively small and one power source is sufficient, but on the other hand, the fact that the DC power source voltage is maintained even if a power failure occurs is, for example, 1 to 2 cycles.
Or if a device that malfunctions even for short-term power outages of less than that is connected to an AC power source, this power failure detector is unreliable, and rather a failure even when investigating the cause of a device malfunction. I hate it.

本発明の目的は、検出精度に優れ信頼性を大幅に向上す
る電源異常検出回路を提供することにある。
An object of the present invention is to provide a power supply abnormality detection circuit that has excellent detection accuracy and greatly improves reliability.

〔課題を解決するための手段〕[Means for Solving the Problems]

本発明は、交流電源の異常を検出する電源異常検出回路
において、交流電源の正負それぞれの電圧にしきい値を
設け、このしきい値を有する交流電源の正負電圧に対応
して動作する一対のスイッチング素子と、スイッチング
素子の立上り立下り信号を入力してスイッチング素子の
動作期間を基準クロックパルスを用いて計数するカウン
タと、この計数動作を電源の各サイクルについて連続し
て行ない、それぞれの計数値を記憶してその時間を演算
して基準値との偏差を求め、偏差を一定値と比較してそ
の大小によって電源の異常を判別する制御手段とによっ
て回路を構成したことを特徴としており、高精度、高信
頼性の電源異常検出回路が得られるようにして目的の達
成を計っている。
The present invention, in a power supply abnormality detection circuit for detecting abnormality of an AC power supply, sets thresholds for positive and negative voltages of the AC power supply, and operates a pair of switchings that operate corresponding to positive and negative voltages of the AC power supply having the thresholds. Element, a counter that inputs the rising and falling signals of the switching element and counts the operating period of the switching element using the reference clock pulse, and this counting operation is performed continuously for each cycle of the power supply, and the respective count values are calculated. It is characterized in that the circuit is composed of a control means that stores the time, calculates the time, obtains the deviation from the reference value, compares the deviation with a constant value, and determines the abnormality of the power supply according to the magnitude of the deviation, and is highly accurate. , We are trying to achieve the purpose by providing a highly reliable power failure detection circuit.

〔作用〕[Action]

本発明の電源異常検出回路では、停電等電源の異常を検
出する場合、電源の正負それぞれの電圧にしきい値を設
けると共に回路に一対のスイッチング素子を連続し、こ
のスイッチング素子が交流電圧の正負電圧に対応してオ
ンとなる期間を基準パルスでカウントし、このカウント
値を例えばマイクロコンピュータに入力して時間toを求
め、この操作を電源周波数の各サイクルについて連続し
て行ない、正常値toと変化値txとの差tpを演算し、tpが
一定値γに対してtp>γの場合に電源に異常が生じたと
して判定するようにしてあるので、例えば電源電圧が低
下して最大値が上記しきい値に接近すればそのときのtx
はtx<toとなり、tp<γとなるので電源電圧の異常低下
や短時間停電に対しても確実に検出することができる。
In the power supply abnormality detection circuit of the present invention, when a power supply abnormality such as a power failure is detected, a threshold value is provided for each of the positive and negative voltages of the power supply and a pair of switching elements are connected in succession to the circuit, and this switching element is a positive or negative voltage of the AC voltage. Corresponding to, the period of turning on is counted by the reference pulse, this count value is input to, for example, a microcomputer to determine the time to, and this operation is performed continuously for each cycle of the power supply frequency, and changes from the normal value to. The difference tp from the value tx is calculated, and when tp is larger than tp for a constant value γ, it is determined that an abnormality has occurred in the power supply. If the threshold is approached, then tx
Since tx <to and tp <γ, it is possible to reliably detect an abnormal drop in the power supply voltage or a short power failure.

〔実施例〕〔Example〕

以下、本発明の一実施例について図を用いて説明する。
第1図は本発明の電源異常検出回路の一実施例を示す系
統図である。同図において、1は交流電源、6は抵抗、
7および8はホトカプラ、9は抵抗、10はホトカプラ7
および8の出力増幅器、11はカウンタ、12はクロック回
路、13はマイクロコンピュータ、14は内部レジスタ、15
は信号を授受するバスライン、Esは電源電圧、Epはホト
トランジスタの出力側電圧、Eoは増幅器出力側電圧、Vc
は直流電圧を示す。
An embodiment of the present invention will be described below with reference to the drawings.
FIG. 1 is a system diagram showing an embodiment of the power supply abnormality detection circuit of the present invention. In the figure, 1 is an AC power supply, 6 is a resistor,
7 and 8 are photocouplers, 9 is a resistor, and 10 is a photocoupler 7.
And 8 output amplifiers, 11 counters, 12 clock circuits, 13 microcomputers, 14 internal registers, 15
Is a bus line for transmitting and receiving signals, Es is a power supply voltage, Ep is a phototransistor output side voltage, Eo is an amplifier output side voltage, Vc
Indicates a DC voltage.

交流電源1の電圧Esがホトカプラ7および8に与えられ
るとホトカプラ7および8はそれぞれ電圧Esの正負電圧
に対応して発光し出力電圧Epを生ずる。電圧Epは増幅器
10により増幅され電圧Epとは波形が反転する電圧Eoを生
ずる。
When the voltage Es of the AC power supply 1 is applied to the photocouplers 7 and 8, the photocouplers 7 and 8 emit light corresponding to the positive and negative voltages of the voltage Es to generate the output voltage Ep. Voltage Ep is an amplifier
A voltage Eo which is amplified by 10 and whose waveform is inverted from the voltage Ep is generated.

カウンタ11には電圧Eoとクロック回路12の基準パルスが
与えられるからカウンタ11はこれらの信号を基に電圧Eo
の立上りと立下り期間におけるパルス数をカウントし、
これをマイクロコンピュータ13に入力する。マイクロコ
ンピュータ13はこのカウント値を内部レジスタ14に格納
すると共に異常の有無を判別し、異常がなければカウン
タ11をリセットさせて、さらに電圧Eoの各サイクルにつ
いてカウントするよう指令し、カウント値の正常な値と
後の値とを比較して電源異常の判定を行なう。
Since the counter 11 is supplied with the voltage Eo and the reference pulse of the clock circuit 12, the counter 11 receives the voltage Eo based on these signals.
Count the number of pulses in the rising and falling periods of
This is input to the microcomputer 13. The microcomputer 13 stores this count value in the internal register 14, determines whether or not there is an abnormality, resets the counter 11 if there is no abnormality, and further issues an instruction to count for each cycle of the voltage Eo. The power supply abnormality is determined by comparing the current value with the subsequent value.

第2図は各部の動作波形図を示すもので、横軸tが時
間、縦軸が電圧Es、EpおよびEoを示す。電圧VFはホトカ
プラ7、8の入力側発光ダイオードの順方向電圧降下を
示すもので、発光ダイオード7、8は電圧Esが電圧VF
越えたとき発光する。この電圧VFは等価的に前述のしき
い値電圧を表わすもので、この素子の場合は特にしきい
値は設けていないが、出力側電圧Epには電圧Esの零およ
びπ位相を中心として時間幅tFのパルス状のオフ期間が
生ずることになる。時間tNが発光期間に対応するオン期
間である。電圧Eoは電圧Epを増幅したものであるから電
圧Epを反転した波形となる。時間toは時間tNに対応する
フォトカプラ7、8のオンとなる時間で電圧Esが正常の
場合を表わし、時間txは電圧Esが低下した場合、時間ty
はさらに低下した場合を示しており、to>txとなる。し
たがってtoの値が電源の正常状態を示すならばto−txま
たはto−tyを求めることにより電源の異常を知ることが
できる。
FIG. 2 is a diagram showing operation waveforms of each part. The horizontal axis t represents time, and the vertical axis represents voltages Es, Ep and Eo. The voltage V F indicates the forward voltage drop of the input side light emitting diodes of the photocouplers 7 and 8, and the light emitting diodes 7 and 8 emit light when the voltage Es exceeds the voltage V F. This voltage V F equivalently represents the above-mentioned threshold voltage, and in the case of this element, no particular threshold value is provided, but the output side voltage Ep is centered around the zero and π phases of the voltage Es. A pulsed off period of time width t F will occur. The time t N is the ON period corresponding to the light emission period. Since the voltage Eo is the amplified voltage Ep, it has a waveform obtained by inverting the voltage Ep. The time to is the time when the photocouplers 7 and 8 are turned on corresponding to the time t N and represents the case where the voltage Es is normal, and the time tx is the time ty when the voltage Es decreases.
Indicates the case of further decrease, and to> tx. Therefore, if the value of to indicates a normal state of the power supply, the abnormality of the power supply can be known by obtaining to-tx or to-ty.

第3図はマイクロコンピュータ13の動作フローチャート
を示すものである。同図において、交流電源1が与えら
れて装置がスタート状態に入ると同図点線に示すイニシ
ャル処理が行なわれる。
FIG. 3 shows an operation flowchart of the microcomputer 13. In the figure, when the AC power supply 1 is applied and the apparatus enters the start state, the initial processing shown by the dotted line in the figure is performed.

イニシャル処理は電圧Eoの立上り時刻t1よりカウンタ11
を起動させてクロックパルスのカウントを開始し、立下
り時刻t2までカウントして終了する。このときのカウン
ト値Noを内部レジスタ14に格納する。次に時刻t1より時
間t2が電源周波数(例えば50Hz)に正しく対応している
か否かα≧to≧βを求めてYESであれば電源は正常でホ
トカプラ7および8が正常に動作していると判定して次
に進む。NOの場合は電源異常と判定して以後の処理を中
止する。この場合、α、βの値は、電源周波数が50Hzで
あればα=10(ms)、β=8.5(ms)、60Hzであればα
=8.3(ms)、β=6.8(ms)で、これらの値を用いて演
算する。
Initial processing is counter the rising time t 1 of the voltage Eo 11
Is started to start counting the clock pulse, count until the falling time t 2 and end. The count value No at this time is stored in the internal register 14. Next, from time t 1, whether time t 2 correctly corresponds to the power supply frequency (for example, 50 Hz) is obtained α ≧ to ≧ β, and if YES, the power supply is normal and the photocouplers 7 and 8 are operating normally. If it is determined that there is, proceed to the next. In the case of NO, it is determined that the power supply is abnormal and the subsequent processing is stopped. In this case, the values of α and β are α = 10 (ms), β = 8.5 (ms) when the power supply frequency is 50 Hz, and α when it is 60 Hz.
= 8.3 (ms) and β = 6.8 (ms), calculation is performed using these values.

イニシャル処理が終了したならばカウンタ11をリセット
させた後、再び電圧Eoの立上り時刻t1よりクロックパル
スの計数を開始させ、時刻t2で終了する。このときのカ
ウント数を例えばNxとするとこのNxを内部レジスタ14内
の上記Noのレジスタとは別のレジスタに格納する、次に
No、Nxよりこれらを時間to、txに変換して時間tp=to−
txを求め、これを一定値γと比較してtp≧γを求め、YE
Sであれば電源異常と判定して警報を出力して装置を停
止する。
When the initial process is completed, the counter 11 is reset, and then the counting of the clock pulse is started again from the rising time t 1 of the voltage Eo, and is finished at the time t 2 . If the count number at this time is Nx, for example, this Nx is stored in a register other than the above No register in the internal register 14, and then
From No and Nx, these are converted into time to and tx, and time tp = to−
Calculate tx and compare it with a constant value γ to calculate tp ≧ γ
If it is S, it is determined that the power supply is abnormal, an alarm is output, and the device is stopped.

NOであれば電源は正常であると判定してカウンタ11をリ
セットし、再び電圧Eoの立上り立下り時間をパルスカウ
ントして上記の判定動作を繰返す。この場合γの値とし
てはγ=2.5(ms)を用いて判定が行なわれる。
If NO, the power supply is determined to be normal, the counter 11 is reset, the rise / fall time of the voltage Eo is pulse counted again, and the above determination operation is repeated. In this case, the determination is performed using γ = 2.5 (ms) as the value of γ.

このようにして電源の停電や電圧の異常低下が高精度か
つ高速度で求められることになる。
In this way, a power failure of the power supply and an abnormal voltage drop are required with high accuracy and high speed.

〔発明の効果〕〔The invention's effect〕

上述したように本発明によれば次のような効果が得られ
る。
As described above, according to the present invention, the following effects can be obtained.

(1)交流電源の瞬時停電、電圧の異常低下等の事故に
対し高精度で検出することができる。
(1) Accidents such as momentary power failure of AC power supply and abnormal voltage drop can be detected with high accuracy.

(2)電源の交流電圧を直接検出するようにしているの
で検出回路に容量性がなく高速度で検出することができ
る。
(2) Since the AC voltage of the power supply is directly detected, the detection circuit has no capacitance and can be detected at high speed.

(3)電源異常検出装置の信頼性を向上することができ
る。
(3) The reliability of the power supply abnormality detection device can be improved.

【図面の簡単な説明】[Brief description of drawings]

第1図は本発明の電源異常検出回路の一実施例を示す系
統図、第2図は第1図の各部動作波形図、第3図は第1
図に用いられたマイクロコンピュータの動作フローチャ
ート、第4図は従来の停電検出回路図である。 1は交流電源、7、8はホトカプラ、11はカウンタ、12
はクロック回路、13はマイクロコンピュータ。
FIG. 1 is a system diagram showing an embodiment of a power supply abnormality detection circuit of the present invention, FIG. 2 is an operation waveform diagram of each part of FIG. 1, and FIG.
FIG. 4 is an operation flowchart of the microcomputer used in the figure, and FIG. 4 is a conventional power failure detection circuit diagram. 1 is an AC power supply, 7 and 8 are photocouplers, 11 is a counter, 12
Is a clock circuit and 13 is a microcomputer.

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】前記交流電源の正負それぞれの電圧に対し
てしきい値を設け、該しきい値を有する前記正負の電圧
に対応して動作する一対のスイッチング素子と、該スイ
ッチング素子の出力電圧の立上り立下り信号を入力して
前記スイッチング素子の動作期間を基準クロックパルス
を用いて計数するカウンタと、該計数動作を前記電源の
各サイクルについて連続して行ない、それぞれの計数値
を記憶する手段を有して行う、交流電源の停電時の異常
を検出する電源異常検出方法において、最初の計数値を
記憶手段に格納した上で該最初の計数値が所定範囲内に
あるかを判別し、該最初の計数値が所定範囲内にある場
合に、次回以降の計数値と該最初の計数値との偏差を求
めて、該偏差を一定値と比較してその大小により前記電
源の異常を判別することを特徴とする電源異常検出方
法。
1. A pair of switching elements, which are provided with thresholds for positive and negative voltages of the AC power supply and operate in response to the positive and negative voltages having the thresholds, and an output voltage of the switching elements. And a counter for inputting the rising / falling signal of 1 to count the operation period of the switching element using a reference clock pulse, and means for continuously performing the counting operation for each cycle of the power supply and storing each count value. In the power supply abnormality detection method of detecting an abnormality at the time of power failure of the AC power supply, the first count value is stored in the storage means and then it is determined whether the first count value is within a predetermined range. When the first count value is within a predetermined range, the deviation between the count value from the next time onwards and the first count value is obtained, and the deviation is compared with a constant value to determine the abnormality of the power supply according to its magnitude. You Power failure detecting method, characterized in that.
JP1044935A 1989-02-23 1989-02-23 Power supply abnormality detection method Expired - Fee Related JPH0782041B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1044935A JPH0782041B2 (en) 1989-02-23 1989-02-23 Power supply abnormality detection method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1044935A JPH0782041B2 (en) 1989-02-23 1989-02-23 Power supply abnormality detection method

Publications (2)

Publication Number Publication Date
JPH02223864A JPH02223864A (en) 1990-09-06
JPH0782041B2 true JPH0782041B2 (en) 1995-09-06

Family

ID=12705337

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1044935A Expired - Fee Related JPH0782041B2 (en) 1989-02-23 1989-02-23 Power supply abnormality detection method

Country Status (1)

Country Link
JP (1) JPH0782041B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008286673A (en) * 2007-05-18 2008-11-27 Panasonic Corp Power failure detection circuit, power failure detection method, and power supply system

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5623172B2 (en) * 1973-10-05 1981-05-29
JPS5566762A (en) * 1978-11-14 1980-05-20 Ricoh Co Ltd Detecting method for source-voltage-down
JPS59214775A (en) * 1983-05-20 1984-12-04 Mitsubishi Electric Corp Instantaneous interruption/stoppage detector for ac power source

Also Published As

Publication number Publication date
JPH02223864A (en) 1990-09-06

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