JPH0779257A - Signal receiving circuit device - Google Patents

Signal receiving circuit device

Info

Publication number
JPH0779257A
JPH0779257A JP5221678A JP22167893A JPH0779257A JP H0779257 A JPH0779257 A JP H0779257A JP 5221678 A JP5221678 A JP 5221678A JP 22167893 A JP22167893 A JP 22167893A JP H0779257 A JPH0779257 A JP H0779257A
Authority
JP
Japan
Prior art keywords
signal
threshold value
amplitude
output signal
comparator
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5221678A
Other languages
Japanese (ja)
Inventor
Takeshi Nishio
猛 西尾
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP5221678A priority Critical patent/JPH0779257A/en
Publication of JPH0779257A publication Critical patent/JPH0779257A/en
Pending legal-status Critical Current

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  • Electronic Switches (AREA)
  • Control Of Amplification And Gain Control (AREA)
  • Dc Digital Transmission (AREA)
  • Optical Communication System (AREA)

Abstract

PURPOSE:To eliminate a feedback system, to make a circuit configuration simple and inexpensive, and to attain a highly precise operation without any adjustment at the time of receiving an optical signal, and converting it into a binary signal. CONSTITUTION:This device is provided with a pre-amplifier 2 which amplifies the received signal of the optical signal from an optical transmission line, an amplitude limiter 5 which amplitude-limits the output signal of the pre-amplifier 2 by a constant limit value, a comparator 6 which shreshold processes the output signal of the amplitude limiter 5 based on a certain threshold value, and a threshold value setting unit 7 which applies the threshold value to the comparator 6 so that an optimal S/N can be obtained based on the output signal of the amplitude limiter 5. That is, the pre-amplifier 2 amplifies the received current signal of the optical signal from the optical transmission line or the like, and converts it into a voltage signal, the amplitude limiter 5 amplitude-limits the output signal of the pre-amplifier 2 by the constant limit value, and when the comparator 6 binarizes the output signal of the amplitude limiter 5, the threshold value setting equipment 7 applies the threshold value so that the optimal S/N can be obtained.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】この発明は信号受信回路装置に係
り、特に高速ディジタル光伝送等においてダイナミック
レンジの広い光信号を受信してこれを2値信号に変換す
るための光受信回路の構成に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a signal receiving circuit device, and more particularly to a structure of an optical receiving circuit for receiving an optical signal having a wide dynamic range and converting it into a binary signal in high speed digital optical transmission. .

【0002】[0002]

【従来の技術】従来から、高速ディジタル光伝送におけ
る信号受信回路装置としては、例えば特開平3−232
342に示されるような、図3のブロック図に示すよう
な回路が適用されてきた。図において、1は光信号を受
光して、その受信強度に応じた電流信号を発生する受光
素子、2は受光素子1からの電流信号を電圧信号に増幅
変換する前置増幅器、3は前置増幅器2の出力信号を一
定の振幅の2値信号に変換するAGC(自動利得制御)
増幅器、4はAGC増幅器3の出力信号のピーク値を検
出して、これが一定の値になるようにAGC増幅器3の
利得を制御するピーク検出器である。
2. Description of the Related Art Conventionally, as a signal receiving circuit device in high-speed digital optical transmission, for example, Japanese Patent Application Laid-Open No. 3-232 has been proposed.
Circuitry, such as that shown at 342, has been applied, as shown in the block diagram of FIG. In the figure, 1 is a light receiving element that receives an optical signal and generates a current signal corresponding to the received intensity, 2 is a preamplifier that amplifies and converts the current signal from the light receiving element 1 into a voltage signal, and 3 is a preamplifier. AGC (automatic gain control) that converts the output signal of the amplifier 2 into a binary signal of constant amplitude
The amplifiers 4 are peak detectors that detect the peak value of the output signal of the AGC amplifier 3 and control the gain of the AGC amplifier 3 so that it becomes a constant value.

【0003】以上述べたような構成において、次にその
動作を説明する。
The operation of the above-described structure will be described below.

【0004】受光素子1は図示しない光伝送路からの光
信号を受光して、その受信強度に応じた電流信号を発生
する。前置増幅器2は、受光素子1からの電流信号を電
圧信号に変換する。
The light receiving element 1 receives an optical signal from an optical transmission line (not shown) and generates a current signal according to the received intensity. The preamplifier 2 converts the current signal from the light receiving element 1 into a voltage signal.

【0005】AGC増幅器3は前置増幅器2からの電圧
信号を、その振幅が一定となるように可変利得増幅す
る。ピーク検出器4はAGC増幅器3の出力信号のピー
ク値を検出してAGC増幅器3にフィードバックする。
AGC増幅器3はピーク検出器4からのフィードバック
信号に基づいてその利得を変化させ、結果的にその出力
信号のピーク値が一定になるように利得制御する。
The AGC amplifier 3 amplifies the voltage signal from the preamplifier 2 by variable gain so that its amplitude is constant. The peak detector 4 detects the peak value of the output signal of the AGC amplifier 3 and feeds it back to the AGC amplifier 3.
The AGC amplifier 3 changes its gain based on the feedback signal from the peak detector 4 and consequently controls the gain so that the peak value of its output signal becomes constant.

【0006】その結果、AGC増幅器3の出力を一定の
しきい値でスライスすることにより、2値化された受信
信号を得ることができる。
As a result, a binarized reception signal can be obtained by slicing the output of the AGC amplifier 3 with a constant threshold value.

【0007】[0007]

【発明が解決しようとする課題】従来の信号受信回路装
置は、以上のように構成されていたので、AGC増幅器
3の利得制御の調整を個々に行う必要があり、調整に時
間を要する。このことは、量産を行う場合に工数の増大
を招き、コストアップになる。
Since the conventional signal receiving circuit device is configured as described above, it is necessary to individually adjust the gain control of the AGC amplifier 3, which requires time. This leads to an increase in man-hours in mass production and an increase in cost.

【0008】この発明は上記のような問題点を解消する
ためになされたものであり、光信号を受信して、これを
2値信号に変換するにあたり、無調整で所期の動作を行
わせることが可能な信号受信回路装置を提供することを
目的とする。
The present invention has been made to solve the above-mentioned problems, and when receiving an optical signal and converting it into a binary signal, the desired operation is performed without adjustment. An object of the present invention is to provide a signal receiving circuit device capable of performing the above.

【0009】[0009]

【課題を解決するための手段】上記目的を達成するため
に、この発明は、光伝送路等からの光信号の受信信号を
増幅する前置増幅手段と、前記前置増幅手段の出力信号
に一定のリミット値で振幅制限する振幅制限手段と、前
記振幅制限手段の出力信号をあるしきい値に基づいて2
値化する比較手段と、前記振幅制限手段の出力信号に基
づき前記比較手段に最適なS/Nとなるようなしきい値
を与えるしきい値設定手段と、を備えることを特徴とす
る。
To achieve the above object, the present invention provides a preamplifying means for amplifying a received signal of an optical signal from an optical transmission line or the like, and an output signal of the preamplifying means. Amplitude limiting means for limiting the amplitude with a fixed limit value, and an output signal of the amplitude limiting means based on a certain threshold value.
It is characterized by comprising: comparing means for digitizing; and threshold setting means for giving a threshold value to the comparing means based on the output signal of the amplitude limiting means so as to obtain an optimum S / N.

【0010】[0010]

【作用】上記手段において、この発明の信号受信回路装
置は、前置増幅手段により光伝送路等からの光信号の受
信電流信号を増幅して電圧信号に変換し、振幅制限手段
において、前置増幅手段の出力信号に一定のリミット値
で振幅制限を加え、この振幅制限手段の出力信号を比較
手段において、2値化するに当たり、しきい値設定手段
において、振幅制限手段の出力信号に基づき比較手段に
対して、最適なS/Nが得られるようなしきい値を与え
る。
In the above-mentioned means, the signal receiving circuit device of the present invention amplifies the received current signal of the optical signal from the optical transmission line or the like by the preamplification means and converts it into a voltage signal, and the preamplifier in the amplitude limiting means. Amplitude limiting is applied to the output signal of the amplifying means at a constant limit value, and when the output signal of the amplitude limiting means is binarized by the comparing means, the threshold setting means compares the output signal of the amplitude limiting means based on the output signal of the amplitude limiting means. A threshold value is given to the means so that the optimum S / N can be obtained.

【0011】[0011]

【実施例】以下、図面を参照しながら、この発明の実施
例を説明する。
Embodiments of the present invention will be described below with reference to the drawings.

【0012】実施例1.図1は、この発明の実施例1に
係る信号受信回路装置のブロック図であり、特に2R受
信器の構成を例示するものである。図において、5は、
光信号を受信して光強度に応じた電流信号を発生する受
光素子1からの信号を、電圧信号に変換する前置増幅器
2からの信号を入力され、その振幅をあるリミット値に
制限する振幅制限器、6は振幅制限器5の出力信号をあ
るしきい値でスライスして2値信号に変換する比較器、
7は振幅制限器5の出力信号のレベルに応じて、比較器
6に対して最適なS/Nが確保できるようなしきい値を
与えるしきい値設定器である。
Embodiment 1. First Embodiment FIG. 1 is a block diagram of a signal receiving circuit device according to a first embodiment of the present invention, and particularly illustrates the configuration of a 2R receiver. In the figure, 5 is
Amplitude for limiting the amplitude to a certain limit value by inputting the signal from the preamplifier 2 that converts the signal from the light receiving element 1 that receives the optical signal and generates the current signal according to the light intensity into the voltage signal. A limiter, 6 is a comparator for slicing the output signal of the amplitude limiter 5 at a certain threshold value and converting it into a binary signal,
Reference numeral 7 is a threshold value setting device that gives a threshold value to the comparator 6 so that an optimum S / N can be secured, depending on the level of the output signal of the amplitude limiter 5.

【0013】以上述べたような構成において、次にその
動作を説明する。
The operation of the above-described structure will be described below.

【0014】受光素子1は図示しない光伝送路からの光
信号を受光して、その受信強度に応じた電流信号を発生
する。前置増幅器2は、受光素子1からの電流信号を電
圧信号に変換する。
The light receiving element 1 receives an optical signal from an optical transmission line (not shown) and generates a current signal according to the received intensity. The preamplifier 2 converts the current signal from the light receiving element 1 into a voltage signal.

【0015】振幅制限器5は前置増幅器2からの電圧信
号のレベルが一定のリミット値を越える場合、そのレベ
ルをリミット値に抑制して出力する。
When the level of the voltage signal from the preamplifier 2 exceeds a certain limit value, the amplitude limiter 5 suppresses the level to the limit value and outputs it.

【0016】振幅制限器5の出力はしきい値設定器7に
与えられるが、しきい値設定器7は振幅制限器5の出力
信号のレベルに応じて、出力信号のレベル、つまり比較
器6に与えるしきい値を、比較器6の入力におけるS/
Nが最適となるように変化させる。
The output of the amplitude limiter 5 is given to the threshold value setting device 7. The threshold value setting device 7 responds to the level of the output signal of the amplitude limiting device 5, that is, the comparator 6. The threshold value given to S / at the input of the comparator 6
Change so that N is optimal.

【0017】振幅制限器5の出力は、比較器6において
しきい値設定器7からのしきい値と比較され、2値信号
に変換され、出力される。
The output of the amplitude limiter 5 is compared with the threshold value from the threshold value setting device 7 in the comparator 6, converted into a binary signal, and output.

【0018】以上のような動作の結果、比較器6は、振
幅制限器5の出力信号のレベルに対応するしきい値で、
振幅制限器5の出力を2値化するので、受光素子1で受
信した光信号のレベルにレベルにかかわらず、受信信号
を無調整のままで、最適点に設定することができる。
As a result of the above operation, the comparator 6 has a threshold value corresponding to the level of the output signal of the amplitude limiter 5,
Since the output of the amplitude limiter 5 is binarized, the received signal can be set to the optimum point without adjustment regardless of the level of the optical signal received by the light receiving element 1.

【0019】つまり、振幅制限器5は前置増幅器2の出
力信号を2値化に適した信号として出力するが、前置増
幅器2と振幅制限器5で不足する利得分を比較器6で補
う。この場合、比較器6に与えるしきい値を、振幅制限
器5の出力に基づいてしきい値設定器7で設定すること
により、比較器6の入力におけるS/Nを最適化する。
That is, the amplitude limiter 5 outputs the output signal of the preamplifier 2 as a signal suitable for binarization, but the gain amount which is insufficient in the preamplifier 2 and the amplitude limiter 5 is compensated by the comparator 6. . In this case, the S / N at the input of the comparator 6 is optimized by setting the threshold value given to the comparator 6 by the threshold value setting unit 7 based on the output of the amplitude limiter 5.

【0020】その結果、受光素子1による受信信号の受
信レベルに対しては、振幅制限器5のリミット機能と比
較器6の2値化機能を通じて、2値化するため、高速で
しかも安定した2値化動作を行わせることができる。ま
た、比較器6の動作点が振幅制限器5の出力のS/Nの
最適点に調整されるために、2値化の際のスライスレベ
ルが無調整で最適点に設定される。
As a result, the reception level of the signal received by the light receiving element 1 is binarized through the limiting function of the amplitude limiter 5 and the binarizing function of the comparator 6, so that the speed is high and stable. It is possible to perform a binarization operation. Further, since the operating point of the comparator 6 is adjusted to the optimum S / N point of the output of the amplitude limiter 5, the slice level at the time of binarization is set to the optimum point without adjustment.

【0021】実施例2.図2は、この発明の実施例2に
係る信号受信回路装置のブロック図であり、特に3R受
信器の構成を例示するものである。図において、8は比
較器6の2値化信号出力に基づいて、クロック信号を発
生するクロック生成器、9はクロック生成器8からのク
ロックに基づいて、比較器6の出力をラッチするフリッ
プフロップ9である。
Example 2. Second Embodiment FIG. 2 is a block diagram of a signal receiving circuit device according to a second embodiment of the present invention, and particularly illustrates the configuration of a 3R receiver. In the figure, 8 is a clock generator that generates a clock signal based on the binary signal output of the comparator 6, and 9 is a flip-flop that latches the output of the comparator 6 based on the clock from the clock generator 8. It is 9.

【0022】以上述べたような構成において、次に、そ
の動作を説明する。
Next, the operation of the above-described structure will be described.

【0023】受光素子1で受信した光信号を、比較器6
で2値化された信号に変換するまでは、図1の構成と全
く同様である。さて、クロック生成器8は比較器6から
の2値化信号に基づいて、セルフクロッキング用のクロ
ック信号を生成する。これは、比較器6で得た2値化信
号の周期性の成分に、自走クロックの位相、周波数をロ
ックすることにより行われる。
The optical signal received by the light receiving element 1 is compared with the comparator 6
The configuration is exactly the same as that of FIG. 1 until the signal is converted into a binarized signal by. Now, the clock generator 8 generates a clock signal for self-clocking based on the binarized signal from the comparator 6. This is performed by locking the phase and frequency of the free-running clock on the periodic component of the binarized signal obtained by the comparator 6.

【0024】次に、クロック生成器8で得たクロック信
号に基づいて、比較器6の出力信号をフリップフロップ
9でラッチすることにより、時間軸の安定した2値化信
号を得ることができる。
Next, based on the clock signal obtained by the clock generator 8, the output signal of the comparator 6 is latched by the flip-flop 9 so that a binarized signal with stable time axis can be obtained.

【0025】一方、この2値化信号を処理するシステム
側にも、クロック生成器8からのクロックを供給するこ
とにより、以後の信号処理を共通のクロックで行うこと
ができる。
On the other hand, by supplying the clock from the clock generator 8 to the system side which processes this binarized signal, the subsequent signal processing can be performed with the common clock.

【0026】[0026]

【発明の効果】以上のように、この発明によれば、受信
信号を振幅制限し、振幅制限による利得不足を振幅制限
信号に基づくしきい値により比較器で2値化するように
構成したので、フィードバック系がなくなり、回路構成
が簡単で安価になり、無調整で精度の高い動作を行わせ
ることができるという効果がある。
As described above, according to the present invention, the amplitude of the received signal is limited, and the lack of gain due to the amplitude limitation is binarized by the comparator by the threshold value based on the amplitude limited signal. There is an effect that the feedback system is eliminated, the circuit configuration is simple and inexpensive, and highly accurate operation can be performed without adjustment.

【図面の簡単な説明】[Brief description of drawings]

【図1】この発明の実施例1に係る信号受信回路装置の
ブロック図である。
FIG. 1 is a block diagram of a signal receiving circuit device according to a first embodiment of the present invention.

【図2】この発明の実施例2に係る信号受信回路装置の
ブロック図である。
FIG. 2 is a block diagram of a signal receiving circuit device according to a second embodiment of the present invention.

【図3】従来の信号受信回路装置のブロック図である。FIG. 3 is a block diagram of a conventional signal receiving circuit device.

【符号の説明】[Explanation of symbols]

1 受光素子 2 前置増幅器 3 AGC増幅器 4 ピーク検出器 5 振幅制限器 6 比較器 7 しきい値設定器 8 クロック生成器 9 フリップフロップ 1 light receiving element 2 preamplifier 3 AGC amplifier 4 peak detector 5 amplitude limiter 6 comparator 7 threshold value setter 8 clock generator 9 flip-flop

───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.6 識別記号 庁内整理番号 FI 技術表示箇所 H04B 10/26 10/14 10/04 10/06 ─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. 6 Identification code Internal reference number FI Technical indication H04B 10/26 10/14 10/04 10/06

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 受信信号を増幅する前置増幅手段と、前
記前置増幅手段の出力信号を振幅制限する振幅制限手段
と、前記振幅制限手段の出力信号を2値化する比較手段
と、前記振幅制限手段の出力信号に基づき前記比較手段
にしきい値を与えるしきい値設定手段と、を備えること
を特徴とする信号受信回路装置。
1. Preamplifying means for amplifying a received signal, amplitude limiting means for limiting the amplitude of the output signal of the preamplifying means, comparing means for binarizing the output signal of the amplitude limiting means, and A threshold value setting means for applying a threshold value to the comparing means based on the output signal of the amplitude limiting means.
JP5221678A 1993-09-07 1993-09-07 Signal receiving circuit device Pending JPH0779257A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5221678A JPH0779257A (en) 1993-09-07 1993-09-07 Signal receiving circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5221678A JPH0779257A (en) 1993-09-07 1993-09-07 Signal receiving circuit device

Publications (1)

Publication Number Publication Date
JPH0779257A true JPH0779257A (en) 1995-03-20

Family

ID=16770564

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5221678A Pending JPH0779257A (en) 1993-09-07 1993-09-07 Signal receiving circuit device

Country Status (1)

Country Link
JP (1) JPH0779257A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007311844A (en) * 2006-05-16 2007-11-29 Nippon Telegr & Teleph Corp <Ntt> Optical burst signal receiving circuit
US7355540B2 (en) 2006-01-20 2008-04-08 Matsushita Electric Industrial Co., Ltd. Multi stage noise shaping quantizer
US7411527B2 (en) 2006-03-20 2008-08-12 Matsushita Electric Industrial Co., Ltd. Noise shaping quantizer
KR101043954B1 (en) * 2009-06-23 2011-06-24 전자부품연구원 Apparatus for discriminating optical receiver threshold using attenuator

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7355540B2 (en) 2006-01-20 2008-04-08 Matsushita Electric Industrial Co., Ltd. Multi stage noise shaping quantizer
US7411527B2 (en) 2006-03-20 2008-08-12 Matsushita Electric Industrial Co., Ltd. Noise shaping quantizer
JP2007311844A (en) * 2006-05-16 2007-11-29 Nippon Telegr & Teleph Corp <Ntt> Optical burst signal receiving circuit
JP4657144B2 (en) * 2006-05-16 2011-03-23 日本電信電話株式会社 Optical burst signal receiving circuit
KR101043954B1 (en) * 2009-06-23 2011-06-24 전자부품연구원 Apparatus for discriminating optical receiver threshold using attenuator

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