JPH077452A - Tuner - Google Patents

Abstract

PURPOSE:To provide a tuner capable of executing satisfactory processing utilizing the characteristics of a double balance mixer. CONSTITUTION:In this tuner having a double tuning circuit for tuning an input signal supplied to the primary side and outputting the tuned signal to the secondary side and the double balance mixer 20 supplied with the secondary side output of the double tuning circuit and an oscillation signal from a local oscillation circuit 14 and mixing the output of the double tuning circuit and the oscillation signal to prpare an intermediate frequency signal, a parallel circuit of the 1st varactor diode 54 and the 1st coil 53 is connected between the one end of the primary side of the double tuning circuit and the other side thereof, a parallel circuit of the 2nd varactor diode 64 and the 2nd coil 61 is connected between the one end of the secondary side of the double tuning circuit and the other end thereof, and while floating the secondary side from ground potential, the signals obtained from both the ends of the secondary side are supplied to the mixer 20 as signals having mutually opposite phases.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a tuner suitable for application to, for example, a tuner for a television receiver, and more particularly to a tuner using a double balance mixer.

[0002]

2. Description of the Related Art Conventionally, a circuit shown in FIG. 3 has been used as a tuning circuit used in a tuner for receiving a television broadcast applied to a television receiver, a VTR or the like. This circuit is a tuning circuit applied to a tuner that receives a broadcast wave in the UHF band, and is configured as a so-called double tuning circuit. The reception signal input terminal 1 is connected via a series circuit of a variable capacitance diode 2 and a capacitor 3. It is grounded and also grounded via the tuning coil 6. The tuning DC voltage input terminal 4 for controlling the capacitance of the variable capacitance diode 2 is connected to the variable capacitance diode 2 via the resistor 5.
And capacitor 3 are connected to the middle point. The above is the configuration on the primary side.

Then, as the configuration of the secondary side of the tuning circuit,
One end of the tuning coil 7 is connected to one tuning signal input terminal of the double balance mixer 20 via the capacitor 8, and the other end of the tuning coil 7 is grounded. Then, the midpoint of connection between the coil 7 and the capacitor 8 is grounded via the series circuit of the variable capacitance diode 9 and the capacitor 10. Then, the tuning DC voltage input terminal 11 for controlling the capacitance of the variable capacitance diode 9 is connected to the midpoint of connection between the variable capacitance diode 9 and the capacitor 10 via the resistor 12. Further, the other tuning signal input terminal of the double balance mixer 20 is grounded via the capacitor 13.

In the double-balanced mixer 20 thus configured and the output of the double-tuned circuit is supplied, the predetermined frequency signal output from the local oscillator 14 is mixed with the output of the double-tuned circuit. , An intermediate frequency signal having a predetermined frequency (for example, 58.75 MHz), and the intermediate frequency signal is supplied to the intermediate frequency signal output terminals 21 and 22.

FIG. 4 shows an example of the structure of the double balance mixer 20. In the figure, 23 and 24 are terminals to which the output of the double tuning circuit is supplied (capacitors 8 and 13 in FIG. 3).
Connected to the terminal), and connect these terminals 23 and 24 to N
Connected to the bases of PN type transistors Q ₁ and Q ₂ ,
The emitters of both transistors Q ₁ and Q ₂ are connected to resistors R ₁ and
Connect via a series circuit of R ₂ . Then, the connection midpoint of the resistors R ₁ and R ₂ is connected to the constant current source 28. The collector of the transistor Q ₁ is connected to the emitters of NPN type transistors Q ₃ and Q ₄ , and the one and the other input terminals 25 and 26 to which the output of the local oscillator 14 is supplied are connected to the transistors Q ₃ and Q _4. Connect to the base of. The collector of the transistor Q ₂ is connected to the emitters of NPN type transistors Q ₅ and Q ₆ , and the above-mentioned input terminals 25 and 26 are connected to the transistors Q ₅ and Q _6.
Connect to the base of.

The power supply terminal 27 is connected to the collectors of the transistors Q ₃ and Q ₅ via the resistor R _{3 and} to the collectors of the transistors Q ₄ and Q ₆ via the resistor R ₄ . And transistors Q ₄ and Q
One intermediate frequency signal output terminal 21 is drawn from the collector of ₆ , and the other intermediate frequency signal output terminal 22 is drawn from the collectors of the transistors Q ₃ and Q ₅ .

According to the double balance mixer 20 thus constructed, the tuning signals obtained at the input terminals 23 and 24 make the transistors Q _{3 to} Q ₆ constituting the differential amplifier circuit.
Then, the local oscillation signals obtained at the input terminals 25 and 26 are mixed, and intermediate frequency signals having the frequencies specified at the output terminals 21 and 22 are obtained.

[0008]

When the double-balanced mixer 20 having such a configuration is connected to the double-tuned circuit shown in FIG. 3 to form a tuner, the transistors Q ₁ and Q _{2 are connected.}
Current flowing to the results in the amplitude of different signals, it would occur a parasitic capacitance in the emitter side of the transistors Q ₁ and Q _2, the characteristics of the double balanced mixer has a disadvantage that deteriorated. In particular, the higher the frequency of the received signal, the worse the characteristics. For example, a tuner in the UHF band has a wide frequency range (about 470).
(MHz to about 800 MHz), it is not possible to maintain uniform characteristics up to a high frequency channel.

In order to solve this inconvenience, for example, FIG.
It is conceivable to use the double-tuned circuit shown in. That is, FIG.
At one of the reception signal input terminals 31 and 3
2 is connected to the tuning coil 33, and the variable capacitance diode 34 and the capacitor 3 are connected in parallel with the coil 33.
Connect a series circuit with 5. Then, the tuning DC voltage input terminal 36 for controlling the capacitance of the variable capacitance diode 35 is connected to the midpoint of connection between the variable capacitance diode 34 and the capacitor 35 via the resistor 37. The above is the configuration on the primary side.

Then, as the configuration of the secondary side of the tuning circuit,
The two tuning coils 38 and 39 are connected in series, and the two tuning coils 38 and 39 connected in series are connected to the double balance mixer 20 side via capacitors 40 and 41. Then, the connection midpoint of both coils 38 and 39 is grounded. Further, a series circuit of the variable capacitance diode 42 and the capacitor 43 is connected in parallel with the series circuit of the coils 38 and 39. Then, the variable capacitance diode 42
DC voltage input terminal 44 for tuning to control the capacity of
Is connected to the midpoint of connection between the variable capacitance diode 42 and the capacitor 43 via the resistor 45.

By configuring the double tuning circuit in this way,
From the secondary side of this double tuning circuit, the double balance mixer 20
The signal supplied to is a reverse phase differential signal, parasitic capacitance does not occur on the emitter side of the transistors Q ₁ and Q ₂ , and good processing can be performed without impairing the characteristics of the double balance mixer.

However, in the case of the double tuning circuit shown in FIG. 5, since the tuning coil on the secondary side is divided into two,
There is a disadvantage that the configuration becomes complicated. That is, for example, UHF
When used in a band, the number of turns of the tuning coil is very small, but it is difficult to divide this coil with a small number of turns into two, and even if it can be realized, it takes a lot of time and effort to adjust it. I will end up. Therefore, the double-tuned circuit shown in FIG. 5 is not a practical circuit.

In view of the above point, the present invention has an object to provide a tuner which performs good processing by utilizing the characteristics of the double balance mixer.

[0014]

The present invention is, for example, as shown in FIG. 1, a retuning circuit for tuning an input signal supplied to the primary side and outputting it to the secondary side, and this retuning circuit. Of 2
In a tuner having a double balance mixer 20 which is supplied with an output on the next side and is supplied with an oscillation signal from the local oscillation circuit 14 and which mixes the output of the detuning circuit and the oscillation signal into an intermediate frequency signal, A first variable capacitance diode 54 is provided between one end and the other end of the detuning circuit on the primary side.
And a first coil 53 are connected in parallel, and a second tunable diode 64 and a second coil 61 are connected in parallel between one end and the other end on the secondary side of the detuning circuit. Then, the secondary side is floated from the ground potential, and the signals obtained at the one end and the other end of the secondary side are supplied to the double balance mixer 20 as mutually opposite phase signals. .

Further, as a double balance mixer in this case, for example, as shown in FIG. 4, signals obtained from one end and the other end of the secondary side of the detuning circuit are converted into first and second transistors Q ₁ and Q. Supply to the base of ₂ , the first and second
Connect the transistor Q ₁ and a constant current source to the emitter of Q _2, the signal obtained in the first and second collectors of the transistors Q ₁ and Q _2, and to mix with the oscillation signal by the differential amplifier circuit It is a thing.

Further, in this case, the UHF wave is input to the primary side of the detuning circuit.

[0017]

According to the present invention, since the secondary side of the detuning circuit connected to the double balance mixer is floating from the ground potential, signals having opposite phases to each other on one and the other input terminals of the double balance mixer. The circuit is supplied and parasitic capacitance or the like does not occur in the circuit in the double balance mixer, and the double balance mixer performs a process of converting to a good intermediate frequency signal.

[0018]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to FIGS. In FIG. 1 and FIG. 2, FIG.
Parts corresponding to those in FIG. 5 are designated by the same reference numerals, and detailed description thereof will be omitted.

FIG. 1 is a diagram showing a circuit configuration facing a tuner tuning circuit of this example. In this example, the tuner tuning circuit is applied to a tuner for receiving a UHF band television broadcast wave, and is configured as a double tuning circuit. The output of the double tuning circuit is supplied to the double balance mixer. In FIG. 1, one and the other reception signal input terminals 51 and 52
Is connected to the tuning coil 53 and the coil 5
In parallel with 3, the variable capacitance diode 54 and the capacitor 55
Connect a series circuit with. Then, the tuning DC voltage input terminal 5 for controlling the capacitance of the variable capacitance diode 54.
6 is connected to the midpoint of connection between the variable capacitance diode 54 and the capacitor 55 via the resistor 57. The above is the configuration on the primary side.

Then, as the configuration of the secondary side of the tuning circuit,
The tuning coil 61 is connected to the double balance mixer 20 side via capacitors 62 and 63. Then, in parallel with the coil 61, a series circuit of a variable capacitance diode 64 and a capacitor 65 is connected. The tuning DC voltage input terminal 66 for controlling the capacitance of the variable capacitance diode 64 is connected to the variable capacitance diode 6 via the resistor 67.
4 and the capacitor 65. And
Between the variable capacitance diode 64 and the tuning coil 61,
One end of the resistor 68 is connected and the other end of the resistor 68 is grounded.

The double balance mixer 20 has the configuration shown in FIG. 4 described above, and a predetermined frequency signal output from the local oscillator 14 is mixed with the output of the double tuning circuit to obtain a predetermined frequency (for example, 58.75 MHz). ), And the intermediate frequency signal is supplied to the intermediate frequency signal output terminals 21 and 22.

The equivalent circuit of the secondary side of this tuning circuit and the double balance mixer is shown in FIG. In FIG. 2, the capacitance C in the double balance mixer 20
i ₁ and Ci ₂ and resistors Ri ₁ and Ri ₂ represent the input impedance of the double balance mixer 20. In this case, the capacitances Ci ₁ and Ci ₂ have almost the same value, and the resistors Ri ₁ and Ri ₂ have almost the same value. Since the connection point between the capacitors Ci ₁ and Ci ₂ is grounded, the voltage signals obtained at the input terminals 23 and 24 have opposite phases and the same amplitude.

As described above, since the tuning signals supplied to the double balance mixer 20 have mutually opposite phases and equal amplitudes, parasitic capacitance does not occur in the double balance mixer 20, and the characteristics as a double balance mixer are obtained. The processing that makes the best use of is performed. Further, in this example, since only one secondary side tuning coil (coil 61) of the double tuning circuit is required, the circuit configuration is simple and the adjustment can be easily performed. In particular, in the case of a tuner used in the UHF band as in this example, since the number of windings of the coil is small, it is not necessary to configure the coil by one and divide the coil, and the adjustment becomes very simple.

Although the above-described embodiment is applied to a tuner for television broadcasting in the UHF band, it can be applied to a tuner for television broadcasting in another band and also to a tuner for receiving signals other than television broadcasting. Of course, it can be applied.

[0025]

According to the present invention, since the secondary side of the detuning circuit connected to the double balance mixer is floating from the ground potential, one and the other input terminals of the double balance mixer are in opposite phase to each other. The signal will be supplied,
Parasitic capacitance or the like does not occur in the circuit in the double balance mixer, and the double balance mixer performs a process of converting to a good intermediate frequency signal.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing an embodiment of the present invention.

FIG. 2 is a circuit diagram showing an equivalent circuit of an embodiment.

FIG. 3 is a circuit diagram showing an example of a conventional tuning circuit.

FIG. 4 is a circuit diagram showing an example of a double balance mixer.

FIG. 5 is a circuit diagram showing another example of a conventional tuning circuit.

[Explanation of symbols]

 14 local oscillator 20 double balance mixer 21, 22 intermediate frequency signal output terminal 51, 52 reception signal input terminal 53 primary coil 54 variable capacitance diode 61 secondary coil 64 variable capacitance diode

Claims (3)

[Claims] 1. A detuning circuit that tunes an input signal supplied to the primary side and outputs it to the secondary side, and an output of the secondary side of the detuning circuit is supplied and at the same time from a local oscillation circuit. A tuner provided with an oscillation signal and having a double balance mixer for mixing an output of the detuning circuit and the oscillation signal into an intermediate frequency signal, wherein the one end and the other end on the primary side of the detuning circuit are provided. Is connected to a parallel circuit of the first variable capacitance diode and the first coil, and the second variable capacitance diode and the second coil are provided between one end and the other end on the secondary side of the detuning circuit. And a parallel circuit is connected to the secondary side so that the secondary side is floated from the ground potential, and the signals obtained at one end and the other end of the secondary side are supplied to the double balance mixer as signals of opposite phases. Tuner that did. 2. As the double balance mixer, the signals obtained from one end and the other end of the secondary side of the detuning circuit are supplied to the bases of the first and second transistors, and the first and second transistors are supplied. The tuner according to claim 1, wherein a constant current source is connected to the emitter of the transistor, and the signals obtained at the collectors of the first and second transistors are mixed with the oscillation signal by the differential amplifier circuit. 3. The tuner according to claim 1, wherein the UHF wave is input to the primary side of the detuned circuit.