JPH076843U - memory card - Google Patents

Abstract

(57) [Abstract] [Purpose] To prevent RAM and I / O buffers from being destroyed by high-voltage static electricity applied to the interface terminals of memory cards. In a memory card in which an input / output buffer is provided between an interface terminal and an input terminal of a random access memory, an input signal line of the buffer section in which an installation resistor is connected in series is connected to any one of the interface terminals. Connected in parallel to the terminals. The other end of the input signal line was connected to an AND gate and connected to an arbitrary input terminal of the random access memory. It is characterized by

Description

[Detailed description of the device]

[0001]

[Industrial applications]

 The present invention relates to the structure of a memory card, and more particularly to a memory card with increased electrostatic resistance.

[0002]

[Prior art]

 In the conventional memory card, various signal lines and control signal lines required for reading and writing random access memory (hereinafter referred to as RAM) are directly connected to the interface terminals. In a memory card with such a configuration, the input impedance of the address bus and the signal lines for write control, output control, and operation control are extremely high. The part is destroyed. Further, even if the static electricity is not directly applied, the potential of the various signal lines varies due to the influence of electromagnetic noise generated in the vicinity of the memory card, and the data in the RAM is changed.

Therefore, generally, as shown in FIG. 2, input / output buffers 4 and 5 formed of a gate array are provided between a static RAM (SRAM) 1 and input / output interface terminals 2 and 3, and various input signal lines 6 are provided. A grounding resistor 7 is connected to.

In the figure, 8 and 9 are parasitic diodes, and 10 is an amplifier.

As described above, although various input signal lines are connected to the grounding resistance, most of the problems with respect to electromagnetic noise are solved, but the problem with direct application of static electricity to the interface terminals remains. This is because the resistance of the grounding resistor itself and the wiring for it are high with respect to sudden changes in voltage such as static electricity, and the DC resistance of the grounding resistor can be reduced to only a few KΩ. Only electrostatic resistance of about 400V can be obtained.

[0005]

[Problems to be solved by the device]

 The present invention has been made in view of such problems, and its purpose is to solve the problem that the RAM and the input / output buffer are destroyed by the high-voltage static electricity applied to the interface terminal of the memory card. Is what you are trying to do.

[0006]

[Means for Solving the Problems]

 In order to solve such a problem, the present invention provides a memory card having an input / output buffer between an interface terminal and an input terminal of a random access memory, in which at least the grounding resistor is connected in series. The input signal line of this section is connected in parallel to any one of the above-mentioned interface terminals, and the other end of these input signal lines is connected to the AND gate and connected to any input terminal of the random access memory. is there.

[0007]

[Action]

 The conical surface of the gauge portion contacts the wall surface of the countersink bored in the structure, component, etc., and the contact state between the ridgeline of the conical surface cut out and the countersink wall surface changes depending on the angle of the countersink. If the ridge line and the wall of the countersink are in close contact with each other, it is judged as acceptable, and if a gap is created between them, it is judged as unsatisfactory.

[0008]

【Example】

 An embodiment of the present invention will be described below with reference to FIG. FIG. 1 is a block diagram of a memory card according to the present invention. The same parts as those in FIG. 2 are designated by the same reference numerals and the description thereof will be omitted.

In the present invention, the ground resistance 7, the parasitic diodes 8, 9 and the ground resistance 11, which is the same as the amplifier 10, the parasitic diodes 12, 13 and the amplifier 14, are connected in parallel to the various input signal lines 6, and these amplifiers 10 are connected. The output terminals of and 14 are connected to the AND gate 15. Therefore, even if a high-voltage static electricity is applied to the interface terminal 2, it is shunted to the grounding resistors 7 and 11, and is grounded via the parasitic diode 8 or 9 and 12 or 13, so that the electrostatic withstand is doubled. Therefore, the risk of damaging the RAM and input / output buffer is reduced.

[0010]

[Effect of device]

 As described above, the present invention provides a memory card having an input / output buffer provided between an interface terminal and an input terminal of a static RAM, in which the input / output buffer input section is connected to any of the interface terminals. Since they are connected in parallel, the electrostatic withstand capability increases, and it is possible to avoid data changes and IC destruction due to static electricity and electromagnetic noise.

[Brief description of drawings]

FIG. 1 is a block diagram showing a memory card according to the present invention.

FIG. 2 is a block diagram of a conventional memory card.

[Explanation of symbols]

 1 Static RAM 2 Input interface terminal 3 Output interface terminal 4 Input buffer 5 Output buffer 6 Input signal line 7/11 Ground resistance 8 ・ 9 ・ 12 ・ 13 Parasitic diode 10 ・ 14 Amplifier 15 And gate

Claims (1)

[Scope of utility model registration request] 1. In a memory card in which an input / output buffer is provided between an interface terminal and an input / output terminal of a random access memory, at least an input signal of the buffer section connected in series with a ground resistance is used as the interface terminal. 1 is connected in parallel, and the other ends of these input signals are connected to an AND gate to be connected to an arbitrary input terminal of the random access memory.