JPH0768014B2 - Elevator group management control method - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an elevator group management control method intended to reduce processing time for control.

[0002]

2. Description of the Related Art Elevator group management control is carried out in order to organically operate a plurality of elevators between a plurality of floors to realize highly efficient operation as a whole.

FIG. 22 shows a schematic configuration of a conventional device for performing such group management control. As shown in the figure, conventionally, car control units CC1, CC2, CC3, ... Are provided for each elevator, and a group control unit G for performing group management commonly to the upper of these is provided.
A hall control unit HC for registering C and hall calls is provided. Each control unit is configured using a microcomputer. As the performance of the central processing unit (CPU) of the microcomputer is improved and the size of the unit is reduced, as shown in FIG. 23, a system in which the group control unit GC and the specific car control unit CC1 are integrated into one unit is also performed. ing. In that case, the unit can be either a single CPU or a multi-CPU configuration. In this case, a backup group control unit GCB may be provided in the second car control unit CC2.

In such a group management control device, the processing amount of the group control unit GC increases as the number of elevators and the number of floors increase, and the processing time required for that also increases. The fact that the number of elevators and the number of floors are large also means that the number of passengers used is generally large, and it means that the degree of confusion increases if the speed of service is impaired. Furthermore, as the number of vehicles increases and the number of floors rises, the extent to which the impact will occur in the event of a failure will also increase, so countermeasures will also be required.

Therefore, an object of the present invention is to provide a management control method which is short in processing time of group management control as a whole and is resistant to failure.

[0006]

In order to achieve the above object, the present invention provides each control unit for controlling an individual elevator with a hall call registration control function and a group management control function, as well as between the control units. Is a group management control method for elevators that performs group management control of a plurality of elevators that are operated between a plurality of service floors, by coupling them via a high-speed transmission line and performing control operations in synchronization with each other. One of the units is the main station for sharing processing to each elevator and synchronization between the control units, and the other control unit is a sub station that follows the main station. For control functions that require real-time processing, In the main station, the control units of all units are controlled synchronously, and the control unit of each unit is controlled for control functions that require cyclic processing. It is characterized in that the control processing by sharing the Tsu bets.

[0007]

According to the elevator group management control method of the present invention, each control unit for controlling an individual elevator is provided with a hall call registration control function and a group management control function, and each control unit is connected via a high-speed transmission line. A group management control method for elevators, which performs group management control of a plurality of elevators operated between a plurality of service floors, which are coupled together and controlled in synchronization with each other, wherein any one of the plurality of control units is used. One is a main station for sharing processing to each elevator and synchronizing each control unit, and other control units are sub stations that follow the main station. For main control functions that require real-time processing, use the main station. Control units of all units are controlled synchronously, and control units of each unit share control functions that require cyclic processing. It is assumed that the control process. As a result, it is possible to provide a group management control method that achieves high-speed processing as a whole system and at the same time is resistant to failure.

[0008]

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 shows the system configuration of a control device for carrying out the present invention. In this embodiment, three sets of control units 1a, 1b, 1c for controlling three elevators are exemplified.
Are provided, but of course more elevators may be provided and more control units may be provided. Each control unit 1a, 1b, 1c has a car control unit CCa, CCb, CCc for controlling its own elevator, as shown in FIG. 4, and a compact group for distributed processing. Group control unit GCa, GC for management control processing
b and GCc and hall control units HCa, HCb and HCc for hall call control processing are integrally provided. Each of the control units 1a, 1b, 1c further includes a transmission LSI (large-scale integrated circuit) Sa, Sb, Sc,
The information output from here is transmitted through the high-speed transmission line 2 having a bus shape. On the hole side, a hole controller 8 including a one-chip microcomputer (one-chip microcomputer) for each riser is provided in each hole, corresponding to the two risers in this embodiment. Each hall controller is represented by connecting a numeral S followed by a numeral (1 or 2) indicating the riser type and a numeral (1 to m) indicating the hall type. For example, the hall controller on the m-th floor on the riser 1 side is Specified as S1m. These hall controllers 8 perform input processing of hall call registration signals from the hall call registration button 6 and output processing of lighting signals to the hall call registration lamp 7. And these hall controllers 8
Is a CP for the master node of each control unit 1a, 1b, 1c via the transmission lines 301, 302 for each riser.
It is connected in parallel with UMa, Mb, and Mc.

FIG. 2 shows the control units 1a to 1 in FIG.
3 shows a signal transmission system inside c. Transmission LSI Sa for controlling bus-like transmission between control units 1a-1c
Here, Sc is represented by reference numeral 30, has an internal buffer, and automatically checks transmission abnormality. From the perspective of the control CPU 33 that actually performs the main control, the transmission LSI 30 can be used on a read / write principle in cooperation with the shared RAM 32 that is tightly coupled through the multibus 31. In recent years, such intelligent LSIs have become available at low prices,
Now easy to use. The transmission LSI 30 is coupled to the bus-shaped transmission line 2 via the interface 35. Master node CPUs 171 and 172 denoted by reference numerals Ma to Mc in FIG. 1 are configured as one-chip microcomputers having a transmission function and an input / output function, respectively, and are connected to a multi-bus 31 on the one hand and an interface 341 on the other hand. , 342 through transmission line 30
1, 302 are connected. These CPU 171,
The price of 172 has also become low in recent years, and it has become easy to use in many fields. In the present invention, since a large amount of data is exchanged between the control units 1a, 1b, 1c via the bus-shaped transmission line 2, the transmission LSI 30 is used, and the hall controller 8 sufficient for normal transmission has already been described. As mentioned above, a one-chip microcomputer is used. The hall controller 8 is configured for the sub node, and as shown in FIG.
It is connected to the control unit side transmission line 30 (corresponding to the transmission lines 301 and 302 in FIG. 1) via the, and is connected to the hall call registration button 6 and the hall call registration lamp 7 via the interface 37. The hall controller 8 is composed of a one-chip microcomputer having a transmission function and an input / output function like the CPUs 171 and 172.

As the transmission line 2, a serial transmission line using an optical bus, a coaxial cable, a twisted pair line, or the like is used. Since this transmission line 2 is used for transmission between control units, that is, transmission between control boards, an inexpensive plastic optical cable may be used, and the transmission / reception unit used there also operates at a TTL level voltage of about 5 V and has a baud rate. Since 2 Mbps is also sufficiently supported, a general-purpose serial transmission LSI or a one-chip microcomputer can be used, and this can also be configured at low cost. In any case, the high-speed operation type has a shorter arithmetic processing time, can shorten the time until the control instruction, and has a high performance. The data link method is a general polling / selecting method that has a main station (master station) and a sub station (slave station), and a normal high-level data link control procedure (HD
LC), CSMA / CD system, etc. can be used. These general-purpose software enables data transmission / reception in the same way as input / output to / from the input / output unit when viewed from the software of the control units 1a to 1c.
By providing the main station and the sub stations with a certain rule, it is possible to construct an enhanced system even at a low cost.

Next, the operation of each control unit will be described with reference to the flowcharts of FIG.

In FIG. 5, the initialization routine 3a is started by the start. Here, the pointers and registers of each CPU are set, the RAM table is initialized, each LSI is initialized, and the one-chip microcomputer is initialized, and system interrupts and transmission interrupts are permitted. Thereafter, the main routine 3b is reached and the scheduler jump processing 3c is performed.

In the present invention, an operating system (OS) is used, each function is decomposed into tasks, and these are activated as necessary. The scheduler is one of the operating systems that starts tasks with higher priority levels from among tasks for which startup requests have occurred. Data is exchanged between tasks using a buffer called a mailbox.

The interrupt of the timer will be described with reference to FIG. This routine is activated every 10 mS. Performs interrupt processing 4a and system monitor processing 4b
Proceed to. Here, the system is checked for normality / abnormality. Next, unit control processing 4c is performed. Here, the task required for controlling the elevator itself is started. Next, the group management cyclic process 4d is performed. Here, a task required for group management control is activated and a jump process 4e to the scheduler is performed. All the tasks started up as described above are temporarily stored in the buffer and processed in descending order of priority level. When a task goes into a wait state, the lower level task is processed,
CPU idle time is effectively used for processing.

The group management cyclic process 4d will be described in more detail with reference to FIG. When this routine is entered, the group management monitor processing 5a comes. Here, normality / abnormality of group management is checked. Next, it comes to the cyclic data transmission routine 5b. Here, the status of all units is checked by transmission, and the result is set in a table together with hall call data.

An example of this table is shown in FIG. This table shows a case where POS (position) and CCT (car condition table) are set for each elevator number A to H. As the contents of CCT,
As shown in the figure, there may be UP / DN / FREE, that is, up / down / free, data on departure, running, deceleration, stop, door opening, door closing, etc., data on door condition and load, etc. .

FIG. 9 illustrates a RAM table for hall call registration for each floor and direction for the 32nd floor. In this table, a number indicating the number of floors and a code (D or U) indicating whether to register in the descending direction (D) or in the ascending direction (U) are also shown in the position column. The numbers 0 to 61 are set in the HS column on the right as shown in the figure. Below, the time from when a hall call is generated in HRCT1, the time from allocation in HRCT2, the presence or absence of a hall call in HCT, the presence or absence of a car call in KCT (8 bits From the left digit of A to H), whether or not allocation in HCAR (also corresponds to A to H from the left digit bit), Y
The predicted arrival time is set by RESP. In this table, the original HCT data for hall calls and the KCT data for car calls are moved from the transmission buffer and set.

Next, in FIG. 7, the check routine 5c of the main station is reached. The person who takes control first becomes the main station. When there are multiple stations, the unit with the highest priority will be the main station. If you are not the main station, check if there is another main station (routine process 5
c, 5d), and if there is none there, the routine proceeds to 5f. Also, if the main station is out of order, the routine proceeds to 5f (see routine 5e). If the main station is not in failure, routine processing 5m, that is, group management cyclic processing activation for the requested one is performed. In the routine process 5f, the main station command is output, and if there is an answer (response) from another machine, it becomes the main station.
The code of the main station command is "00" and the answer is "20". Thus, even if the main station fails, the main station can be checked every 10 mS and the main station can be selected from the sub stations. On the other hand, when the user is the main station, the routine moves from the routine 5c to the routine 5j, and the hall call sharing check, which will be described in detail later, is performed.
In this case, only those having an answer with the code "21" in the main station within a fixed time are regarded as normal, and the sharing output "01" is cyclically transmitted (routine 5k).

Here, the transmission code related to such control will be described. FIG. 10 shows instruction codes for synchronization from the main station to each unit (including its own unit), and FIG.
The request code from each machine to the main station and the answer code of each machine to the instruction code of the main station are shown in FIG. The instruction code (Fig. 10) is, for example, "00".
Hall call registration sharing reset is set as an initial process (main station command) of priority (priority) 1, and R in the mode column has a meaning of activating real-time processing and S having a cyclic processing. Here, in addition to 16 types up to the code “OF”, “10” and “1”
Two types of "1" are prepared as an option. The request code and answer code (Fig. 11) are instruction codes "0.
18 from "20" to "31" corresponding to "0" to "11"
The seed is set. Here, in the mode (task) column, R means a task with real-time property, S means a task of cyclic processing, and the parentheses are the task names to be output to the main station.

The main station command shown in FIG. 10 is sent from the main station to all the units at once, and is used for synchronizing the entire unit. For example, the code "01" is transmitted from the main station to each machine, and when each machine confirms the code, the answer code "21" is output. This answer code also has the meaning of a hole sharing set as shown in the content column (FIG. 11). As will be detailed later, hall call registration control is also shared by each unit. As soon as each machine receives the instruction code "01" from the main station, the task T is executed in real time.
R01 (high level task) is started. As will be detailed later, hall call registration control is also shared by each unit. Only those having an answer with the code "21" in the main station within a fixed time are regarded as normal, and the sharing output "01" is cyclically sent out (routine 5k).

Here, an example of sharing will be described.

FIG. 12 shows a RAM table related to hall calls. Here, HCALL is hall call registration data, HGAT is gate input data, IHCALL is erase (erase) input data, and HCALL $ TR is input data by transmission. These are shared by the A to C machines. In that case, A is 0 to 2BYT and B is 3 to 5BY.
T and C are shared as 6 to 7 BYT. These are output as a code "01" in the routine 5k (FIG. 7). Each machine receives the instruction code “01” and activates the task of TR01 (FIG. 13). There, the allocation of hall calls is checked (routine 7a), if there is a change, allocation sharing reset processing (routine 7c) is performed, and if there is no change, routine 7c is skipped (routine 7b). The answer output process of "21" (routine 7d) is performed, and the hall call registration cyclic process task activation flag is turned on, that is, T21F = 01 (routine 7).
e). The main station that received the answer of code "21" is T
The task of R21 (FIG. 14) is started, the flag of the signal receiver is set (routine 7f), and it is used for checking routine 5j (FIG. 7). Through the above process, the routine 5m shown in FIG. 7, that is, the group management cyclic process start routine is reached. At this time, since T21F = 01, the hall call registration cyclic processing task is activated. Other tasks with activation requests are activated. These tasks will be described later.

FIG. 15 is a flowchart showing the hall call registration cyclic processing task as task T21. Here, the shared N1 to N2 are performed, finally set to HCALL and HCT (FIG. 9), and the flag T24F is turned on, that is, T24F = 01. Note that T24 is a newly generated hall call check routine.

FIG. 16 is a diagram again illustrating the parts of the hall call registration cyclic processing shared by the above through the machines A to C.

In FIG. 16, it is assumed that Unit A is the main station. In addition, when there is an abnormality, one unit that issues a normal main station command quickly with the same algorithm is used as the main station.
Since Unit A is the main station, it outputs a hall call registration assignment command “01”. Therefore, the machines A to C return the answer "21" and turn on the hall call registration flag T21F. Since there are answers “21” from Units A to C, it is assumed that all Units A are normal. Since the flag T21F is turned on here, each of the machines A to C performs hall call registration (task T21) for each of the halls shared, and checks the newly generated hall call for the respective allotment from the data. (Task T2
Perform 4). The processing is shared as described above.

In the above description, a task represented by a number following T is a task for outputting the code of the same number in FIG. 11, and a task represented by a number following TR is shown in FIG. It is a task activated by the code in FIG.

All the commands from the main station of FIG. 10 are only used for synchronizing the units. Figure 1
0 and the code for performing the real-time processing in FIG. 11 are “00”, “01”, “20”, and “21”, as well as the answer “25” (TR04 to the main command “04”).
Routine), answer “2” to the main command “06”
7 "(TR06 routine), answer" 29 "for the main command" 08 "(TR08 routine), answer" 2B "for the main command" 0A "(TR0A routine), etc. These are cyclic processing tasks T24 of each machine. , T26, T28, and T2A, the main routine is activated. The basic operation of these real-time processes is shown in FIG.

In FIG. 17, Unit A is assumed to be the main station. If any event occurs due to cyclic processing, it is output to the main station. The main station requests evaluation data on all units. In response to the request, each unit preferentially performs its own arithmetic processing and returns the answer to the main station. The main station sends all data to all units and the processing of each unit is performed based on it. Along with this, cyclic processing is generated and cleared.

FIG. 18 shows an example of allocation processing belonging to real-time processing. This is the cyclic processing of the newly generated hall call check task T24, in which a newly generated hall call is detected and the answer output "24" is sent to the main station. As a result, the main station outputs "04" and requests each unit to evaluate the newly generated hall call. Each unit will be task TR04 accordingly
Performs evaluation calculation for each newly generated hall call and sends answer "25" to the main station. Main station is task TR2
All the evaluation data collected in 5 are sent to all the machines with the code "05", and each machine performs the processing by the task TR05. A specific example of the data at this time is shown in FIG.

In the data format of FIG. 19, the hall call registration floor of the 1st byte (up / down or UP / DN
And position), 2nd byte non-response time (HRC
T1), 3rd byte's evaluation of Unit A, ... 10th byte's evaluation of Unit H.

Returning to FIG. 18, when the C-unit is assigned as being optimum, the C-unit turns on the task flags of the long-waiting check T2C and the full-occupancy check T2E, and performs cyclic processing. Perform these processes only for your own share. At this time, the units A and B set this allocation, turn on the task flag of the first-arrival check T28, and perform cyclic processing. This process is also done only for one's share.

As described above, the main station has a role of synchronizing the whole, and the actual processing is distributed to the respective units and performed.

Next, the activation of cyclic processing will be described. This includes, as can be seen in FIGS.
Answer "23" for main station command "03" (by task T23), answer "2D" for main station command "0D" (by task T2D), answer "2F" for main station command "0F" (by task T2F) and so on. These basic operations are shown in FIG.

As shown in FIG. 20, when activating the cyclic process, first, the occurrence process is searched by the cyclic process. When an event occurs, the code is output to the main station. The main station outputs a cyclic processing output for the event to each unit. Each unit searches its countermeasures only for itself in the cyclic process. If you have a countermeasure, output it to the main station. The main station outputs the reception countermeasure to all units, each unit sets the countermeasure, and clears the preceding countermeasure search. Also, it turns on / off the cyclic task related thereto.

A case of long wait processing will be described as an example of cyclic processing output with reference to FIG. In the cyclic processing, the long wait check T2C is used to check the occurrence of long wait of the own machine. When a long waiting hall call is detected, answer "2C" is sent to the main station. The main station outputs a long waiting hall call rescue machine search command "0C" to all machines. The respective units thereby activate the long waiting hall call rescue check task T2D. This task is performed during the cyclic processing, and outputs the code "2D" to the main station when the own machine meets the conditions. The main station outputs it to all units with the code "0D". The compatible machine described above performs the reallocation process, and the other machines clear the task T2D for the hole. The reallocation machine is for this floor,
A long-waiting check T2C and a full-occupancy check T2E are performed, and other units perform a first-arrival check T28 for the floor. The above processes are all buffered, and even if a plurality of events occur at different places at the same time, all the processes are performed. Anomalous units are always automatically excluded by giving the worst rating.

In the embodiment described above, all the hall call registration and group management control processing is shared and incorporated in each individual control unit, but it is not necessary for each individual control unit to share all. . Control CPU for each unit
The main station should be controlled so that at least a part of it can be shared according to the margin, and it is sufficient if each unit can be the main station.

[0037]

As described above, according to the present invention, it is possible to achieve high-speed processing in the entire system, and at the same time, to realize a management control method that is resistant to failure.

[Brief description of drawings]

FIG. 1 is a layout diagram showing a device layout configuration of an apparatus for carrying out the present invention.

FIG. 2 is an internal configuration diagram of a single control unit in the apparatus of FIG.

3 is a configuration diagram of a hall controller portion in the apparatus of FIG.

4 is an explanatory diagram for explaining the concept of function sharing in the device of FIG. 1. FIG.

FIG. 5 is a flowchart for explaining the present invention.

FIG. 6 is a flowchart for explaining the present invention.

FIG. 7 is a flowchart for explaining the present invention.

FIG. 8 is an explanatory diagram of a memory table used in the present invention.

FIG. 9 is an explanatory diagram of a memory table used in the present invention.

FIG. 10 is an explanatory diagram of codes used between the main station and each unit in the present invention.

FIG. 11 is an explanatory diagram of codes used between the main station and each unit in the present invention.

FIG. 12 is a table of a memory used in the present invention.

FIG. 13 is a flowchart for explaining the present invention.

FIG. 14 is a flowchart for explaining the present invention.

FIG. 15 is a flowchart for explaining the present invention.

FIG. 16 is an explanatory diagram for explaining a control operation of the present invention.

FIG. 17 is an explanatory diagram for explaining a control operation of the present invention.

FIG. 18 is an explanatory diagram for explaining a control operation of the present invention.

FIG. 19 is an explanatory diagram of data in a memory used in the present invention.

FIG. 20 is an explanatory diagram for explaining a control operation of the present invention.

FIG. 21 is an explanatory diagram for explaining a control operation of the present invention.

FIG. 22 is an explanatory diagram for explaining the concept of function sharing of the conventional group management control device.

FIG. 23 is an explanatory diagram for explaining the concept of function sharing of a conventional group management control device.

[Explanation of symbols]

 1a, 1b, 1c Control unit 2 High-speed transmission line 301, 302 Transmission line 8 Hall controller

Claims (2)

[Claims] 1. A control unit for controlling each elevator is provided with a hall call registration control function and a group management control function, respectively, and the control units are connected via a high-speed transmission line and controlled in synchronization with each other. A group management control method for an elevator that performs group management control of a plurality of elevators operated between a plurality of service floors, wherein any one of the plurality of control units is assigned to each elevator. The main station is used to synchronize each control unit, the other control units are used as sub-stations that follow the main station, and control units for all units are synchronized to the main station for control functions that require real-time processing. The control unit of each unit shares control functions that require cyclic processing. Elevator group management control method. 2. When the control unit that is the main station is down for a certain period of time or more, the control unit that takes the control of the transmission line earliest among the remaining control units becomes the new main station. Item 1. An elevator group management control method according to item 1.