JPH0767108B2 - Communication multiplexer - Google Patents

Description

Detailed Description of the Invention

[0001]

FIELD OF THE INVENTION The present invention is used for data communication. The invention particularly relates to communication multiplexers.

[0002]

Data communication devices for transmitting encoded information over communication links are well known. Many such devices are used for transmitting data signals where delay time limitations are not an issue (non-time critical).
Examples of such devices are packet switched networks and many local area networks (LANs). In addition to such a system, there are many known devices capable of transmitting audio and video signals whose transmission delay is unacceptable due to certain restrictions. However, such a device can transmit data signals. I can't.

IBM Technical Disclosure Bulletin
Vol. 26, No. 11 (April 1984), pp. 5991-2 discloses a token ring communication device for transmitting a plurality of frames and then transmitting a token to open the transmission path. This token ring device can transmit only one token at a time on the ring transmission line, can transmit long message information, and can transmit message information of different lengths. Such devices are used for data transmission.
The token ring communication device disclosed in the above document retransmits the token after the station device accesses a certain time transmission path.

[0004]

However, since the conventional data communication system does not have means for keeping the access delay within a predetermined limit, a predetermined delay such as an audio signal or a low bit rate video signal is not provided. It is not suitable for transmitting information that needs to be transmitted in time. It would be advantageous to be able to carry both data and voice signals and other asynchronous signals in a single device. For example, the cost of separating the communication network for data and voice can be reduced. However, at the bit rates required to transmit audio signals and low bit rate video signals, there are many problems in achieving a satisfactory device. The protocols used for conventional low bit rate data transmission methods have excessive delay and jitter, cannot secure the number of bits required to transmit delay sensitive information, and invalid overload. It included one or more drawbacks such as the need for control and the inefficient use of transmission bit numbers.

The present invention solves the above-mentioned drawbacks and provides a data communication system, a communication network, and a communication multiplexer capable of efficiently transmitting a data signal and information that needs to be transmitted within a delay time. To aim.

[0006]

A communication multiplexer of the present invention comprises a plurality of buffer circuits for storing a queue of information blocks to be transmitted to a communication link, and a control unit for allocating the number of blocks that can be transmitted to each buffer circuit. And a means for prohibiting the transmission of the information block after each buffer circuit transmits the allocated number of blocks until a new allocation is set.

The data communication method in which the present invention is used is a data communication method in which information to be transmitted is stored in a plurality of locations, and this information is encoded and transmitted in block units on a communication link connecting the locations. In the above, the number of blocks d is allocated to each location, and when the block to be transmitted to this location is waiting, the right to transmit one block to this location is given. Is forbidden from sending any more blocks from this location, and when all locations are prohibited from transmitting, these forbidden states are reset and a new block number d is assigned. The new block number d does not necessarily have to be equal to the previous block number d.

Before accepting a new delay sensitive call, make sure that the reset interval does not exceed the maximum allowed interval by allocating a new number of blocks, and when this confirmation is obtained, increase the number of allocations for that location. And accept the above call.

A communication network to which the present invention is applied comprises a ring-shaped transmission line for transferring digital format information blocks, and a plurality of station devices connected to the transmission line and communicating with each other. Is a means for fetching an empty information block transferred through the transmission line, and a means for inserting a control bit in the control field of the fetched information block and inserting information to be transmitted in the data field for transmission. In a communication network including the station device, the station device sets means for setting the number of information blocks that can be transmitted, means for prohibiting transmission of more information blocks after transmitting the number of information blocks set by this means, and means for this means. When it is detected that an empty information block has once circulated through the above transmission line in the prohibited state set by the First reset means for resetting, reset notifying means for notifying the output of the resetting means to another station device, and second reset means for resetting the own station by the notification from the notifying means of the other station device It is characterized by having. The speed with which the reset is received is not determined by any particular station.

The control bit includes an empty full bit indicating whether the information block is empty or full, and the first reset means sets the empty full bit to the empty state and sends it to its own station. Including means for transmitting. The first reset means is configured to reset the self station when the self station detects an empty bit set to an empty state, and the reset notification means sets another bit in the control field to set another station. This is a configuration for notifying the device. The setting means includes a means for variably controlling the number of blocks that can be transmitted, and this controlling means does not cause the reset interval of the first and second reset means to exceed the maximum allowable interval even if the number of blocks that can be transmitted is increased. Including means to confirm that.

A station device in a pause state is allowed to access the transmission line only after another station device requesting transmission has finished the opportunity to use the allocation of the information block.

Frequently it is necessary to transmit information to each other between transmission lines on a communication link or with other networks. The present invention is a communication multiplexer for this purpose, and is an apparatus for realizing the above data communication method.

[0013]

In the data communication system to which the present invention is applied, delay-sensitive information and insensitive information, that is, information that needs to be transmitted with a short delay time and information that does not need to be transmitted, use the same communication link. Can be transmitted. The particular location does not determine the time interval between consecutive allocations.

This data communication system is used for a communication network such as a local area network (LAN), a metropolitan area network (MAN), and a switching system. Such communication networks accommodate a large number of station devices that communicate with each other via communication links. Although various types of communication links are known, a ring-shaped transmission line is used in the present invention. A station device accommodating a plurality of terminal devices is connected to the transmission path at a point called a node.

In the throttling type communication network, digital format information is transmitted in a slot unit from one station device to another station device so as to circulate on a circular transmission path. The station device takes in an available slot (token) around the ring-shaped transmission path and uses this slot to transmit information to another station device. The slot includes one or more bits, and a code indicating the destination station device can be inserted into the slot. In a throttling type communication network, when the information-carrying slot returns to the originating station device, the contents of that slot are emptied. Therefore, unnecessary information is already transmitted to the ring-shaped transmission line from the destination station device to the source station device, resulting in a waste of transmission capacity. In order to solve this drawback, the contents of the information carrying slot are modified to be empty at the destination station device. Thereby, theoretically, more information can be transmitted within a given time, but there is a drawback that some station device monopolizes the slot.

The communication network targeted by the present invention is
It is a throttling type communication network, in which one or more station devices do not monopolize the transmission line, the slots become empty in the destination station device, and each station device has the minimum number of slots that can be transmitted during reset. , The access to the transmission path can be distributed to the station devices.

Thus, the communication multiplexer of the present invention can transmit information to and from each other over transmission lines on a communication link or with other networks, forming information queues for transmission. Block of
Only special queues can be sent on the communication link without prioritizing.

[0018]

1 is a block diagram of a communication network according to first and second embodiments of the present invention.

This communication network includes a plurality of station devices 10.
These station devices 10 are connected to the ring-shaped transmission path 11 and can communicate with each other. The central office 10 can house many forms of digital equipment, such as data processing equipment, video equipment, facsimile or telephone equipment, and can collect traffic from several equipment. The station device 10 can also access, for example, a public switched telephone network. The transmission path 11 transmits information in slot units. One or more slots of a predetermined number of bits circulate in the transmission path 11, and when one station device 10 tries to transmit data to another station device 10, this slot is taken in. The transmission line 11 transmits slots of equal length. This slot is established by switching on by the station device operating as a monitor device and is continuously held.
When an error occurs in the monitor station, the monitor function can be executed by another station device.

In the present embodiment, when one station device wants to transmit data to another station device, it takes in a total of d empty slots (not necessarily continuous slots), and the d empty slots are used. When the slots have been used up, it will be in a pause state where it is not allowed to take any more slots. This state is maintained until the station device is reset and becomes the active state. If another station is waiting to send data, the dormant station will not be reset to the active state until such station uses the allocated number of empty slots. The details of this operation will be described below.

FIG. 2 shows the structure of the slot.

Each slot has two parts, and each part is composed of a plurality of bits.
The first part is the control field 20 and the second part is the data field 21. The data field 21 contains information to be transmitted to other station equipment. The first bit of the control field 20 is an empty bit, the second bit is a test bit, the third bit is a supervisory bit, the fourth bit is a priority indication bit, and the fifth bit is a broadcast bit. Yes, the sixth and subsequent bits define the code corresponding to the destination address DA. The destination address DA defines to which station device 10 the information carried in the data field 21 is transmitted. The data field 21 contains an additional address for sending information to the appropriate location of the destination station equipment.

When a station device wants to transmit data to another station device, it checks an empty slot circulating on the transmission path 11, sets the first bit to a state indicating a full slot, and sets the destination address DA to the The data to be transmitted is inserted in the data field 21 by inserting after 6 bits. After this, this slot is sent to the transmission line 11. The destination station device is the destination address DA
Is received and the data in the data field 21 is received. The destination station device empties this slot, returns the first bit to a state indicating an empty slot, and then transmits to the next adjacent station device. This adjacent station device can use this slot when transmitting data.

A station device in the active state can take d empty slots. The station device is equipped with a counter,
The number of empty slots taken in by this counter is counted. When this count value reaches the assigned number d, the station device is in a pause (pause) or prohibited (inhibit) state, and even if there is data to be transmitted, it is not possible to take in more slots. This pause state is maintained until it is reset. The number of slots that can be used is limited to d so that the station apparatus in the active state can use the slots of the transmission line 11 at any time. In the dormant state, a station device can receive information slots from other station devices but cannot send information.

The operation when the station device is in the idle state or the idle state will be described below. In this state, the station device
It detects that all the other station devices are in the dormant state, and performs an operation to reset the own station and the other station devices.

When a vacant slot in which the test bit (the second bit of the control field) is off arrives, the station device in the idle state switches the test bit of this slot to on and sets its own address to the destination address DA. Put in a bit and set yourself to start the raw test. Since the empty bit of the slot indicates an empty state, another station device can use this slot for transmission.

When the destination bit DA indicates its own address and an empty slot with the test bit turned on arrives, this station device
Depending on whether you are running the raw test yourself,
The following processing is performed.

During the raw test, the empty bit of the slot (first bit of the control field) is converted to the full state. At this time, the station device is in the active state when the packet can be transmitted, and is in the idle state when the packet cannot be transmitted. Further, the count value of the number of transmitted slots is reset to zero and the next allocation number d is stored.
This completes the untreated test.

When the unprocessed test is not performed, the test bit of the slot is turned off and the destination address bit is set to zero.

The station device that detects the slot in which the empty bit is on (full) and the test bit is on performs the following processing depending on whether or not the own station is performing an unprocessed test. If no raw test has been performed, the station returns to the active or standby state, resets the counter to zero and stores the next allocation number d. If you are doing a raw test, turn it off along with the test and empty bits in the slot and set the destination address DA bit to zero. This completes the untreated test.

That is, it is detected that all the station devices are in the idle state or the idle state because the slot in which the empty bit is off (empty) and the test bit is turned around the transmission path, and the empty bit is detected. Each station device resets itself by a slot that is on and the test bit is on.

That is, when the station device which is going to transmit data becomes active, it can transmit the allocated d slots, and becomes dormant after transmitting d slots. It is not allowed to capture more than d slots. The station device in the dormant state can set a test bit in an empty slot in order to test whether another station device connected to the transmission line is waiting for transmission. Such a station device waiting for transmission can take in an empty slot in which the test bit is set, erase the test bit set by the station device in the transmission source, and transmit the allocated d slots. . When a few allocated slots are transmitted, the transmission line is tested again. Such processing is performed so that all station devices finish transmission, the empty bit with the test bit set is returned to the source station device, and this source station device indicates that the empty bit is full. It continues until the set slot is transmitted. At this time, all station devices respond to the slot in which the test bit is turned on and the test bit is turned on, and reset the assigned number d. This is referred to as resetting or refreshing the transmission path.

The value of the allocation number d can be selected to provide each with the bit rate required by each station. When the same value is assigned to each station device, the bit rate required instantaneously differs for each station device, so that the bit rate required for a station device transmitting video information increases, for example. Therefore, such a station device can use the assigned d slots more quickly than other station devices. By such an arrangement, the first station equipment using the d-slot allocation is temporarily suspended and before the transmission path is refreshed,
Give the opportunity to transmit the data stored in other station equipment,
A station device that requires urgent transmission can continuously perform transmission. In this way, a bit rate equal to that of the station equipment is guaranteed, if necessary. When the amount of data on the transmission path is large, the minimum guaranteed slot number is evenly assigned to each station device. This is an important feature of this embodiment.

In reality, if the minimum guaranteed slot number assigned to each station device is substantially equal to the number of slots required for transmission, the transmission delay can be minimized.
This can be achieved by selecting the minimum guaranteed slot number according to the expected demand. Furthermore, for example, a minimum guaranteed slot number can be assigned to the station device as one data channel, and in addition to this, an additional slot number for transmitting telephone and video information can be assigned. Consider a station device that uses a single video channel of 32 slots with a repetition period of 2 milliseconds or less. A counter in the station detects that it has transmitted 32 slots and subsequently this station goes dormant and allows other stations to transmit until reset. If you have a small amount of information to send,
In a short time, the right to send is patrolled and refreshed,
The station device can take in additional slots. The refresh cycle can be determined to be 2 milliseconds or less. In this case, each station device checks the refresh cycle, and the station device does not have enough empty slots to acquire the additional 32 slots required for transmitting the video information, and the time is set to 2 milliseconds. Upon approaching, the station will be unable to send information and will be blocked. In this case, the actual utilization efficiency of the transmission line cannot be made 100% without leaving a few empty slots. Every station can decide for itself whether the refresh interval is too close to 2 ms to accommodate the additional slots.

The value of the allocation number d is controlled by using the allocation number d stored in each station device, and each station device stores two allocation numbers d. One is the reference value for indicating the current allocation number d and for performing control to enter the sleep state. The other value is the "next allocation number d" and is replaced with the reference value each time the reset is performed.
The "next allocation number d" can be read and written, and each load control unit can control the value of the allocation number d using a protocol of a higher level than the protocol of the transmission path. This will be described in more detail with reference to FIG. As the maximum allowed reset interval increases, the load controller can increase the value of d accordingly. As a result, the guaranteed slot number is supplied to the transmission request.

The value of the "next allocation number d" is set as follows. First, the next allocation number d is initialized to some suitable small value, for example 2. This is to allow the station equipment to support low speed data services and transmission requests. Assuming that the reset interval is 2 milliseconds and the information field of 1 slot is 128 bits, the station device with the allocation number of 2 can transmit information at 128 kbit / sec. Fixed services are called background services.

If the speed of transmission to the transmission line is lower than this, the allocation number d will not exceed the background value 2. When there is no real-time service, 2N slots can be transmitted by N station devices before all station devices reach the dormant state and are reset (the number assigned to all station devices is a background value of 2). Assuming there is). Therefore, even if the amount of information on the transmission line due to the data connection is large, the reset interval of this transmission line is short, and each station device can obtain a sufficient transmission speed. The control when performing real-time transmission on the transmission path will be described. When a new send call (voice, video or high speed file transfer) is input to the station, the station checks the average reset time. As a result of this check, if an empty slot is used to respond to a new send call and the transmission line can be refreshed within 2 milliseconds, the send call is accepted. At this time, the next allocation number d is updated to a value that can respond to this send call (for example,
Since the video signal of 2 Mbit / s additionally requires 32 slots, the next allocation number d is the background value 2 plus 32). Once the real-time call is established, the slot allocation for slow data transmission calls is reduced. Similarly, the next allocation of station equipment that responded to the real-time call is reduced depending on the number of slots used. The number of additional allocations can be set by the average reset interval and the respective service times, blocking the outbound call if the current average reset interval is greater than the appropriate value.

The maximum allowable reset interval is determined by the real-time call of the communication network. For voice calls outside the public network, the maximum allowable delay is about 2 ms. If the delay requirements of other real-time services (such as video) are less stringent, use 2 ms as the maximum allowed interval.

If for some reason the average reset time is longer than 2 ms, the background service is temporarily disabled (eg, the next allocation number d is reduced by an amount equal to the background value).

A case where the allocation number is returned to the background value from this state will be described. When the shortest reset time drops to some suitable threshold (less than 2 ms), the background value is added to the next allocation count. This continues until the average quota returns to the background value. In this way, the reset time can be controlled so that packet loss sensitive services can be implemented.

Once the call is set and the allocation of the number of slots for the call is set, until the processing is completed in the called station device or the calling device,
The call can continue (if there are no node errors). Compared with the conventional transmission method, for example, in the Cambridge ring, the buffer circuit overflows due to overload, resulting in packet loss or the drawback of slowing down the attached device that requires service. It cannot be used for services, and when an overload occurs, there is a drawback that the call is canceled and the call becomes discontinuous in order to prevent deterioration or delay. In this embodiment, these drawbacks are solved.

FIG. 3 shows an example of the station device. The station device 10 includes an access control unit 51 that implements the above protocol. The access control unit 51 includes a reference storage device that stores two allocation numbers d, and transmits a slot to the transmission path 11 via the transmission buffer circuit 53. The access control unit 51 also receives a slot from the transmission path 11 via the reception buffer circuit 55. The updated value of the “next threshold value d” is input from the load monitor 57. At reset, the pulse is output to the load monitor 57. The load monitor 57 counts how many reset signal pulses arrive during the maximum allowable reset interval (here, 2 milliseconds). Information about the reset speed is also output to the controller 59 which receives a normal call setup request from the connected device. A new call requesting the transmission of M slots per 2 ms is
When the number of slots on the transmission path is L and the number of resets P per 2 milliseconds is M / L or more, it is accepted. When the reset interval exceeds 2 milliseconds, the load monitor 57 limits the allocation number d to the background value.

If the transmit buffer circuit 53 indicates that it can accept more slots, the select polling circuit 61 determines that the synchronous buffer circuit 63 and the asynchronous buffer circuit 63 are storing the collected slots.
65 is polled to check the priority of the waiting slot, the highest priority slot is transferred to the transmission buffer circuit 53, and transmitted to the transmission line 11. The rate of accepting low priority slots is controlled by the transmission line reset rate. This control will be described. At each reset, a reset signal is sent to the selective polling circuit 61. The selective polling circuit 61 can accept low priority packets until it detects that its internal counter has sent the background allocated number of slots, and the counter is reset by the above reset signal. It It indicates that the transmission buffer circuit 53 can accept more packets, and when the high priority packet is not waiting, the low priority packet is input to the transmission buffer circuit 53. Therefore, the speed at which the low-priority slot is input to the transmission buffer circuit 53 is controlled by the reception speed of the reset signal of the polling circuit 61, and the low- and high-priority packets are correctly mixed and transmitted by the polling circuit 61. It is supplied to the buffer circuit 53. When the reset interval is likely to exceed the maximum value of 2 milliseconds, the load monitor 57
The supply of the reset pulse to the selective polling circuit 61 is stopped.

The synchronous buffer circuit 63 and the asynchronous buffer circuit 65 respectively include a synchronous packet collecting and distributing circuit 67 (S
PAD, synchronous packet assembler / disassemble
r) and the asynchronous packet collection and distribution circuit 69 (APAD,
Slots are supplied from asynchronous packet assembler / disassembler). The synchronous packet collection / distribution circuit 67
A packet having the size of a slot is created from the information from the time division multiplexer 71. The time division multiplexing apparatus 71 is provided with a line unit 75 to which a plurality of terminal devices 73 such as telephones are connected and which transmits signal information to the control unit 59. When a call is set up, the controller 59 sets the appropriate header and supplies it to the synchronous packet collection and distribution circuit 67 for use in all slots for this call. Synchronous packet collection and distribution circuit
All 67 slots have high priority and sync buffer circuit
Stored in 63.

The maximum allowed reset interval is determined by the real-time service of the communication network. For voice outside the public network, the maximum allowable delay is about 2 ms. If there is a strict delay requirement for other real-time services such as video information, then 2 ms is used as the maximum delay interval.

The asynchronous packet collection / distribution circuit 69 creates a slot size packet from the packet stream coming from the data terminal device 77, generates a frame check sequence, and collates it. Normally, data slots have low priority. When a specific data connection request requires a guaranteed slot allocation number, a signal is sent to the control unit 59 and the load monitor 57, and the access control unit 51 increases the allocation number d. In this case, the corresponding slot is given a higher priority. 4 to 7 are flowcharts of control, reception, transmission, and reset control by the access control unit 51, respectively.

If such a communication network is used as a local area network (LAN), the length of the transmission path is typically several kilometers, and the length of the office or L
Approximately 20 to 30 station devices including workstations, computers, VDUs, telephones, etc. provided at sites connected to the AN are connected. In addition, even if the transmission path is smaller than this (even if the number of station devices is the same), another equivalent transmission path is used, data in which voice is switched at high speed, or other data is used. It can be carried out similarly. If the present invention is implemented in a public switched network, the maximum reset interval may need to be less than 2 milliseconds. The CCITT request requires a reset of at least 125 microseconds.

Each station is supplied with slots from different sources, as shown in FIG. For example, from the time division multiplexer 71, a voice slot, a data terminal device 77
Supplies a data slot. By switching,
Different types of slots from one transmission line need to be sent to another transmission line.

FIG. 8 is a block diagram of the communication multiplexer of the first and third embodiments of the present invention. This communication multiplexer is suitable for multiplexing a queue of slots stored in a plurality of buffer circuits.

The communication multiplexer of this embodiment basically uses the same protocol as the above-mentioned data communication system. This has the advantage that slots can be transmitted across the entire network without the need to use means to reconfigure the slots when different demands arise in different parts of the device. Therefore, the overhead for transmitting from the transmission line to the communication link is avoided.

The communication multiplexer 30 is provided with a plurality of input buffer circuits constituted by FIFOs, and each input buffer circuit stores a queue of fixed length blocks waiting for transmission on the communication link 40, that is, a queue of slots. For example, FIG. 8 shows three input buffer circuits 31, 32 and 33 out of a total of 6 to 7 input buffer circuits.
The communication multiplexer 30 of this embodiment uses the same protocol as the communication network described in FIG. The difference between the two is that in the case of a communication network, each station device controls transmission from the station device to the transmission path independently, whereas the communication multiplexer 30 of the present embodiment changes from the input buffer circuit to the communication link. The transmission control of is performed by the central control unit. The control unit of the communication multiplexer 30 is
All are able to monitor the queue status of the input buffer circuits and generate reset signals at appropriate intervals. On the other hand, in the above-mentioned communication network, a test is performed to find out the time when the station device in the dormant state can be reset. By using the communication multiplexer 30 of this embodiment, a plurality of transmission lines 11 used as a switching network or a LAN can be connected to each other. An example of this is shown in FIG.

In this communication multiplexer 30, the queues stored in the input buffer circuits 31, 32 and 33 are slotted from the transmission buffer circuit 35 to the communication link 40 via the common data and control bus 34. Send.

Depending on the type of service requesting access to the communication link 40, different types of queues are provided. A queue of data slots is stored in the input buffer circuit 31, and access to the communication link 40 by this queue is not time critical. Other service requests may need to access the communication link 40 within a set time, depending on the nature of the service. For example, in the case of voice information, a 160-bit slot including a 128-bit information field needs to be transmitted every 2 milliseconds in order to satisfy the error rate and quality of service content.
Information about video slots and other services is provided to the input buffer circuit 33. A variable bit rate (VBR) video slot is stored in the input buffer circuit 32. Yet another input buffer circuit (not shown) is provided for the transmission of other fixed or variable bit rate information with different delay bounds. A priority is designated for each input buffer circuit, and a queue is transmitted according to this priority. In this embodiment, the input buffer circuit
The queue (voice) stored in 33 has the highest priority,
The queue (data) stored in the input buffer circuit 31 has the lowest priority. The priority is determined by the input buffer circuit, and the queue with the highest priority is the input buffer circuit.
Stored in 33, the queue with the lowest priority is stored in the input buffer circuit 31. A register may be provided to store the priority of the queue.

The communication multiplexer 30 includes a control unit 42 for communicating with the bus 34, and the control unit 42 includes an access control unit 41.
And a load monitor 36. The access control unit 41 includes a polling circuit 43, and the polling circuit 43 polls the input buffer circuits 31, 32 and 33 in the order of their priority. The polling circuit 43 also includes input buffer circuits 31, 3
A counter (not shown) for 2, 33 queues and a read-write memory (not shown) that stores the current number of assignments or the number of slots assigned to each queue and the "next assignment d". And a configured reference storage device. The load monitor 36 communicates with the access control unit 41, receives the data standby signal from the access control unit 41 through the signal line 37, and receives the reset signal through the signal line 38. The load monitor 36 also uses the signal line 39 to access control unit 41.
Outputs the allocation number signal to. With these signals,
The load monitor 36 changes the slot allocation to the queues of the respective input buffer circuits 31, 32, 33 via the access control unit 41, and guarantees the minimum allocation slot of each queue.

The input buffer circuits 31, 32, 33 provide the communication link 40 with fixed length message slots for transmission.

Similar to the communication network described above, each input buffer circuit is permitted to transmit d slots, and when the allocated d slots are transmitted, the slot transmitted by the input buffer circuit is transmitted. No more slots are allowed to be transmitted until the counting counter is reset. The reset occurs only after all input buffer circuits have had the opportunity to transmit on their assigned slots. There are empty input buffer circuits or input buffer circuits that are empty before transmitting all the allocated slots to the communication link 40, but such input buffer circuits have finished transmitting the other d allocated slots. The counter is reset together with the input buffer circuit. Unlike the communication network described above, in this communication multiplexer 30, the queue slots are full slots and nothing is written in the control field. Therefore, the communication multiplexer 30 sends out to the communication link 40 without changing any bit of the queue slot. Different d values are assigned to the respective input buffer circuits, and the values can be changed.

The operation of the communication multiplexer 30 will be described in more detail.

The transmit buffer circuit 35 must be supplied with slots from the input buffer circuits 31, 32 and 33 at the rate at which the slots are sent out to the communication link 40. The polling circuit 43 performs the following processing in order to output the slot to the transmission buffer circuit 35 at a desired speed. First, the polling circuit 43 detects the input ready signal (logic “1”) of the transmission buffer circuit 35. After this, the input buffer circuit (input buffer circuit 33) having a high priority with respect to the output ready signal is inspected, and this input buffer circuit is prohibited from transmitting any more slots (that is, "pause" state, logic "0"). )) Or not. Input buffer circuit
When there is a slot to be transmitted in 33 and it is not prohibited (both are logical "1"), the slot is output to the bus 34 and transmitted to the communication link 40 via the transmission buffer circuit 35. The counter associated with the input buffer circuit 33 provided in the access control unit 41 increments the count value by one. The polling circuit 43 is the next transmission buffer circuit.
When 35 input ready signals are detected, this procedure is repeated. When the input buffer circuit 33 sends out the allocated number d of slots, the count value of the counter associated therewith becomes d, and the status register of the input buffer circuit 33 is set to indicate that transmission is prohibited. Is in the "hibernation state". In this state, no more slots will be transmitted until the counter is reset. The polling circuit 43 stops detecting the two logic "1" states of the input buffer circuit 33, and inspects the right (not shown) input buffer circuit having the next highest priority. If there is no slot to send to this input buffer circuit, check the next right slot, that is, the input buffer circuit 32,
Send the waiting slot to communication link 40. When a new slot arrives at the left high-priority input buffer circuit (previously empty) while transmitting this slot, the highest priority level is detected when the input ready signal of the transmission buffer circuit 35 is detected. Check the input buffer circuit and then transmit that slot. Therefore, the communication multiplexer 30 performs the operation described below when all the input buffer circuits are in the idle (ie, prohibited) state or the idle state in which there are no slots waiting for transmission.

When the polling circuit 43 finds that no slot can be selected, it resets the counters corresponding to all the input buffer circuits and, at the same time, sends a reset pulse to the load monitor 36 via the signal line 38. Load monitor
36 counts the number of reset pulses received at a predetermined time interval and holds the value. The occurrence of such a reset indicates that the slot is not being transmitted to the communication link 40, and the frequency of the reset defines the spare capacity of the communication link 40. The load monitor 36 determines the calling capacity of a synchronous time critical service such as voice according to the reset speed. This will be described below.

The value of the allocation number d for each input buffer circuit indicates the maximum number of slots that the input buffer circuit can send to the communication link 40 between resets. Therefore, the maximum reset time is the time when all the input buffer circuits transmit all the allocated slots. Consecutive slots (128 each) for special calls to accommodate time-sensitive synchronous services, such as 64 kbps voice information.
(Including the bit information field)
It should be less than milliseconds. The maximum time interval between resets should be selected according to the delay time of the queue that requires the strictest time limit. If one input buffer circuit must send out a slot every 62.5 ms, and the other input buffer circuit sends out a slot with a delay of 2 ms or more, the maximum reset Use 62.5 microseconds as the allowable interval. For example, the input buffer circuit 33 needs to service 64 voice calls of 64 kbit / s, each voice call needs to output one slot (128 bits) every 2 msec, the maximum allowed interval between resets. Is 62.5 microseconds. In this case, the allocation number d for the input buffer circuit 33 must be 2 in order to execute the call without an unacceptable delay. Therefore, the guaranteed minimum allowable rate is 64 slots at 2 millisecond intervals, and the input buffer circuit 33 is guaranteed the number of slots required to answer this call. Load monitor 36
Monitors the synchronous service and dynamically adjusts the number of allocations to the FIFO buffer circuit to adapt to the number of calls, while maintaining the reset interval below the maximum allowed interval. Monitoring of the synchronous service is performed by connecting the signal line between the load monitor 36 and the polling circuit 43 of the access control unit 41.
Realized via 39. The reference storage device of the polling circuit 43 stores two allocation numbers for each input buffer circuit. One of them is the current allocation number (d) to the input buffer circuit, which is a reference value for performing control to put the input buffer circuit in the idle state at the current reset interval. The other is the next allocation number, which is used as a new slot allocation number (d) by replacing the current allocation number with each reset. When a new connection of the input buffer circuit 33 is set up, it sends to the load monitor 36 the number of slots needed to send a new call within a predetermined service delay limit. In the above example, the information field of one slot consists of 128 bits,
The new 64 kbit / s voice call requires transmission of one slot in a 2 ms period chosen as a service delay limit for efficiency reasons. The load monitor 36 adjusts the quotas to maintain a correctly guaranteed call receipt rate. Therefore, the maximum allowable reset interval is 6
At 2.5 microseconds, the number of allocations would need to be increased by one if 32 more 64 kilobits / second information would be sent on the communication link 40.

Before adjusting the allocation number, the load monitor 36
Should ensure that the reset interval does not increase beyond the maximum allowed reset interval due to the transmission of new audio information. If the frequency of resets is less than or equal to the minimum number, then only new calls to input buffer circuit 33 can be sent to communication link 40. For example, if the maximum allowable reset interval is 62.5 milliseconds, the minimum number of resets in a 2 millisecond cycle is 32. Therefore, if it is now possible to reset at least 33 times every 2 msec, only new 64 kbit / sec voice information providing one slot every 2 msec can be sent to the communication link 40.

The queue stored in the input buffer circuit is set according to the characteristics of the information transmitted by the communication multiplexer 30. For example, 125 for communication link 40
Synchronous constant bit rate (SBR) services that need to be transmitted with access delays of less than a millisecond specify one queue and are served to other services within a maximum delay limit of 2 milliseconds. SB with additional queue
It is also provided for R services and also for dynamically changing bit rate (VBR) services with different average maximum delay intervals. Normally only one queue is output as data.

Unlike the communication network shown in FIG. 1, the communication multiplexer 30 has a central control unit 42 (including the load monitor 36 and the access control unit 41).
The control by the load monitor 36 is limited to delay critical synchronization services. The number assigned to the input buffer circuit 31 is fixed. As the number of allocations, a small value, for example, 1 is selected so that the minimum number of slots can be transmitted from the input buffer circuit 31 to the communication link 40 when the reset interval approaches the maximum interval. Even with this small value, resets occur very often if the information to be transmitted on the communication link 40 is almost completely or completely filled with data information. Therefore, when there are few time-sensitive services, the input buffer circuit 31 can transmit a large number of slots per unit time.

Only the data information slot has a communication link 40
If the communication link 40 is used at a high rate, the number of reset pulses counted by the load monitor 36 becomes a high value.
A high value of the reset pulse number indicates that the spare transmission capacity is large, that a more time-critical call can be tolerated, and the number of allocations of the input buffer circuit 33 can be increased. Therefore, the voice call can be set, and the number assigned to the input buffer circuit 33 can be appropriately increased. This means that the number of reset pulses is reduced and the transfer speed of the input buffer circuit 31 is reduced. Therefore, the transfer rate per hour of the communication link 40 for synchronous and asynchronous information changes dynamically.

In order to roughly estimate the reserve transmission capacity, the polling circuit 43 of the access control unit 41 uses the signal line 37 to reset each idle reset of the queue of the input buffer circuit 31 (that is, the data is more than the assigned value). A pulse is supplied to the load monitor 36 each time the reset occurs when the number is small. So if you include, for example, 10 idle resets in a 2 millisecond interval, this is a maximum of every 2 milliseconds.
Indicates that data for 10 slots can be newly transmitted. However, this transmission is not guaranteed and the main purpose of counting idle resets is to unnecessarily load the input buffer circuit 31 for new transmission requests when the current capacity is full. To prevent that.

In order to transmit the variable bit rate (VBR) information, the allocation number of the input buffer circuit 32 is updated. The load monitor 36 estimates the average transmission rate and determines the allocation number. In the case of video information, the delay time is limited as in the case of audio information, but in order to reduce the cost to the video consumer, increase the number of allocations only when there is little other time-limited information, and increase the number. Provide quality video channels to consumers. This can be realized by setting a small allocation number of the input buffer circuit 32. The frequency of resets is usually much faster than the minimum frequency, and the queue can send as many slots as required per unit time to the communication link. When the other input buffer circuit is busy and the reset interval approaches the maximum value, it cannot transmit the required number of slots per unit time, and the video consumer is provided with a transfer rate corresponding to the smaller set allocation number. It To allow the transmission of new VBR information, the current reset count for the synchronized fixed bit rate is used, as in the case of voice information.

In addition to the method of limiting the amount of information transmission in order to keep the reset interval below a certain time, the polling circuit 43 records an overload condition when reset cannot be executed at the maximum interval. At this point, the count values of all the queues are immediately reset, and transmission can be restarted from the high-priority input buffer circuit.

The transmit buffer circuit 35 is for transmitting the slots that make up a frame at regular intervals and provides a stream of synchronized slots of output information to a remote receiver on the communication link 40. The transmit buffer circuit 35 also includes registers so that when there is no slot from any of the input buffer circuits 31, 32 and 33, i.e. when the input buffer circuit does not output a slot and a reset occurs, a dummy link is present on the communication link 40. Send a full slot.

FIG. 9 shows three ring-shaped transmission lines 11 connected to each other used in a switching network. Each transmission line 11 is provided with a station device 10 ′ and can access a communication link 40. The station device 10 'is equivalent to the station device of FIG. 3, except that an input buffer circuit (31, 32, 33, etc.) for storing a queue of slots, a transmission buffer circuit and each station device 10' communicates with each other. The difference is that a control unit 42 for terminating the link 40 is provided.

[0070]

As described above, in the data communication system of the present invention, delay-sensitive information such as voice information and image information and delay-insensitive information such as data information are transmitted in the same manner. Can be transmitted efficiently on the road. Moreover, a specific location (station device, input buffer circuit, etc.) connected to the transmission line does not occupy the transmission line.

Therefore, the data communication system of the present invention can be widely used in communication networks such as LAN, MAN, and public switched networks, and communication multiplexers that multiplex and send data information and time-critical information to these communication networks. effective.

[Brief description of drawings]

FIG. 1 is a block diagram of a communication network according to first and second embodiments of the present invention. FIG. 2 is a diagram showing the structure of the slot. FIG. 3 is a block diagram showing an example of a station device. FIG. 4 is a flow chart of control by the access control unit. FIG. 5 is a flow chart of reception control. FIG. 6 is a flow chart of transmission control. FIG. 7 is a flowchart of the reset control. FIG. 8 is a block configuration diagram of a communication multiplexer according to first and third embodiments of the present invention. FIG. 9 is a diagram showing connection of transmission lines.

Claims (7)

[Claims] 1. A plurality of buffer circuits that store a queue of information blocks to be transmitted to a communication link, a control unit that allocates the number of blocks that can be transmitted to each buffer circuit, and a block to which each buffer circuit is allocated. A communication multiplexer having means for inhibiting the transmission of the information block after transmitting the number until a new allocation is set. 2. The communication multiplexer according to claim 2, wherein the control unit includes counters corresponding to the respective buffer circuits and means for resetting the counters when all the buffer circuits are in a disabled or empty state. 3. The communication multiplexer according to claim 2, wherein the resetting means sets a maximum allowable interval of resetting by a maximum delay time for transmitting a time-sensitive service. 4. The buffer circuit is configured to accept time-sensitive calls having different maximum permissible delay amounts, and the reset means has a maximum permissible interval of reset in a time shorter than the maximum permissible delay amount most sensitive to time. The communication multiplexer according to claim 3, which has a set configuration. 5. The controller provides means for ensuring that the reset interval does not exceed the maximum allowed interval by allocating a new number of blocks before the buffer circuit accepts a new delay sensitive call, and this confirmation has been obtained. 5. The communication multiplexer according to claim 3, further comprising means for increasing the number of allocations to the buffer circuit. 6. The communication multiplexer according to claim 1, wherein the buffer circuit has a configuration in which priority is set, and the control unit includes means for polling the buffer circuit in order of the priority. . 7. The buffer circuit according to claim 1, wherein some of the buffer circuits are configured to accept a call that is not sensitive to time, and the control unit is configured to allocate a fixed small value as the number of blocks to the buffer circuit. The communication multiplexer according to any one of 1.