JPH0767053A - Television receiver - Google Patents

Abstract

PURPOSE:To detect the excess inputs of a white peak, horizontal synchronizing signal and burst signal. CONSTITUTION:The television receiver is constituted by providing an excess input detecting means 9 for detecting the dynamic range over of a burst signal block from a signal quantized by an A/D converter 4 and a gain control 3 for performing the gain control of the A/D converter 4 based on the detected result of the excess input detecting means 9. Further, the excess input detecting means 9 detects the excess input from a detected pattern provided from the amplitude and sampling phase of the burst signal and detects the excess inputs of the white peak in a composite signal and the horizontal synchronizing signal level. On the other hand, on the rear stage of a D/A converter 6, a gain control 7 is provided to correct the influence of gain control performed by the gain control 3 under the control of the excess input detecting means 9.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention has a digital signal processing function, in particular, a digital signal processing function for handling a color composite signal, for determining an excessive input of a color composite signal,
The present invention relates to a television receiver that automatically controls its level.

[0002]

2. Description of the Related Art For example, when the broadcast channel of a television receiver is switched and a broadcast program of another station is selected and received, a change in broadcast wave intensity, short-distance reception and long-distance reception,
Due to various conditions such as the type of antenna and the difference in installation location, the intensity (amplitude) of the broadcast wave input to the tuner of the television receiver is constantly changing. In particular, a video signal reproduced by an external device such as a VTR or an LD player may have a large signal level change depending on the reproduction device. For this reason, a normal television receiver reduces fluctuations in the input signal level, and obtains a constant video detection output by an AGC (automatic gain control) circuit or the like in order to obtain a video signal that is satisfactory as a television receiver. It is believed to have been done.

FIG. 10 is a partial circuit block of a conventional television receiver for obtaining a constant video detection output by an AGC circuit, and particularly a video system is shown. 1 in this figure
Is a tuner that selects the broadcast wave received by antenna A,
And a tuner section including a video intermediate frequency amplifier section (VIF), 2 is a video detection section for detecting the video intermediate frequency selected and amplified by the tuner section 1, and 17 is a gain control 1
7A, an AGC circuit including a leading edge value detection unit 17b, a low pass filter 17c, and the like. In this AGC circuit 17,
For example, the front end value of the horizontal synchronization signal is detected by the front end value detection unit 17b, and when the input is excessive, the gain control is performed so as to obtain the specified gain, and the A / D arranged in the subsequent stage is controlled.
The composite signal is supplied to the converter 4.

Reference numeral 5 denotes a digital signal processing unit, which performs various kinds of signal processing on the digital signal passed through the A / D converter 4 and supplies the digital signal to the D / A converter 6. Reference numeral 8 denotes a matrix circuit, which converts an analog signal (Y, RY, BY) that has passed through the D / A converter 6 into an RGB signal and is a CRT.
Supply to 13. Reference numeral 10 denotes a sync separation circuit. The sync signal separated here is converted into horizontal / vertical deflection current in a deflection circuit 11 and supplied to a deflection yoke 12.

Reference numeral 16 denotes a control section for inputting a command signal through the infrared receiving section 14 and the demodulating section 15 and controlling each of the above functional circuits through the control bus CB.

As shown in the figure, the AGC circuit 17 is arranged in the front stage of the A / D converter 4, and the AGC circuit 17 performs gain control to convert an analog signal of a constant level controlled to a standard gain into an A / D converter. It is designed to be supplied to four.

[0007]

By the way, in such a circuit configuration, for example, in order to detect the leading edge value of the horizontal synchronizing signal and perform continuous gain control, the input dynamic range of the A / D converter 4 is effectively increased. It is possible to use. However, when a high-frequency signal such as a burst signal cannot be tracked excessively and a hue error occurs due to vertical waveform distortion, or when the white-side excessive input does not operate correctly, the white details are destroyed. There is. In particular, the hue error caused by the vertical waveform distortion due to the excessive input of the burst signal causes a remarkable deterioration of the image, which hinders viewing.

[0008]

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and a color composite signal is subjected to digital signal processing through an A / D converter and then again processed through a D / converter. In a television receiver that performs analog output, an excessive input detection means for detecting dynamic range over in a burst signal section from a signal quantized by the A / D converter, and based on a detection result of the excessive input detection means, A / D
And a first gain control means for controlling the gain of the converter, which constitutes a television receiver.

Further, the excessive input detecting means detects the excessive input from the detection pattern obtained from the amplitude and sampling phase of the burst signal, and detects the white peak of the composite signal and the excessive input of the horizontal synchronizing signal level. Further, there is provided second gain control means for performing inverse correction of the gain control made by the first gain control means by the control output of the excessive input detection means after performing digital signal processing. .

[0010]

The white peak of the composite signal and the excessive input state of the sync signal level can be detected, and the excessive input state of the burst signal can also be accurately detected. It becomes possible to avoid a hue error or the like that occurs.

[0011]

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the television receiver of the present invention will be described below. FIG. 1 is a diagram showing a partial circuit block of the television receiver of this embodiment, and particularly shows a video system. The same parts as those in FIG. 10 are designated by the same reference numerals and the description thereof will be omitted.

The broadcast radio wave received by the antenna A is selected by the tuner unit 1, amplified by the video intermediate frequency, and then detected by the video detection unit 2. The composite signal detected by the video detection unit 2 and the composite signal of an external device such as a VTR or an LD player input via the external input terminal t pass through the gain control unit 3 via the video switch circuit 2A, A / D conversion is performed by the A / D converter 4. The quantized composite signal is passed through the digital processing circuit 5 and the analog signal (Y,
R-Y, B-Y), and the output level is regulated by the gain control section 7. After that, the matrix circuit 8
It is converted into a B signal and supplied to the CRT 13.

The color composite signal is A / D
After the A / D conversion by the converter 4, the sync signal is separated by the sync signal separation circuit 10. Then, the horizontal / vertical deflection current generated in the deflection circuit 11 is supplied to the deflection yoke 12, and horizontal / vertical scanning is performed to display an image.

In this embodiment, a gain control section 3 is provided in the front stage of the A / D converter 4, and a gain control section 7 is provided in the rear stage of the D / A converter 6. The gain levels of the gain control units 3 and 7 are controlled by the excessive input detection unit 9. The excessive input detection unit 9 detects the output level of the A / D converter 4 and the output level of the sync separation circuit 10. When the input level of the composite signal deviates from the standard level, the input level becomes excessive. During this time, the detection result is fed back to the gain control section 3 to attenuate the signal level.

For example, when an excessive input level is detected, the gain control section 3 is controlled to perform control to reduce it to a predetermined signal level. Further, when the signal level is attenuated in the gain controller 3, the gain controller 7 is controlled in accordance with the attenuation amount to improve the image.

The excessive input detection unit 2 of the present invention is shown in FIG.
As shown in FIG. 1, a horizontal sync signal section detector 20 for detecting an excessive input of the horizontal sync signal for m clock periods, a video section detector 21 for detecting an excessive input of the video signal for n clock periods, and a burst signal The burst signal section detection unit 22 detects an excessive input of the burst signal from the amplitude pattern, an OR circuit 23, a noise filter 24, and a control signal output circuit 25.

Each of the detectors outputs "0" to the OR circuit 23 when an excessive input is not detected, and outputs "1" when an excessive input is detected. Then, the OR circuit 23 outputs a “H” level signal to the control signal output circuit 25 via the noise filter 24 when “1” is input from any of the above-mentioned detection units. As will be described later, the control signal output circuit 25 outputs "0" level in the initial state, and according to the "H" level signal input from the OR circuit 23 through the noise noise filter 24, the gain control unit 3,
A control signal for performing gain control of No. 7 is output.

The functional circuits constituting the excessive input detection unit 2 will be described below with reference to FIGS. 3 to 6.

As shown in FIG. 3, the horizontal synchronizing signal section detecting section 20 outputs the S-bit parallel digital signal converted by the A / D converter 4 to the S-bit input NOR circuit 20.
a, and its output is m stages of D-F / F (D-flip-flop) circuits 20b ₁ , 20b _2, ..., 20b _m.
Are sequentially delayed by the sample clock. And each D-
The output of the F / F circuit 20b ₁ ~ _m, and inputs to the AND circuit 20c. Therefore, "0" indicating the bottom value of the A / D converter 4 is included in the S-bit output of the converted horizontal synchronizing signal.
00 If there is ... ", the output of NOR circuit 20a becomes" 1 ", D-F / F circuit 20b ₁ ~ from this signal
It is output from _m . And this "1" is at least m
When the sample period occurs, the AND circuit 20c performs an AND
The "1" level is output to the circuit 20d.

Further, in order to select the horizontal synchronizing signal section and detect an excessive input, the AND circuit 20d outputs A
By taking the logical product of the output of the ND circuit 20c and the pulse indicating the horizontal synchronization section, it becomes possible to detect the lower dynamic range over "1" in the horizontal synchronization section.

As shown in FIG. 4, the video signal section detector 21 receives the S-bit parallel digital signal converted by the A / D converter 4 as an S-bit input AND circuit 21a.
To the n-stage DF / F circuit 21b.
_1, 21b ₂ ···, delays in 21b _n. And the output of each D-F / F circuits 21b ₁ ~ _n, AND circuits 21
Enter in c. Here, when a signal indicating the top value “111 ...” Of the A / D converter 4 occurs in the video signal for at least n clock periods, the D-F / F circuit 21b.
_{If an} excessive input is detected from ₁ to _n , AND circuit 2
The 1c level signal is output to the AND circuit 21d. In order to detect the excessive input by selecting the inside of the video signal section, the AND circuit 21d outputs D-
By outputting the outputs of the F / F circuits 21b ₁ to _n and the pulse indicating the video signal section and taking the logical product of them, the upper dynamic range over “1” in the video signal section can be detected. Become.

The video signal section detection unit 21 is
In the AND circuit 21d, the D-F / F circuits 21b ₁ to _n
Although the example of taking the product of the output of FIG. 4 and the video signal section pulse has been described, it is also possible to omit the AND circuit 21d and take the output of the AND circuit 21c as the detection result without taking the product of the video signal section pulse. .

Next, the burst signal pattern detection circuit 22 showing the reference phase of the color carrier signal will be described with reference to FIG. Similar to the horizontal synchronization period detection unit 20 and the video signal period detection unit 21, the S-bit digital signal converted by the A / D converter 4 is input to the S-bit input NOR circuit 22a, and its output is, for example, four-stage D -F / F circuit 22b
Delay by ₁ , 22b ₂ , 22b ₃ 22b ₄ . Then, the outputs AL ₀₁ and AL _{02 of} the respective D-F / F circuits 22b ₁ to ₄ are
An excessive input is detected by the burst signal pattern detection unit 22c by AL ₀₃ and AL ₀₄ . Also in this case, in order to select the burst signal section and detect the excessive input,
Burst gate pulse is burst signal pattern detection unit 2
2c is input.

The detection of the excessive input by the burst signal pattern detection unit 22c is performed based on the truth table shown in FIG. 6 described later. The truth table shows the pattern when the level of the burst signal shown in FIG. 7 is detected at the sampling points t ₁ , t ₂ , t ₃ .

In the quadrature demodulation of RY and BY, 4f
When the clock of the sc frequency is used, the phase of the sampling clock is, for example, as shown in FIG. 7A by the APC (automatic phase control) circuit in the digital signal processing unit 5 shown in FIG.
Alternatively, it can be uniquely determined as shown in (b). Further, the sampling phase in the case of demodulation on the IQ axis is displaced as shown in FIG. Also, when the sampling phase is determined from the outside rather than the APC circuit, it is generally as shown in FIG. 7C, and the phase of the burst signal and the phase of the sampling point may be misaligned.

In such a case, when it is detected whether or not the burst signal is in the excessive input state, FIG.
It is sufficient to detect whether the broken lines A, B, and C shown in (b) and (c) are the lower limit of the dynamic range of the A / D converter 4, but when the broken line levels A and B are exceeded, However, the burst signal will be distorted and a hue error will occur. Before conversion by the A / D converter 4,
Normally, the pedestal level (DC voltage level to which the blanking signal is added) is clamped, and the central level of the burst signal is set to be within the dynamic range.

Therefore, when the lower limit of the dynamic range of the A / D converter 4 is, for example, the broken line A shown in FIG. 7A, the output sequence of the NOR circuit 22a is 000.
00000, and in the case of FIG.
01 ... Similarly, if the lower limit of the dynamic range is the broken line B shown in FIG.
.. is repeated, and in the case of the broken line C, it is repeated 00100010. Then, the 4-bit truth table shown in FIG. 6 is determined from the output sequence of the NOR circuit 22a.

In the detection result of the truth table shown in FIG. 6, "0" indicates the standard input level,
"1" indicates a sample point at which an excessive input level is detected. For example, when the input pattern of the burst pattern detection unit 22c is "0000", the amplitude of the burst signal does not exceed the lower limit of the dynamic range, which is the broken line A, as shown in FIG. 7A. , The standard input level is discriminated and "0" is output. But,
The pattern of "0001" and the pattern of "0011" are detected as an excessive input "1".

The input pattern is "0010",
"0100", "0110", "1000", "100"
1 ”and“ 1100 ”, as shown in FIGS. 7B and 7C, the amplitude of the burst signal exceeds the lower limit of the dynamic range, which is the broken line B or C. It is determined that the input level is excessive, and "1" is output.

However, for example, "0101", "011"
1 ”,“ 1010 ”,“ 1011 ”,“ 1101 ”,
Input patterns such as “1110” and “1111” are patterns that cannot be obtained from the setting of the lower limit levels shown in FIGS. 7B and 7C, and are, for example, burst signals of a very weak electric field or levels. It is considered that noise is superimposed on the low burst signal. Therefore, when such a pattern is detected, it is determined that the input signal is not excessive and a detection output of "0" without gain control is obtained.

[0031] Thus, D-F / F circuits 22b ₁ ~ ₄
By recognizing the pattern of the data output from, the excessive input of the burst signal can be detected without being affected by noise or the like.

Next, the noise filter 24 and the control signal output circuit 25 will be described with reference to FIG. Noise filter 24, the S-stage D-F / F circuit 24a _1, 24a ₂ · ·
.., 24a _S , and OR circuit 2 for inputting its output level
4b. The control signal output circuit 25 is an AND circuit 25 for inputting the output level of the noise filter 24.
a, an OR circuit 25b, and a DF / F circuit 25c.

The horizontal synchronizing signal section detecting section 20, the video signal section detecting section 21, and the burst signal section detecting section 22 described above.
The output of the OR circuit 23 according to the detection result of S is delayed by S stages by the D-F / F circuits 24a ₁ to _S of the noise filter 24. Then, each D-F / F circuit 24
The output of a ₁ ~ _S are inputted to the AND circuit 24b. Here, the AND circuit 24b outputs "1" only when the OR circuit 23 outputs "1" for N consecutive clocks.
The final excessive input detection is performed.

In the control signal output circuit 25, DF
The / F circuit 25c indicates, for example, that the input signal has been switched by, for example, switching the broadcast channel of the television receiver.
When the channel is switched or the external input is selected, the reset signal R is supplied, and the Q output (control signal output) of the D-F / F circuit 25c is set to "0". Then, when an excessive input is detected by the OR circuit 23 and the output level of the noise noise filter 24 becomes "1", the output data is passed through the AND circuit 25a and the OR circuit 25b, and the DF / F circuit 25c. The Q output is inverted to "1" to reduce the gain of the gain control circuit 3 to prevent the deterioration of image quality due to an excessive input level. This state is maintained until, for example, channel selection is performed again and the reset signal R is supplied from the control unit 16 or the like.

In this embodiment, the control signal output of the control signal output circuit 25 is a binary value of "1" and "0", whereby two types of gain values are set in the gain control sections 3 and 7. However, for example, the gain control unit 3 causes the counter output 2 ^{n to} set the gain in several stages, and the entire excessive input detection unit 9 is operated several times at each channel switching. Then, the gain setting in 2 ⁿ stages may be performed by the counter output when the detection output becomes “0”.

FIG. 9 is a diagram schematically showing the input state of the A / D converter 4, where FIG. 9A is a standard input state, FIG. 9B is an excessive input state, and FIG. This is the state after the gain control correction. In this figure, H is the horizontal sync signal,
B indicates a burst signal and W indicates a white peak. D is the upper limit of the dynamic range of the A / D converter 4, and E is the lower limit.

In contrast to the standard input state shown in FIG. 7A, the horizontal input signal H, burst signal B, and white peak W are all in the excessive input state shown in FIG. The dynamic range D to E of the A / D converter 4 is exceeded. However, the horizontal synchronizing signal H, the burst signal B, and the white peak W do not always become excessive inputs at the same time. Therefore, the present invention has a greater effect on the image than the excessive input of the horizontal synchronizing signal H and the video white peak W.
Only the excessive input to the color burst signal B is detected,
Gain control may be performed.

[0038]

As described above, the television receiver of the present invention can accurately detect an excessive input of a burst signal by using the A / D converted color composite signal. Therefore, a good image can be displayed on any video source. Further, since the burst signal is detected based on the detection pattern of the sampling points for excessive input, there is an advantage that it is not affected by noise or the like. Moreover, it is possible to perform detection without being affected by the phases of the sampling clock and the burst signal.

Further, by simultaneously detecting the excessive input of the horizontal synchronizing signal and the white level and controlling the gain simultaneously with the color burst signal, the signal processing can be performed at an ideal level. As a result, by the gain control, it is possible to avoid a phenomenon such as a white detail being crushed, an image flow due to synchronization disorder, and a hue error caused by vertical waveform distortion caused by crushing of a burst signal even when the input is excessive.

Further, by arranging the gain control in the latter stage of the D / A converter, it is possible to correct the influence of the gain down in the A / D converter and avoid the fluctuation of the output level (contrast).

[Brief description of drawings]

FIG. 1 is a block diagram showing a video system of a television receiver according to an embodiment of the present invention.

FIG. 2 is a block diagram showing an example of an excessive input detection unit shown in FIG.

FIG. 3 is a block diagram showing an example of a horizontal synchronization signal section detection unit in the excessive input detection unit.

FIG. 4 is a block diagram showing an example of a video section detection unit in the excessive input detection unit.

FIG. 5 is a block diagram showing an example of a burst signal pattern detection circuit in an excessive input detection unit.

FIG. 6 is a diagram showing a truth table in a burst signal pattern detection circuit.

FIG. 7 is a diagram schematically showing the amplitude of a burst signal and the phase of sampling.

FIG. 8 is a diagram showing a filter and a control signal output circuit in the excessive input detection unit.

FIG. 9 is a diagram schematically showing an input state of an A / D converter.

FIG. 10 is a block diagram showing an AGC circuit and a video system of a conventional television receiver.

[Explanation of symbols]

 3, 7 Gain control 4 A / D converter 5 Digital signal processing unit 6 D / A converter 9 Excessive input detection unit 20 Horizontal sync signal section detection unit 21 Video section detection unit 22 Burst signal section detection unit 22c Burst signal pattern detection unit 24 Noise filter 25 Control signal output circuit

Claims (4)

[Claims] 1. A television receiver for performing digital signal processing of a color composite signal through an A / D converter, converting it again into an analog signal through a D / converter, and outputting the analog signal. Excessive input detection means for detecting dynamic range over in the color burst signal section from the quantized signal, and gain for performing gain control of the signal input to the A / D converter based on the detection result of the excessive input detection means. A television receiver comprising a control means, wherein the level of the color composite signal is adjusted by the gain control means. 2. The television receiver according to claim 1, wherein the excessive input detection means detects the excessive input from a detection pattern obtained from the amplitude and sampling phase of the burst signal. 3. The television receiver according to claim 1, wherein the excessive input detection means detects the white peak of the composite signal and the excessive input of the horizontal synchronizing signal level. 4. The gain control is performed on the signal after the digital signal processing by the output of the excessive input detection means.
The television receiver described in.