JPH0759248A - Digital protective relay - Google Patents
Digital protective relayInfo
- Publication number
- JPH0759248A JPH0759248A JP5205938A JP20593893A JPH0759248A JP H0759248 A JPH0759248 A JP H0759248A JP 5205938 A JP5205938 A JP 5205938A JP 20593893 A JP20593893 A JP 20593893A JP H0759248 A JPH0759248 A JP H0759248A
- Authority
- JP
- Japan
- Prior art keywords
- input signal
- signal system
- sensitivity
- relay
- digital
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明は、系統からの電気量をデ
ィジタルデータとして保護演算を行うディジタル型保護
継電装置に係り、特に入力信号系の監視機能を備えた保
護継電装置に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital protective relay device for performing a protection operation by using an electric quantity from a system as digital data, and more particularly to a protective relay device having a monitoring function of an input signal system.
【0002】[0002]
【従来の技術】ディジタル型保護継電装置では、サンプ
リングされた系統の電圧、電流入力から各種の保護演算
を行うほかに、各入力信号系の正常・異常の監視を行っ
ている。例えば、3相の零相電流又は電圧から入力信号
系の正常異常監視を行うには次式によって整定値を越え
たか否かが判定される。2. Description of the Related Art In a digital type protective relay device, in addition to performing various protective calculations from the voltage and current inputs of a sampled system, normality / abnormality of each input signal system is monitored. For example, in order to monitor the normality / abnormality of the input signal system from the three-phase zero-phase current or voltage, it is determined by the following equation whether or not the set value is exceeded.
【0003】[0003]
【数1】 (ch1+ch2+ch3)2>K K=2×(31/2÷LSB×SET)2 但し、ch1;監視対象系統の入力R相 ch2;監視対象系統の入力S相 ch3;監視対象系統の入力T相 K;係数 LSB;入力を識別できる最小値 SET;整定値 この演算は、零相電圧が系統内に発生していない無事故
状態では図2の(a)に示すようにR,S,T相の3相
を加算するとその和が零となるが、零相が系統に発生す
ると同図の(b)に示すようにその和は零にならない。
このときの値が整定値SET等で設定した値Kよりも大
きくなるときに入力信号系異常の監視出力を得る。[Equation 1] (ch1 + ch2 + ch3) 2 > K K = 2 × (3 1/2 LSB × SET) 2 However, ch1; input R phase of monitored system ch2; input S phase of monitored system ch3; monitored system Input T-phase K; Coefficient LSB; Minimum value that can identify the input SET; Settling value This calculation is performed in R and S as shown in (a) of FIG. 2 in a no-accident state in which no zero-phase voltage occurs in the system. , T phase, the sum becomes zero, but when the zero phase occurs in the system, the sum does not become zero as shown in FIG.
When the value at this time becomes larger than the value K set by the set value SET or the like, the monitoring output of the input signal system abnormality is obtained.
【0004】[0004]
【発明が解決しようとする課題】従来のディジタル型保
護継電装置において、入力信号系の監視を零相監視で行
うには入力が常に非飽和状態にあることが要求される。In the conventional digital protective relay device, the input is always required to be in a non-saturated state in order to monitor the input signal system by the zero-phase monitoring.
【0005】しかし、リレー特性によっては高感度の検
出を必要とするものがあり、高感度検出のために、図3
の(b)に示すように通常負荷時には入力波形が飽和し
ているが、事故時に非飽和の入力波形(同図のa)にな
るよう入力信号系を設定すると、この同じ入力に対する
零相監視では通常時に入力波形が飽和状態にあるため、
前記式の3相の加算結果が零にならず、入力信号系が正
常にも拘わらず零相監視では異常の判定になってしま
う。However, some relay characteristics require high-sensitivity detection.
Although the input waveform is saturated under normal load as shown in (b) of Fig. 7, if the input signal system is set so as to have an unsaturated input waveform (a in the figure) during an accident, zero-phase monitoring for this same input is performed. Since the input waveform is normally saturated,
The addition result of the three phases in the above equation does not become zero, and although the input signal system is normal, the zero-phase monitoring results in an abnormality.
【0006】上記の問題は、零相監視に限らず、二重化
不一致監視という監視方式においても通常負荷状態で飽
和しているときには監視不可能となる。これら、監視不
可能の場合には無監視としていたため、入力信号系の故
障発生に対する信頼性の確保を難しくすることがあっ
た。The above problem is not limited to the zero-phase monitoring, but cannot be monitored even in a monitoring system called duplex mismatch monitoring when the load is saturated under normal load conditions. When these cannot be monitored, the monitoring is not performed, which may make it difficult to secure reliability against occurrence of a failure in the input signal system.
【0007】本発明の目的は、通常状態で入力波形が飽
和する高感度リレー機能を持つ保護継電装置の入力信号
系の監視を確実にするディジタル型保護継電装置を提供
することにある。An object of the present invention is to provide a digital type protective relay device which ensures monitoring of an input signal system of a protective relay device having a highly sensitive relay function in which an input waveform is saturated in a normal state.
【0008】[0008]
【課題を解決するための手段】本発明は、前記課題の解
決を図るため、系統の各相の電圧又は電流をサンプリン
グとA/D変換を含む入力信号系を介して取り込み、こ
の入力信号系の入力ディジタル値からそれぞれ高感度と
低感度のリレー特性を有して保護演算するディジタル型
保護継電装置において、前記入力信号系から得たディジ
タル値が低感度リレーの非飽和域にあることを各相別に
判定する判定演算部と、前記入力信号系から得たディジ
タル値が高感度リレーの非飽和域にあることを各相別に
判定する判定演算部と、前記両判定演算部の同じ相の判
定出力が同時に成立したときに前記入力信号系の異常と
判定する論理積判定部とを備えたことを特徴とする。In order to solve the above-mentioned problems, the present invention takes in the voltage or current of each phase of the system through an input signal system including sampling and A / D conversion, and this input signal system In a digital type protective relay device that performs a protective operation with high sensitivity and low sensitivity relay characteristics respectively from the input digital value of, the digital value obtained from the input signal system is in the non-saturation range of the low sensitivity relay. A judgment calculation unit that judges each phase, a judgment calculation unit that judges each phase that the digital value obtained from the input signal system is in the non-saturation region of the high-sensitivity relay, and a judgment calculation unit of both judgment calculation units And a logical product determination unit that determines that the input signal system is abnormal when the determination outputs are satisfied at the same time.
【0009】[0009]
【作用】同じ入力信号系から得るディジタル値が低感度
リレーの非飽和域に有り且つ高感度リレーの非飽和域に
有ることの同時成立の有無から入力信号系の正常・異常
の監視を行う。The normality / abnormality of the input signal system is monitored based on whether or not the digital values obtained from the same input signal system are in the non-saturation region of the low-sensitivity relay and in the non-saturation region of the high-sensitivity relay at the same time.
【0010】[0010]
【実施例】図1は、本発明の一実施例を示すディジタル
型保護継電装置の要部構成図である。低感度リレー用の
サンプリング回路11〜13は、系統の各種変成器からの
電圧又は電流の各相検出信号iR,iS,iTを高い比率
で取り込み、一定のサンプリング周期でそれぞれ順次サ
ンプリングする。A/D変換器21〜23は、サンプリン
グ回路11〜13の各サンプリング信号を対応したディジ
タル値IR,IS,ITに変換する。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT FIG. 1 is a block diagram showing the essential parts of a digital protective relay device according to an embodiment of the present invention. Sampling circuit 1 1 to 1 3 for the low-sensitivity relay, phase detection signal i R of the voltage or current from the grid of various transformer, i S, a i T uptake at a high rate, sequentially each at a constant sampling period To sample. A / D converter 2 1 to 2 3 converts each sampling signal of the sampling circuit 1 1 to 1 3 digital value I R corresponding, I S, to I T.
【0011】同様に、高感度リレー用のサンプリング回
路14〜16は、同じ系統から異なる入力信号回路を通し
て低い比率で取り込み、各相検出信号iR',iS',iT'を
サンプリングし、A/D変換器24〜26によって対応し
たディジタル値IR',IS',IT’を得る。[0011] Similarly, a sampling circuit 1 4 to 1 6 for high-sensitivity relay takes a low ratio through different input signal circuit from the same lineage, phase detection signal i R ', i S', sampling the i T ' Then, the corresponding digital values I R ′, I S ′ and I T ′ are obtained by the A / D converters 2 4 to 2 6 .
【0012】演算部3は、各ディジタル値を使って低感
度のリレー特性になる保護演算及び高感度のリレー特性
になる保護演算を行い、演算結果は出力制御部4を介し
て出力される。CPU5は、各部のタイミング制御や演
算に必要なデータの入出力を制御する。The arithmetic unit 3 uses each digital value to carry out a protective arithmetic operation having a low-sensitivity relay characteristic and a protective arithmetic operation having a high-sensitivity relay characteristic, and the arithmetic operation result is output via the output control unit 4. The CPU 5 controls the timing control of each unit and the input / output of data necessary for calculation.
【0013】入力信号系監視手段としての監視回路6
は、A/D変換器21〜26からの各相ディジタル値を入
力し、低感度側と高感度側で異なる値にした非飽和設定
値との大小を判定する判定演算部61〜66を備える。Monitoring circuit 6 as input signal system monitoring means
Is, A / D inputs the phase digital value from the transducer 2 1 to 2 6, determination computing unit 61 - the magnitude of the non-saturated set values to different values in the low-sensitivity and high-sensitivity Equipped with 6 6 .
【0014】本実施例では、低感度リレーの最大入力が
49.5A、高感度リレーの最大入力が0.24Aの場合
を示し、このときの非飽和設定値は、低感度側は0.4
Aとし、この値以上にディジタル値IR,IS,ITがあ
れば判定演算部61〜63はそれぞれ低感度側入力が非飽
和にあると判定する。In this embodiment, the maximum input of the low-sensitivity relay is 49.5 A, and the maximum input of the high-sensitivity relay is 0.24 A. The non-saturation set value at this time is 0.4 on the low sensitivity side.
A, and if there are digital values I R , I S , and I T equal to or more than this value, the determination calculation units 6 1 to 6 3 determine that the low-sensitivity side inputs are unsaturated.
【0015】同様に、高感度側はディジタル値IR’,
IS’,IT’が0.2A以下にあれば判定演算部64〜6
6はそれぞれ非飽和にあると判定する。Similarly, on the high sensitivity side, the digital value I R ',
If I S 'and I T ' are less than 0.2 A, the judgment calculation units 6 4 to 6
6 is judged to be unsaturated.
【0016】各判定演算部61〜66において、低感度側
と高感度側の同じ相の信号、例えばR相の信号IRと
IR’についての判定結果は、論理積判定部67〜69に
よって両判定結果の同時成立の有無を判定する。In each of the judgment calculation units 6 1 to 6 6 , the judgment result of the signal of the same phase on the low sensitivity side and the high sensitivity side, for example, the R phase signals I R and I R ′ is the logical product judgment unit 6 7 It determines the presence or absence of simultaneous establishment of both the determination result by 6 9.
【0017】タイマ部610〜612は、それぞれ論理積判
定部67〜69の判定結果が一定時間以上継続したときに
入力信号系の異常判定出力NGを得る。The timer units 6 10 to 6 12 obtain the abnormality determination output NG of the input signal system when the determination results of the logical product determination units 6 7 to 6 9 continue for a certain time or longer.
【0018】本実施例において、論理積判定部67〜69
による同時成立判定は、低感度側及び高感度側共に非飽
和の入力を得ていることを意味し、このような状態は入
力信号系が正常であれば有り得ないものになる。In the present embodiment, the logical product judging sections 6 7 to 6 9
The simultaneous establishment determination by means that both the low-sensitivity side and the high-sensitivity side have obtained unsaturated inputs, and such a state is impossible if the input signal system is normal.
【0019】したがって、論理積判定部67〜69の少な
くとも1つに同時成立の出力が得られたときには、入力
信号系に異常が発生したと判定できることになる。タイ
マ部610〜612は、異常判定が一定時間継続することを
監視出力の条件にすることにより、系統に事故発生した
時など誤った同時成立の判定を防止する。Therefore, when at least one of the logical product determination sections 6 7 to 6 9 outputs simultaneously established, it can be determined that an abnormality has occurred in the input signal system. Timer section 6 10-6 12, abnormality determination by to the conditions of the monitoring output to continue a certain time, to prevent the determination of the simultaneous establishment erroneous like when an accident occurs in the system.
【0020】[0020]
【発明の効果】以上のとおり、本発明によれば、系統の
各相の電圧又は電流をサンプリングとA/D変換を含む
入力信号系を介して取り込み、この入力信号系の入力デ
ィジタル値からそれぞれ高感度と低感度のリレー特性を
有して保護演算するディジタル型保護継電装置におい
て、同じ入力信号系から得るディジタル値が低感度リレ
ーの非飽和域に有り且つ高感度リレーの非飽和域に有る
ことの同時成立の有無から入力信号系の正常・異常の監
視を行うようにしたため、高感度リレーを備える装置に
おいても従来の零相監視等による入力信号系の無監視の
状態が無くなり、保護継電装置の信頼性を向上できる効
果がある。As described above, according to the present invention, the voltage or current of each phase of the system is taken in via the input signal system including sampling and A / D conversion, and the input digital value of this input signal system is used for each. In a digital protection relay device that performs protection calculation with high-sensitivity and low-sensitivity relay characteristics, the digital value obtained from the same input signal system is in the non-saturation range of the low-sensitivity relay and in the non-saturation range of the high-sensitivity relay. Since the input signal system is monitored for normality / abnormality depending on whether or not there are simultaneous occurrences, even in a device equipped with a high-sensitivity relay, the non-monitoring state of the input signal system by conventional zero-phase monitoring, etc. is eliminated and protection is performed. This has the effect of improving the reliability of the relay device.
【図1】本発明の一実施例を示す要部ブロック図。FIG. 1 is a block diagram of essential parts showing an embodiment of the present invention.
【図2】従来の零相監視のベクトル図。FIG. 2 is a vector diagram of conventional zero-phase monitoring.
【図3】入力信号系の非飽和と飽和の波形図。FIG. 3 is a waveform diagram of non-saturation and saturation of the input signal system.
11、16…サンプリング回路 21、26…A/D変換器 3…演算部 4…出力制御回路 5…CPU 61、66…判定演算部 610、612…タイマ1 1 1 6 ... Sampling circuit 2 1 2 6 A / D converter 3 Calculation unit 4 Output control circuit 5 CPU 6 1 6 6 Judgment calculation unit 6 10 6 12 Timer
Claims (1)
グとA/D変換を含む入力信号系を介して取り込み、こ
の入力信号系の入力ディジタル値からそれぞれ高感度と
低感度のリレー特性を有して保護演算するディジタル型
保護継電装置において、前記入力信号系から得たディジ
タル値が低感度リレーの非飽和域にあることを各相別に
判定する判定演算部と、前記入力信号系から得たディジ
タル値が高感度リレーの非飽和域にあることを各相別に
判定する判定演算部と、前記両判定演算部の同じ相の判
定出力が同時に成立したときに前記入力信号系の異常と
判定する論理積判定部とを備えたことを特徴とするディ
ジタル型保護継電装置。1. A voltage or current of each phase of the system is taken in through an input signal system including sampling and A / D conversion, and high-sensitivity and low-sensitivity relay characteristics are respectively obtained from input digital values of this input signal system. In the digital protective relay device that performs the protection calculation by performing the protection calculation, the determination calculation unit that determines, for each phase, that the digital value obtained from the input signal system is in the non-saturation range of the low-sensitivity relay, and the digital signal obtained from the input signal system. It is determined that the input signal system is abnormal when both the judgment calculation unit that judges that the digital value is in the non-saturation range of the high-sensitivity relay and the judgment outputs of the same phase of both judgment calculation units are satisfied at the same time. And a logical product determining section for performing the digital protection relay.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP20593893A JP3196441B2 (en) | 1993-08-20 | 1993-08-20 | Digital protection relay |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP20593893A JP3196441B2 (en) | 1993-08-20 | 1993-08-20 | Digital protection relay |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH0759248A true JPH0759248A (en) | 1995-03-03 |
JP3196441B2 JP3196441B2 (en) | 2001-08-06 |
Family
ID=16515214
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP20593893A Expired - Fee Related JP3196441B2 (en) | 1993-08-20 | 1993-08-20 | Digital protection relay |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP3196441B2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2019140855A (en) * | 2018-02-15 | 2019-08-22 | 株式会社明電舎 | Digital protection relay |
-
1993
- 1993-08-20 JP JP20593893A patent/JP3196441B2/en not_active Expired - Fee Related
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2019140855A (en) * | 2018-02-15 | 2019-08-22 | 株式会社明電舎 | Digital protection relay |
Also Published As
Publication number | Publication date |
---|---|
JP3196441B2 (en) | 2001-08-06 |
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