JPH0758751A - Method for constituting alarm information cell and method for detecting alarm - Google Patents

Abstract

PURPOSE:To provide an ATM communications device with a method which discriminates a 1st alarm information cell generated in the device itself and a 2nd alarm information cell received from a host device and a detection inhibiting method for an alarm information cell generated in the device itself. CONSTITUTION:The ATM communications device, equipped with a reception-side interface part 2 consisting of a cell length conversion part 3, a fault factor detection part 4, a VP-AIS assembling circuit 5, a discrimination information adding circuit 6, and a cell multiplexing part 7 and a transmission-side interface part 9 consisting of a VP-AIS detecting circuit 10, a discrimination information referring circuit 11, and a cell length conversion part 12, adds discrimination information to an alarm information cell (VP-AIS cell) generated in itself and recognizes whether or not a cell is the VP-AIS cell generated in itself by the discrimination information referring circuit 11.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an ATM communication device for transferring cells in an asynchronous transfer mode, and a method for constructing an alarm notification cell in the ATM communication device for transferring cells in the asynchronous transfer mode, and the ATM. Method for identifying a first alarm notification cell newly generated inside a communication device and a second alarm notification cell received from an upper ATM communication device through an ATM transmission line, and the first alarm notification cell The present invention relates to an alarm detection method which does not erroneously detect an alarm based on (1) in the ATM communication device.

[0002]

2. Description of the Related Art A conventional alarm detection processing method in a communication network in a synchronous transfer mode will be described with reference to FIG. The alarm processing circuit in the conventional communication device 23 includes an upper path alarm detection circuit 29, a lower path alarm transmission circuit 30, a switch 31, a lower path alarm detection circuit 32, an alarm collection circuit 33, an alarm priority processing circuit 34, and path setting information storage. Circuit 3
5 and. The upper path alarm detection circuit 29 and the lower path alarm transmission circuit 30 constitute the reception side interface section 22, and the lower path alarm detection circuit 32 and the path setting information storage circuit 35 constitute the transmission side interface section 24.

The alarm information is divided into two types, an upper path alarm and a lower path alarm. The lower path alarm is generated by the upper path alarm received by the upper path alarm detection circuit 29. Therefore, it is necessary to distinguish between the upper path alarm received from the upper apparatus and the lower path alarm detected by the own apparatus. That is, it is necessary to mask the lower path alarm detected by the self device. The upper path alarm of the alarm information from the upper device is detected by the upper path alarm detection circuit 29, that is, the reception side interface unit 22. The lower path alarm is detected by the lower path alarm detection circuit 32, that is, the transmission side interface unit 24.

Therefore, in the conventional device, in order to prevent the alarm information sent from the lower path alarm sending circuit 30 from being erroneously detected by the lower path alarm detecting circuit 32, the lower path alarm detecting circuit 32 in the alarm collecting circuit 33. Lower path alarm information detected by the upper path alarm detection circuit 29
Each of the upper-level path alarms detected in 1. is collected, and the alarm priority processing circuit 34 collects the upper-level path alarms based on the path setting information indicating the connection relationship between the upper level path and the lower level path, which is supplied via the path setting information storage circuit 35. Priority processing is applied to and an external alarm is output. Further, this priority processing is generally performed by software processing.

As a device for the synchronous transfer mode described above, there is known document "Transmission Facility Design for Digital Network" (198).
There is an M20 synchronous multiplex converter (hereinafter abbreviated as M20) described on pages 139 to 152 of Kitamura et al. In this device, the REC corresponds to the upper path warning, and the handling group (Handling Group)
p) for each AIS (Alarm Indication Signal) (HG-A
IS) corresponds to the lower path alarm. In the M20, when the 6.3M interface unit on the transmission path side detects an abnormality in the input signal (input disconnection, loss of frame synchronization), the HG-AIS is transmitted downstream. M20 is a 384 kb / s unit TSI (Ti
a me slot interchanger), and a circuit termination unit (DCAT) is arranged in the subsequent stage. The line termination unit monitors the path in HG (Handling Group) units, and
It has a function of detecting a G-AIS alarm. Therefore,
As described above, HG-AIS is subordinated by the detection of REC.
, The HG-AIS associated with REC is detected for 16 passes. However, as M20, the detected H
G-AIS is a secondary alarm accompanying REC, and the alarm output to the device for managing the network need only be REC. Therefore, priority processing of the alarm is necessary,
As described above, in the M20, since the TSI is provided in the preceding stage of the line terminating unit, the correspondence between the upper path and the lower path is variable. In the M20, as a countermeasure, the alarm processing unit has the path setting information indicating the connection relationship between the upper path (6.3M transmission line) and the lower path (HG) as described above, and the priority processing is realized by the software processing. Was.

On the other hand, as shown in FIG. 5, the alarm transfer means in the conventional asynchronous transfer mode communication network, that is, the ATM communication network, is ATM terminal (a) 21 and ATM terminal (b).
28 is connected via the ATM communication device (a) 23 and the ATM communication device (b) 26. This A
TM communication device (a) 23 and ATM communication device (b) 2
Reference numeral 6 includes a reception side interface unit (a) 22, a transmission side interface unit (a) 24, a reception side interface unit (b) 25, and a transmission side interface unit (b) 27, respectively. In an ATM network that transfers a virtual path, an ATM communication device (a) that detects a virtual path failure sends virtual path failure information (hereinafter, VP-AIS or VP-AIS cell) to a lower ATM communication apparatus (b). Referred to as).

Fault information of a virtual path in such an ATM communication network includes fault information newly generated in the ATM communication device (hereinafter, a cell including this fault information is referred to as a first alarm notification cell). There is failure information (hereinafter, a cell including this failure information is referred to as a second alarm cell) received from a higher-order ATM notification device through an ATM transmission line. Further, as shown in FIG. 5, from the viewpoint of clarifying the demarcation point, the sending point and the detecting point of the VP-AIS cell are provided in the receiving side interface section, and the detecting point of the transmission path failure is the receiving side. In the interface section, the VP-AIS detection point is provided in the transmitting side interface section.

For example, as shown above the two-dot chain line, AT
When a fault A occurs on the transmission path on the upper side of the M communication device (a), the fault is detected at the detection point provided in the reception side interface unit (a) 22 of the ATM communication device (a) 23, and the reception side is detected. Fault information (VP-AIS) indicating the occurrence of a fault in the transmission path is created at the sending point provided in the interface unit (a) 22, and the transmission side interface unit (a) 24 directs it toward the ATM communication device (b) 26. Send VP-AIS (a). This VP-AIS is used by the ATM communication device (b) 26 and the ATM terminal (b) 28 to process the transferred information.

[0009]

However, as described above, in the current ATM communication apparatus, the receiving side interface section 22 detects a transmission line failure and sends out the VP-AIS, and the transmitting side interface section 24 sends the VP-AIS. Since the AIS is detected, the ATM communication device (a) 2 can handle the transmission line failure B as shown in the lower part of the chain double-dashed line in FIG.
VP sent by the receiving side interface unit (a) 22 of No. 3
-The AIS (b) and the VP-AIS transferred from the higher-level ATM communication device are detected without being discriminated by the transmission side interface unit (a) 24 of the ATM communication device (a) 23, and 2 There is a problem that it is not possible to determine the kind of failure information.

When the prior art alarm priority processing method in the STM is applied to such an ATM communication device, the ATM communication device accommodates a large number of paths of 4096 VP at maximum, so that the path setting information. It is impossible in terms of throughput to process the priority processing based on the software. Therefore, it is necessary to provide another alarm priority processing method instead of the conventional software processing method.

[0011]

In order to solve the above problems, the present invention provides two types of VP-AIS, the first and second alarm cells, in a specific area of a cell to be transferred inside the ATM communication apparatus. It is identified by adding identification information for identifying the cell. In addition, the first alarm notification cell is the AT
A specific area to which the identification information of the first alarm notification cell is added so as to be detected by a lower device without being detected in the M communication device is a region terminated in the ATM communication device or deleted. It is realized by setting it as the area to be covered.

[0012]

The operation of the solving means will be described below. AT
In the cell flow inside the M communication device, as described above, the AT
There is a first alarm notification cell newly generated in the M communication device and a second alarm notification cell received from an upper ATM communication device through an ATM transmission line. The identification can be made by adding identification information for identifying whether or not the alarm notification cell is newly generated inside the ATM communication device to the specific area. In order to prevent the first alarm notification cell from being detected inside the ATM communication device, the content of the identification information to be added is set to "detection prohibited" so that the inside of the ATM communication device is not detected. It can be prevented from being detected. Further, as described above, since the identification information (“detection prohibited”) in the alarm notification cell is terminated or deleted inside the ATM communication device, it is difficult for the lower device to detect the alarm notification cell. I don't.

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A first embodiment of the present invention will be described below with reference to FIGS. In this embodiment, the ATM
It is characterized in that the cell length is lengthened when transferring cells within the communication device. The transmission operation of the VP-AIS cell includes the VP-AIS generated in the reception side interface unit 2.
To distinguish it from the VP-AIS received from the ATM input transmission line 1, the identification information bit 19 inside the additional octet 20 is set to "1" (detection prohibited) as shown in FIG.
Is sent to the ATM switch 8 in the subsequent stage.

FIG. 1 is a block diagram of an ATM communication device for realizing the present invention. The ATM communication device (a) 23 is
The receiving side interface unit 2 is connected to the ATM input transmission line 1, the ATM switch 8 and the transmitting side interface unit 9 is connected to the ATM output transmission line 13.
The reception side interface unit 2 is composed of a reception side cell length conversion unit 3, a failure factor detection unit 4, a VP-AIS assembly circuit 5, an identification information addition circuit 6, and a cell multiplexing unit 7, and a transmission side interface unit 9 is It comprises a VP-AIS detection circuit 10, an identification information reference circuit 11, and a transmission side cell length conversion unit 12.

2 and 3 show cell formats before and after the cell length conversion in the cell length conversion unit 3 shown in FIG. 1. FIG. 2 shows, for example, the cell length on the ATM input transmission line 1. The cell format of a cell at 53 bytes is shown, and FIG. 3 shows the cell format of a cell at a cell length of 54 bytes on a transmission path in the device.

A cell having a cell length of 53 bytes, which is input from the ATM input transmission line 1, is composed of a 4-byte header 16, a 1-byte HEC byte 17, and a remaining 48-byte payload 18. A cell with a cell length of 54 bytes on the transmission line of is a 1-byte additional octet 20.
It consists of a 4-byte header 16, a 1-byte HEC byte 17, and a remaining 48-byte information field, that is, a payload 18.

The header 16 contains information such as virtual path identification information and virtual channel identification information, and the HEC (Head
Error Control) Byte 17 contains information for recognizing and synchronizing the cell position, error correction of the header, etc., and additional octet 20 contains VP-AIS generated in the receiving side interface unit 2. It contains information having an identification information bit 19 for distinguishing the cell from the VP-AIS received from the ATM input transmission line 1.

Next, the operation of the first embodiment will be described separately for the receiving side interface section 2 and the transmitting side interface section 9 with reference to FIG. (1) VP-AIS sending operation in the receiving side interface section The sending of the VP-AIS cell is performed in the receiving side interface section 2 as described above. An external fault such as a fault in a section or a path layer is detected by the fault factor detection unit 4, and the VP-A is operated by the operation of the identification information adding circuit 6 based on the detection factor.
The IS assembly circuit 5 generates VP-AIS. Also, A
All cells input from the TM input transmission line 1 to the reception side interface unit 2 are processed by the reception side cell length conversion unit 3 as shown in FIG.
The cell having the cell length of 53 bytes shown in FIG. 3 is converted into the cell having the cell length of 54 bytes shown in FIG. VP-
The VP-AIS assembled by the AIS assembling circuit 5 is multiplexed by the cell multiplexing unit 7 together with other cells converted by the cell length converting unit 3 and sent to the ATM switch 8.

That is, all cells to be transferred are 54 bytes long in the ATM communication device, and the cells in the device are ATM.
An additional octet 20 is added to the reception cell from the transmission line 1 in a shape of 1 byte. Therefore, the VP-AIS cell generated in the device also has a cell length of 54 bytes. The present invention solves the problem by utilizing this additional octet 1 byte.

Next, the receiving process of the VP-AIS cell in the present invention will be described. (2) VP-AIS reception operation in the transmission side interface unit The detection of the VP-AIS cell is performed by the transmission side interface unit 9 as described above. VP of the transmission side interface unit 9-
In the AIS detection circuit 10, the incoming VP-AIS
In addition to the information for identifying the cell, the identification information bit 19 in the above-mentioned additional octet is also referred to, and the self apparatus, that is, the VP-AIS cell created by detecting the failure in the reception side interface unit 2 is received. In this case, the added identification information bit "1" is detected by the identification information addition circuit 6, a VP-AIS cell detection prohibition signal is generated in the identification information reference circuit 11, and the VP-AIS detection circuit 10 detects VP-AIS reception. The determined VP-AIS cell reception signal is masked (canceled) to prevent the alarm from being sent to the outside.

On the other hand, a VP coming from a device positioned higher than this device, that is, a VP coming from the ATM input transmission line 1.
-For the AIS cell as well, the VP of the transmission side interface unit 9
The VP-AIS cell detection prohibition signal is not generated in the identification information reference circuit 11 because the identification information bit "1" (detection prohibition) is not mounted in this cell, although it is detected by the AIS cell detection circuit 10. Therefore, it is determined that the VP-AIS cell is received and an external alarm is sent.

Further, VP- of the receiving side interface unit 2
Identification information bit newly generated in AIS assembly circuit 5 "
In the VP-AIS cell equipped with "1" (detection prohibited), the additional octet 20 including the identification information bit 19 is deleted by the cell length conversion unit 12 of the transmission side interface unit 9 and the transmission line cell is changed from the in-device cell length of 54 bytes. The length is converted to 53 bytes, and therefore, this cell is sent to the ATM output transmission line 13 in a normal form, so that a failure information detection signal in the transmission side interface section of the ATM communication device positioned lower than the present device. Does not hinder the outbreak of.

Next, a second embodiment will be described with reference to FIG. This ATM communication device (a) 23 includes a receiving side interface section 2 connected to an ATM input transmission line 1 and an ATM side interface section 2.
It is composed of a switch 8 and a transmission side interface section 9 connected to an ATM output transmission line 13. The reception side interface unit 2 includes a failure factor detection unit 4, a VP-AIS assembly circuit 5, an identification information addition circuit 6, a cell multiplexing unit 7, and an HEC.
A byte area (header error control information, hereinafter referred to as HEC byte) is composed of a termination circuit 14, and the transmission side interface unit 9 is composed of a VP-AIS detection circuit 10, an identification information reference circuit 11, and an HEC addition circuit 15. To be done.

The HEC byte is the HEC termination circuit 14
It is information that is terminated by and is inserted again in the transmission side interface unit 9, and is an unused area in the ATM communication device. An additional octet including an identification bit similar to that of the first embodiment is inserted into the HEC byte terminated at the reception side interface section 2, and the reception side interface section 9 solves the problem by this identification bit. Next, the operation of the second embodiment will be described separately for the reception side interface unit 2 and the transmission side interface unit 9.

(1) VP at the receiving side interface section
AIS transmission operation 2 The transmission of the VP-AIS cell is performed by the receiving side interface unit as in the first embodiment. The characteristic of the receiving side interface section of the present embodiment is that the identification information bit is replaced and mounted in the HEC byte area which is terminated by the HEC terminating circuit 14 and is an unused area in the ATM communication apparatus.
In assembling the cell. Fault factor detection unit 4, VP
-The operation / mechanisms of the AIS assembly circuit 5, the identification information addition circuit 6, and the cell multiplexing unit 7 are the same as those in the first embodiment. This enables the VP-A in the ATM communication device.
The IS cell is transferred with the bit length inputted from the input transmission line 1 with the identification information.

(2) VP- in the transmitting side interface section
AIS reception operation 2 The detection of a VP-AIS cell is also performed by the transmission side interface unit 9 as in the first embodiment. The detection operation of the VP-AIS detection circuit 10 is similar to that of the first embodiment. The characteristic of the transmitting side of this embodiment is that the identification information bit mounted in the HEC area of the received VP-AIS cell is referred to. Therefore, the position of the identification reference circuit 11 can be realized if it is located at a stage before the HEC byte addition circuit 15 as shown in FIG. The cell transmitted from the transmission side interface unit 9 is H of the interface unit.
The EC addition circuit 15 replaces the identification information bits mounted in the HEC byte area with the HEC byte, restores it to its original form, and sends it.

Further, according to the present embodiment, since it can be realized regardless of the presence or absence of the cell length conversion unit described in the first embodiment, it can be applied to an ATM communication device having no cell length conversion function. The detection operation is similar to that of the first embodiment, and the effect is the same. As described above, the position where the identification information on the alarm notification cell is mounted is the reception side interface section, and the mounting area on that cell is an unused area in the device. Further, the reference position of the identification information is realized by setting it as an area where deletion or information replacement is performed at a stage subsequent to the identification information reference circuit of the transmission side interface section.

Therefore, the mounting position of the identification information bit is not limited to the position described in this embodiment as long as it can be terminated in the ATM communication device. Further, in the description of the first embodiment, the conversion unit of the cell length conversion unit is described as 53 bytes / 54 bytes conversion or 54 bytes / 53 bytes conversion, but in the ATM communication system, the throughput on the transmission line is Since the throughput in the device is higher than that in the device, the cell length in the device is longer than the cell length on the transmission path. Therefore, the present method can be applied to an ATM communication device for converting 53 bytes / 64 bytes, for example.

[0029]

As described above, according to the method of the present invention as described in the embodiments, the first alarm notification cell (VP-AIS cell) newly transmitted by the receiving side interface section refers to the identification information bit. By doing so, the transmission side interface unit of the own device can identify the second alarm notification cell received from the upper ATM communication device through the ATM transmission line, and sends the VP-AIS cell to the downstream device without erroneous detection. can do.

[Brief description of drawings]

FIG. 1 is a configuration diagram of an ATM communication device showing a first embodiment of the present invention.

FIG. 2 is a block diagram of a 53-byte cell.

FIG. 3 is a block diagram of a 54-byte cell.

FIG. 4 is a block diagram of an ATM communication device showing a second embodiment of the present invention.

FIG. 5 is an explanatory diagram of alarm transfer in ATM.

FIG. 6 is a configuration diagram of an alarm processing circuit according to a conventional technique.

[Explanation of symbols]

 1 ... ATM input transmission line 2 ... Reception side interface section 3 ... Transmission side cell length conversion section 4 ... Fault detection section 5 ... VP-AIS assembly circuit 6 ... Identification information addition circuit 7 ... Cell multiplexing section 8 ... ATM switch 9 ... Transmission Side interface unit 10 ... VP-AIS detection circuit 11 ... Identification information reference circuit 12 ... Reception side cell length conversion unit 13 ... ATM output transmission line 14 ... HEC termination circuit 15 ... HEC addition circuit 16 ... Header 17 ... HEC byte 18 ... Payload 19 ... Identification information bit 20 ... Additional octet 21 ... ATM terminal (a) 22 ... Reception side interface section (a) 23 ... ATM communication device (a) 24 ... Transmission side interface section (a) 25 ... Reception side interface section (b) ) 26 ... ATM communication device (b) 27 ... Transmission side interface unit (b) 28 ... ATM terminal (b) 29 ... Alarm detection circuit 30 ... lower path alarm transmission circuit 31 ... switch 32 ... lower path alarm detection circuit 33 ... alarm collection circuit 34 ... alarm priority processing circuit 35 ... path setting information storage circuit

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification code Internal reference number FI Technical indication location H04Q 3/00 9076-5K 11/04 9076-5K H04Q 11/04 L (72) Inventor Gen Shimizu Ming 216 Totsuka-cho, Totsuka-ku, Yokohama, Kanagawa Pref., Hitachi, Ltd., Information & Communication Division (72) Inventor, Norihiro Ashi 216 Totsuka-cho, Totsuka-ku, Yokohama, Kanagawa, Ltd. (72) Invention, Hitachi, Ltd. Nobu Nishimura, 216 Totsuka-cho, Totsuka-ku, Yokohama-shi, Kanagawa Prefecture Hitachi, Ltd. Information & Communication Division

Claims (3)

[Claims] 1. A method for constructing a cell in an ATM communication device for transferring a cell in an asynchronous transfer mode, comprising:
The information for identifying the first alarm notification cell newly generated in the TM communication device and the second alarm notification cell received from the upper ATM communication device through the ATM transmission line is installed in the cell. How to configure a featured cell. 2. An ATM communication device for transferring a cell in an asynchronous transfer mode, wherein a first alarm notification cell newly generated in the ATM communication device and a first alarm notification cell received from an upper ATM communication device through an ATM transmission line. In identifying the second alarm notification cell, the cell identification method is characterized by referring to information for distinguishing the first alarm notification cell and the second alarm notification cell mounted inside the alarm notification cell. . 3. An ATM communication device for transferring a cell in an asynchronous transfer mode, wherein cell identification information for distinguishing an alarm notification cell generated in the device itself is mounted inside the alarm notification cell, and the cell identification is performed when an alarm is detected. An alarm detection method characterized by determining whether or not an alarm can be detected by referring to information.