JPH0748716B2 - Hitless line switching circuit - Google Patents

Description

TECHNICAL FIELD The present invention relates to a hitless line switching circuit in digital signal transmission, and more particularly to a hitless line switching circuit most suitable for a hitless line switching circuit in wireless digital signal transmission. .

[Conventional technology]

Conventionally, hitless line switching circuits have been used to hitlessly repair working line transmission line failures in digital radio transmission lines in which protection lines are provided for a plurality of working lines. FIG. 2 is a circuit block diagram showing a conventional hitless line switching circuit of this type, and FIG. 3 is a block diagram of a hitless line switching system.

A general switching sequence of hitless switching in the hitless line switching system shown in FIG. 3 is performed as follows. First, through the sending end line switching control circuit 18 and the receiving end line switching control circuit 19, after checking the presence / absence B of the protection line due to the failure A of the working line and the use state confirmation C of the protection line, the parallel operation D of the sending end is performed. Done. next,
After the failure working line transmission signal 203 and the protection line transmission signal 204 are compared on the receiving end side, the hitless switching E is performed after the phase matching of the bit and the signal is confirmed, and the relief of the faulty line is completed. At this time, hitless switching circuit
When there is a failure in 15, the receiving end switching F repairs the failed line.

FIG. 2 is a block diagram in which the portions of the separation circuit 14 and the hitless switching circuit 15 shown in FIG.

In the conventional hitless line switching circuit shown in FIG.
The multiplexed signals 101 and 102 of the protection line and the working line are supplied to the respective demultiplexing circuits 14, and the protection signal 103 and the working signal 104 which are the original signals are obtained.

The asynchronous detection circuit 22a detects whether the clock of the buffer circuit 21 of the hitless switching circuit 15 is synchronized with the input clock from the working line or the protection line. When hitless switching is performed by the switching signal 106, if there is a phase difference between the standby signal 103 and the working signal 104,
The larger the phase difference, the longer it takes to absorb the phase step.

The time until the clock phase of the buffer circuit 21 coincides with the phase of the input clock of the line to be switched, that is, the phase step absorption time, is actually a hitless switchable synchronous state, but the phase step is detected as an asynchronous state. Therefore, the device failure signal 107 is output from the asynchronous detection circuit 22a.

When the device failure signal 107 is output, it is determined that the hitless switching circuit 15 has failed, and the receiving end switching circuit 15
Attempt to switch at 20. Switching is performed by supplying the switching signal 108 to the receiving end switching circuit 20, but a bit error occurs during switching because the switching is not performed by the hitless switching circuit 15. In other words, if the hitless switching circuit 15 performs the switching, the switching is completed hitlessly, but since the asynchronous detection circuit 22a detects the phase step as an asynchronous state at the time of switching, the receiving end switching circuit 20 There is a drawback that switching is performed and a bit error occurs.

[Problems to be Solved by the Invention]

As described above, in the conventional hitless line switching circuit, when the phase difference between the working line signal and the protection line signal is large, it takes time to absorb the phase step at the time of switching the line, and the phase step absorption ends. Up to the above, since the phase step is detected as the asynchronous state and the receiving end is switched even though it is in the synchronous state, there is a disadvantage that the switching is not completed without hit.

[Means for Solving the Problems]

The present invention has been made in view of the above points, and when the phase difference between the working line signal and the protection line signal is large, it takes time to absorb the phase step at the time of line switching, and until the absorption of the phase step ends. Aims to eliminate the drawback that switching is not completed without hitting because it detects the phase step as an asynchronous state and switches the receiving end even though it is in a synchronous state. In the hitless line switching circuit for a digital signal transmission line in which a protection line is provided for the working line, a demultiplexing circuit for demultiplexing each multiplexed signal of the digital signal transmission line and reproducing an original signal, A signal from the demultiplexing circuit of the working line and a signal from the demultiplexing circuit of the protection line are switched based on a hitless switching signal, resulting in a transmission line failure of the working line. A hitless switching circuit for hitless relief, a buffer circuit for absorbing a phase step change in the output of the hitless switching circuit at the time of hitless switching of the hitless switching circuit, and the buffer circuit from the buffer circuit An asynchronous detection circuit that masks an asynchronous signal output by a change in the phase step by the hitless switching signal for a certain time only when the hitless switching is performed to stop the output of the asynchronous detection signal, and an asynchronous detection from the asynchronous detection circuit. A receiving end switching circuit that performs switching by a receiving end switching signal based on a signal is provided.

〔Example〕

 Hereinafter, the present invention will be described with reference to the drawings.

FIG. 1 is a block circuit diagram showing an embodiment of a hitless line switching circuit according to the present invention. In the figure, the same components as those in FIG. 2 are designated by the same reference numerals, and a duplicate description will be omitted.

This embodiment is a drawback of the conventional hitless line switching circuit, and when the phase difference between the working line signal and the protection line signal becomes large, it takes time to absorb the phase step at the time of hitless switching, and the asynchronous detection circuit 22a ( (See FIG. 2) detects the phase step as an asynchronous state, and the receiving end switching circuit 20 performs switching by the receiving end switching signal 108 based on the asynchronous detection signal 107, so hitless switching cannot be performed. It is intended to improve the disadvantage.

When the transmission line fault detection signal A of the working line is detected, the sending end parallel operation D is performed in order to perform the hitless switching operation as in the conventional example shown in FIG.

If there is a phase difference between the output 104 of the separation circuit 14 for the working line and the output 103 of the separation circuit 14 for the protection line, the hitless switching circuit 15 changes the input signal 104 from the working side to the input signal 103 on the protection side. When switching, the time until the clock phase of the buffer circuit 21 matches the phase of the input clock of the line to be switched, the asynchronous signal output from the buffer circuit 21
The 109 causes the asynchronous detection circuit 22 to detect the phase step as an asynchronous state.

Therefore, in order to prevent the device fault signal 107 from being output for a fixed time until the absorption of the phase step ends, the hitless switching signal 106 is supplied to the asynchronous detection circuit 22, and the asynchronous detection circuit 22 is based on the signal. Is controlled to mask asynchronous detection for a certain period of time to prevent generation of the receiving end switching signal 108 by the asynchronous detection signal 107 and switching by the receiving end switching circuit 20.

As a result, at the time of hitless switching, even if there is a phase difference between the working line signal and the protection line signal, the asynchronous detection circuit 22
Since the device failure signal 107 is not output from, the hitless switching circuit 15 can perform hitless line switching without switching at the receiving end switching circuit 20.

〔The invention's effect〕

As described above, according to the present invention, in a hitless line switching circuit for a digital signal transmission line in which a protection line is provided for one or more working lines, the multiplexed signal of each digital signal transmission line is separated. And a recovery circuit for regenerating the original signal, a hitless switching circuit for hitlessly relieving a transmission line failure of the working line, a buffer circuit for absorbing a step change in phase during hitless switching, and a hit Since the asynchronous detection circuit that masks the asynchronous detection for a certain period only when the switchover is performed, and the receiving end switching circuit that relieves the transmission path failure of the working circuit when the hitless switching circuit fails, the working line signal and the spare When the phase difference with the line signal is large, it takes time to absorb the phase step when switching the line, and the phase is not synchronized until the absorption of the phase step ends. In order to perform switching the receiving end detects a phase step and asynchronous state, it is possible to remove the disadvantage that complete switching hitless.

[Brief description of drawings]

FIG. 1 is a block circuit diagram showing an embodiment of a hitless line switching circuit according to the present invention, FIG. 2 is a block circuit diagram showing a conventional hitless line switching circuit, and FIG. 3 is a hitless line switching circuit. It is a block diagram of a system. 11 …… Sending end switching circuit 12 …… Multiplexing circuit 13 …… Line monitoring circuit 14 …… Separation circuit 15 …… Hitless switching circuit 18 …… Sending end line switching control circuit 19 …… Reception end line switching control circuit 20 …… Reception end switching circuit 21 …… Buffer circuit 22 …… Asynchronous detection circuit

Claims (1)

[Claims] 1. A hitless line switching circuit for a digital signal transmission line, wherein a protection line is provided for one or more working lines, wherein a multiplexed signal of each digital signal transmission line is separated to obtain an original signal. A demultiplexing circuit for reproduction, a signal from the demultiplexing circuit of the working line and a signal from the demultiplexing circuit of the protection line are switched based on a hitless switching signal to hit a transmission line failure of the working line. Without hitless switching circuit, a buffer circuit for absorbing the phase step change of the output of the hitless switching circuit at the time of hitless switching of this hitless switching circuit, and the phase from this buffer circuit The asynchronous signal output due to the step change is masked by the hitless switching signal for a certain time only when the hitless switching is performed, and the asynchronous signal is not synchronized. A hitless line switching circuit comprising an asynchronous detection circuit for stopping the output of the period detection signal and a reception end switching circuit for switching the reception end switching signal based on the asynchronous detection signal from the asynchronous detection circuit. .