JPH0746961Y2 - Shared device - Google Patents

Shared device

Info

Publication number
JPH0746961Y2
JPH0746961Y2 JP3168392U JP3168392U JPH0746961Y2 JP H0746961 Y2 JPH0746961 Y2 JP H0746961Y2 JP 3168392 U JP3168392 U JP 3168392U JP 3168392 U JP3168392 U JP 3168392U JP H0746961 Y2 JPH0746961 Y2 JP H0746961Y2
Authority
JP
Japan
Prior art keywords
conductor
forming
dielectric substrate
conductors
grounded
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP3168392U
Other languages
Japanese (ja)
Other versions
JPH0585105U (en
Inventor
博 畠中
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nihon Dengyo Kosaku Co Ltd
Original Assignee
Nihon Dengyo Kosaku Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nihon Dengyo Kosaku Co Ltd filed Critical Nihon Dengyo Kosaku Co Ltd
Priority to JP3168392U priority Critical patent/JPH0746961Y2/en
Publication of JPH0585105U publication Critical patent/JPH0585105U/en
Application granted granted Critical
Publication of JPH0746961Y2 publication Critical patent/JPH0746961Y2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Description

【考案の詳細な説明】[Detailed description of the device]

【0001】[0001]

【産業上の利用分野】本考案は、極超短波帯(UHF
帯)における移動通信方式の基地局用アンテナ等の共用
器に関するものである。
[Industrial application] The present invention is applicable to the ultra high frequency band (UHF).
The present invention relates to a duplexer such as an antenna for a base station of a mobile communication system in a band.

【0002】[0002]

【従来の技術】図7は、従来の極超短波帯におけるアン
テナ等の共用器を示す断面図で、14は共通のシ−ルドケ
−ス、151 ないし156 は棒状の内部導体、164 は共通の
入力又は出力端子、161 及び166 は出力又は入力端子、
17は結合線路で、共通のシ−ルドケ−ス14の外部におい
て端子161 と164 の間に設けてある。182 及び183 は結
合線路17における分岐点、191 ないし194 及び196 は結
合容量素子で、このうち191 、194 及び196 は端子16
1 、164 及び166 の各内部導体に各別に接続し、192
び193 は結合線路17の分岐点182 及び183 に各別に接続
してある。この共用器においては、結合線路17の一端と
端子161 の接続点、分岐点182 及び183 、結合線路17の
他端と端子164 の接続点の各点間の間隔を、内部導体15
4ないし156 によって構成される帯域通過ろ波器の通過
域の中心周波数に対応する管内波長の1/4 に形成して、
内部導体151 ないし154 及び結合線路17によって構成さ
れる帯域阻止ろ波器の減衰域における中心周波数と、内
部導体154 ないし156 によって構成される帯域通過ろ波
器の通過域における中心周波数が一致するように形成し
てある。共通端子164 に入力された信号のうち、帯域通
過ろ波器の通過域内の周波数信号は端子166 から出力さ
れ、帯域阻止ろ波器において減衰して端子161 から出力
することなく、共通端子164 に入力された信号のうち、
帯域通過ろ波器の減衰域の周波数信号は端子166 から出
力することなく、端子161 から出力される。
2. Description of the Related Art FIG. 7 is a sectional view showing a common duplexer such as an antenna in a conventional ultra-high frequency band. 14 is a common shield case, 15 1 to 15 6 are rod-shaped inner conductors, and 16 4 is Common input or output terminals, 16 1 and 16 6 are output or input terminals,
Reference numeral 17 is a coupled line, which is provided between terminals 16 1 and 16 4 outside the common shield case 14. 18 2 and 18 3 branch point on the coupling line 17, 19 1 to 19 4 and 19 6 are coupling capacitance element, these 19 1, 19 4 and 19 6 are terminals 16
1 , 16 4 and 16 6 are individually connected to the inner conductors, and 19 2 and 19 3 are individually connected to branch points 18 2 and 18 3 of the coupling line 17. In this duplexer, the distance between the connection point of one end of the coupled line 17 and the terminal 16 1 , the branch points 18 2 and 18 3 , and the connection point of the other end of the coupled line 17 and the terminal 16 4 is set to the internal conductor. 15
4 to form a 1/4 of the guide wavelength corresponding to the center frequency of the passband configured bandpass wave filter by 15 6,
The center frequency in the attenuation band of the band stop filter composed of the inner conductors 15 1 to 15 4 and the coupling line 17 and the center frequency in the pass band of the band pass filter composed of the inner conductors 15 4 to 15 6 . Are formed to match. Of the signals input to the common terminal 16 4 , the frequency signal within the pass band of the band pass filter is output from the terminal 16 6 and is not attenuated in the band stop filter and output from the terminal 16 1 Of the signals input to terminal 16 4 ,
The frequency signal in the attenuation band of the band pass filter is output from the terminal 16 1 without being output from the terminal 16 6 .

【0003】[0003]

【考案が解決しようとする課題】上記従来の共用器は、
共通のシ−ルドケ−ス14内に棒状の内部導体151 ないし
156 を設けると共に、共通のシ−ルドケ−ス14の外部に
結合線路17を設けてあるため、全体の構成が複雑で、
又、各部品の製作誤差及び各部品の組立て誤差を避ける
ことができず、したがって所要の電気的特性をもたせる
ための調整作業を省くことができない。
[Problems to be Solved by the Invention]
Common sheet - Rudoke - to internal conductor 15 to the first rod-shaped scan 14
15 6 is provided, and since the coupling line 17 is provided outside the common shield case 14, the overall configuration is complicated,
Further, it is impossible to avoid manufacturing error of each part and assembling error of each part, and therefore it is not possible to omit the adjustment work for providing the required electric characteristics.

【0004】[0004]

【課題を解決するための手段】本考案は、帯域阻止ろ波
器の形成用導体と、通過域の中心周波数が前記帯域阻止
ろ波器における減衰域の中心周波数に一致する帯域通過
ろ波器の形成用導体とを設けた誘電体基板と、 内表面に
穿った溝に前記誘電体基板の周縁を嵌入させて、前記誘
電体基板を内装支持する共通のシールドケースとを備え
ると共に、 前記誘電体基板に設けられる帯域阻止ろ波器
の形成用導体が、 前記誘電体基板の表面に設けられ、各
下端部が前記共通のシールドケースに接地される複数個
の内部導体形成用導体と、 前記誘電体基板の表面のう
ち、前記各下端部が接地される複数個の内部導体形成用
導体の各上端部と適宜間隔を隔てる箇所に設けられ、上
端縁が前記共通のシールドケースに接地される結合線路
形成用接地導体と、 前記誘電体基板の裏面のうち、前記
誘電体基板の表面に設けられた前記結合線路形成用接地
導体に対応する箇所に設けられ、全長が、帯域阻止ろ波
器の減衰域における中心周波数に対応する管内波長の1
/4の整数倍で、一端を始端として、前記管内波長の1
/4間隔毎に分岐点を有する結合線路形成用導体と、
記各下端部が接地される複数個の内部導体形成用導体の
うち、初段又は終段の内部導体形成用導体の上端部と、
前記誘電体基板を介して対向する結合容量素子形成用導
体及びこの結合容量素子形成用導体を前記結合線路形成
用導体の一端及び共通の入力又は出力端子に接続する導
体と、 前記各下端部が接地される複数個の内部導体形成
用導体のうち、終段又は初段の内部導体形成用導体の上
端部と前記誘電体基板を介して対向する結合容量素子形
成用導体及びこの結合容量素子形成用導体を前記結合線
路形成用導体の他端及び出力又は入力端子に接続する導
体と、 前記各下端部が接地される複数個の内部導体形成
用導体のうち、中間段の内部導体形成用導体の上端部と
前記誘電体基板を介して対向する結合容量素子形成用導
体及びこの結合容量素子形成用導体を前記結合線路形成
用導体の前記分岐点に接続する導体とより成り、 前記誘
電体基板に設けられる帯域通過ろ波器の形成用導体が、
前記誘電体基板面に設けられ、各一端部が前記共通のシ
ールドケースに接地される複数個の内部導体形成用導体
と、 前記各一端部が接地される複数個の内部導体形成用
導体のうち、終段又は初段の内部導体形成用導体の非接
地端部と対向する結合容量素子形成用導体及びこの結合
容量素子形成用導体を出力又は入力端子に接続する導体
とより成る共用器を実現することによって従来の欠点を
除こうとするものである。
SUMMARY OF THE INVENTION The present invention is a band stop filter.
Centering frequency of the passband and the conductor for forming the container
Bandpass matching the center frequency of the attenuation band in the filter
A dielectric substrate provided with a conductor for forming a filter and an inner surface
Insert the peripheral edge of the dielectric substrate into the groove formed and
Equipped with a common shield case that internally supports the electric board
And a band stop filter provided on the dielectric substrate.
Forming conductor is provided on the surface of the dielectric substrate,
A plurality of lower ends of which are grounded to the common shield case
Inner conductor forming conductor and the surface of the dielectric substrate.
For forming a plurality of internal conductors whose lower ends are grounded
It is provided at a position that is appropriately spaced from each upper end of the conductor.
Coupling line whose edge is grounded to the common shield case
Of the formation ground conductor and the back surface of the dielectric substrate, the
The ground for forming the coupling line provided on the surface of the dielectric substrate
Provided at the location corresponding to the conductor, the entire length is
Of the guide wavelength corresponding to the center frequency in the attenuation range of the vessel
It is an integral multiple of / 4, with one end as the start end, and 1 of the guide wavelength.
/ 4 and coupling line forming conductor having a branch point for each interval, before
Note that a plurality of internal conductor forming conductors whose bottom ends are grounded
Of which, the upper end of the conductor for forming the first or last stage internal conductor,
Conductors for forming a coupling capacitance element facing each other through the dielectric substrate
The body and the conductor for forming the coupling capacitance element to form the coupling line
Conductor connected to one end of the conductor and a common input or output terminal
A body and a plurality of internal conductors whose lower ends are grounded
Of the conductors for forming the inner conductor of the final or first stage
Coupling capacitor element type with end portions facing each other through the dielectric substrate
The coupling conductor is formed by combining the production conductor and the coupling capacitor element forming conductor.
Conductor connected to the other end of the path forming conductor and the output or input terminal
A body and a plurality of internal conductors whose lower ends are grounded
Of the conductor for forming the inner conductor of the intermediate stage
Conductors for forming a coupling capacitance element facing each other through the dielectric substrate
The body and the conductor for forming the coupling capacitance element to form the coupling line
More it becomes a conductor connected to the branch point of use conductor, the induction
The conductor for forming the bandpass filter provided on the electric substrate is
It is provided on the surface of the dielectric substrate, and one end of each is the common shield.
A plurality of internal conductor forming conductors grounded to the shield case
And a plurality of internal conductors whose one end is grounded
Of the conductors, non-contact with the conductor for forming the inner conductor at the final stage or the first stage
Coupled capacitive element forming conductor facing the ground end and this coupling
Conductor for connecting the capacitive element forming conductor to the output or input terminal
This is intended to eliminate the conventional drawbacks by realizing a duplexer consisting of

【0005】[0005]

【実施例】図1は、本考案の一実施例を示す正面図、図
2は側面図、図3は図1のA−A断面図、図4は図1の
B−B断面図で、各図において、11及び12は共通のシ−
ルドケ−スの側壁、13及び14は端壁、15は上壁、16は下
壁、24は共通の入力又は出力端子、21及び26は出力又は
入力端子で、これらは例えば同軸接栓より成り、図には
示していないが同軸接栓21、24及び26の各内部導体が共
通のシ−ルドケ−スと接触することのないように、同軸
接栓21、24及び26の各内部導体と共通のシ−ルドケ−ス
の間に空隙を設けるか、絶縁層を介在させてある。3は
誘電体基板で、その表裏面に帯域通過ろ波器及び帯域阻
止ろ波器の構成素子を設けてある。
1 is a front view showing an embodiment of the present invention, FIG. 2 is a side view, FIG. 3 is a sectional view taken along line AA of FIG. 1, and FIG. 4 is a sectional view taken along line BB of FIG. in each figure, 1 1 and 1 2 are common sheet -
Rudoke - scan sidewalls of, 1 3 and 1 4 is the end wall, 1 5 upper wall, 1 6 the lower wall, 2 4 is a common input or output terminal, 2 1 and 2 6 output or input terminal, these Shi, for example made of coaxial connector, although not shown in the figure each inner conductor of the coaxial connector 2 1, 2 4 and 2 6 common - Rudoke - so as not to contact the scan, coaxial connector 2 1, 2 4 and 2 6 each inner conductor and the common sheet of - Rudoke - scan or providing an air gap between, are an insulating layer interposed therebetween. Reference numeral 3 denotes a dielectric substrate, on the front and back surfaces of which a band-pass filter and a band-stop filter are provided.

【0006】図5(a)は、誘電体基板3の表面図、図
5(b)は裏面図で、4ないし4は内部導体、5は
接地導体、6及び7は段間結合阻止導体、8はろ波器間
の干渉阻止導体で、段間結合阻止導体6及び7、ろ波器
間の干渉阻止導体8の各一端を接地導体5に接続してあ
る。上記各導体は、例えばエッチング法によるプリント
配線手法によって誘電体基板3の表面(又は裏面)に設
けてある。9ないし9及び9は結合容量素子を形
成する導体、10ないし10及び10は接続導
体、11は、誘電体基板3の表面に設けた接地導体5と
共に結合線路を形成する導体で、接続導体10と10
間に設けてある。12及び12は結合線路の形成
用導体11における分岐点で、結合線路の形成用導体1
1の一端と分岐点12 間の長さ、分岐点12 と分岐
点12 間の長さ、分岐点12 と結合線路の形成用導
体11の他端間の長さが、それぞれλ /4(λ は、
本案共用器を構成する帯域阻止ろ波器の減衰域における
中心周波数に対応する管内波長で、本案共用器を構成す
る帯域通過ろ波器の通過域における中心周波数に対応す
る管内波長でもある。)となるように形成してある。以
上の各導体もまた例えばエッチング法によるプリント配
線手法によって誘電体基板3の裏面(又は表面)に設け
てある。図5(a)における内部導体4 ないし4
び4 、段間結合阻止導体6及び7、ろ波器間の干渉阻
止導体8の各下端部と誘電体基板3の下縁との間には、
誘電体基板3の地肌が露出している部分があり、内部導
体4 の上端部及び接地導体5の上端縁と誘電体基板3
の上縁との間にも誘電体基板3の地肌が露出している部
分があり、図5(b)における接続導体10 、10
及び10 の各上端部と誘電体基板3の上縁との間にも
誘電体基板3の地肌が露出している部分があるが、後述
するように、本案共用器を組み立てる際に、誘電体基板
3の下縁が共通のシールドケースの下壁1 の内表面に
穿った溝13 に嵌入して、図5(a)における内部導
体4 ないし4 及び4 、段間結合阻止導体6及び
7、ろ波器間の干渉阻止導体8の各下端部が、共通のシ
ールドケースの下壁1 と電気的に接続されると共に、
誘電体基板3の上縁が共通のシールドケースの上壁1
の内表面に穿った溝13 に嵌入して、図5(a)にお
ける内部導体4 の上端部及び接地導体5の上端縁、図
5(b)における接続導体10 、10 及び10
各上端部が、共通のシールドケースの上壁1 と電気的
に接続される
[0006] FIG. 5 (a), the surface view of the dielectric substrate 3, in FIG. 5 (b) back view, 4 1 to 4 6 inner conductor, 5 denotes a ground conductor, 6 and 7 interstage coupling blocking A conductor 8 is an interference prevention conductor between the filters, and one end of each of the interstage coupling prevention conductors 6 and 7 and the interference prevention conductor 8 between the filters is connected to the ground conductor 5. The conductors are provided on the front surface (or the back surface) of the dielectric substrate 3 by a printed wiring method such as an etching method. 9 1 to 9 4 and 9 6 are conductors that form a coupling capacitance element, 10 1 to 10 4 and 10 6 are connection conductors, and 11 forms a coupling line together with the ground conductor 5 provided on the surface of the dielectric substrate 3. Conductors, connecting conductors 10 1 and 10
It is provided between four . Reference numerals 12 2 and 12 3 denote branch points in the conductor 11 for forming a coupled line, which is the conductor 1 for forming a coupled line.
The length between one end of 1 and the branch point 12 2 , the branch point 12 2 and the branch point
The length between the points 12 3, guide for the formation of the branch point 12 3 and the coupling line
The lengths between the other ends of the body 11 are λ g / 4 (λ g is
In the attenuation range of the band-stop filter that constitutes the duplexer
Configure the duplexer of the present invention with the guide wavelength corresponding to the center frequency.
Corresponding to the center frequency in the pass band of the band pass filter
It is also a guide wavelength. ) Is formed . The above conductors are also provided on the back surface (or front surface) of the dielectric substrate 3 by a printed wiring method such as an etching method. FIG inner conductor 4 1 in 5 (a) to 4 4
Beauty 4 6, the interstage coupling prevents conductors 6 and 7, the interference between the wave filter inhibitory
Between each lower end of the stop conductor 8 and the lower edge of the dielectric substrate 3,
There is a part of the dielectric substrate 3 where the background is exposed.
Body 4 upper portion 5 and the upper edge of the ground conductor 5 and the dielectric substrate 3
The part where the background of the dielectric substrate 3 is exposed between the upper edge
5B, the connecting conductors 10 1 , 10 4 in FIG.
And between the upper ends of 10 6 and the upper edge of the dielectric substrate 3.
There is a portion where the background of the dielectric substrate 3 is exposed.
When assembling the proposed duplexer, the dielectric substrate
The lower edge of 3 is the inner surface of the lower wall 16 of the common shield case.
And fitted into the groove 13 6 bored, internal guide in FIGS. 5 (a)
Bodies 4 1 to 4 4 and 4 6 , interstage coupling prevention conductor 6 and
7. Each lower end of the interference prevention conductor 8 between the filters is
With the bottom wall 1 6 electrically connected Rudokesu,
Dielectric wall upper edge on a common shield case of the substrate 3 1 5
5 into the groove 135 formed on the inner surface of the
It takes the upper and the upper edge of the ground conductor 5 of the inner conductor 4 5, FIG.
5 (b) the connection conductors 10 1 in 10 4 and 10 6
Each upper portion is electrically an upper wall 1 5 of the common shield case
Connected to .

【0007】結合容量素子の形成導体9及び接続導体
10を介して結合線路形成用導体11の一端及び端子
に結合される内部導体4、結合容量素子の形成導
体9及び接続導体10を介して結合線路形成用導体
11の分岐点12に結合される内部導体4、結合容
量素子の形成導体9及び接続導体10を介して結合
線路形成用導体11の分岐点12に結合される内部導
体4結合容量素子の形成導体9 及び接続導体10
を介して結合線路形成用導体11の他端及び共通端子
に接続される内部導体4並びに共通のシールドケ
ースによって、減衰域における中心周波数に対応する管
内波長がλである帯域阻止ろ波器が形成される。結合
容量素子の形成導体9及び接続導体10を介して共
通端子2に結合される内部導体4、内部導体4
び結合容量素子の形成導体9及び接続導体10を介
して端子2に結合される内部導体4並びに共通のシ
ールドケースによって、通過域における中心周波数に対
応する管内波長がλである帯域通過ろ波器が形成され
る。図には内部導体4ないし4によってインタディ
ジタル型帯域通過ろ波器を形成した場合を例示してある
が、コムライン型帯域通過ろ波器を形成するように内部
導体4ないし4を配設してもよい。
[0007] inner conductor 4 1 is coupled to one end and the terminal 2 first through a forming conductor 9 1 and the connection conductors 10 1 coupling capacitance element coupling line forming conductor 11, formed conductor 9 2 and the connection of the coupling capacitance element Branching of the coupling line forming conductor 11 via the inner conductor 4 2 coupled to the branch point 12 2 of the coupling line forming conductor 11 via the conductor 10 2 , the coupling capacitance element forming conductor 9 3 and the connecting conductor 10 3. The inner conductor 4 3 coupled to the point 12 3 , the forming conductor 9 4 of the coupling capacitive element and the connecting conductor 10
4 through the other end and the common terminal of the coupling line forming conductor 11
The second inner conductors 4 connected 4 to 4 and a common shield case, the band-stop filtering unit guide wavelength corresponding to the central frequency in the attenuation band is lambda g is formed. Via the inner conductor 4 4 and the inner conductor 4 5 which are coupled to the common terminal 2 4 via the formation conductor 9 4 of the coupling capacitance element and the connection conductor 10 4 and the formation conductor 9 6 of the coupling capacitance element and the connection conductor 10 6. the inner conductor 4 6 and a common shielding case that is coupled to terminal 2 6, the band-pass device guide wavelength corresponding to the center frequency in the pass band is lambda g is formed. Although the drawings are to illustrate the case of forming the interdigital bandpass wave filter by an internal conductor 4 4 to 4 6, to the inner conductor 4 4 not to form a comb-line band-pass wave filter 4 6 May be provided.

【0008】共通のシ−ルドケ−スの端壁13及び14に穿
った溝133 及び134 (図3)、上壁15及び下壁16に穿っ
た溝135 及び136 (図4)に、誘電体基板3の縁部を嵌
入し、共通のシ−ルドケ−スの側壁11及び12、端壁13
び14、上壁15及び下壁16を一体に結合することによっ
て、誘電体基板3が共通のシ−ルドケ−ス内における所
要位置に固定され、誘電体基板3の表面に設けた内部導
体41ないし46の各短絡端及び接地導体5が共通のシ−ル
ドケ−スと電気的に接続されると共に、誘電体基板3の
裏面に設けた接続導体101 、104 及び106 が同軸接栓
21、24及び26の各内部導体に各別に接続される。なお、
必要に応じて、誘電体基板3の縁部に金属薄層を付着さ
せ、誘電体基板3の縁部と共通のシ−ルドケ−スの壁面
に穿った溝133 ないし136 との間を半田付け等の手段に
よって固着することによって、誘電体基板3に設けた内
部導体41ないし46の各短絡端及び接地導体5と共通のシ
−ルドケ−スとの電気的接続を確実にすると共に、誘電
体基板3と共通のシ−ルドケ−スとの機械的結合を強固
にすることができる。
[0008] Common sheet - Rudoke - scan of the end wall 1 3 and 1 4 in the groove 13 3 and 13 4 bored (Fig. 3), the upper wall 1 5 and the lower wall grooves 13 5 bored in 1 6 and 13 6 (Figure 4), fitted the edge of the dielectric substrate 3, common sheet - Rudoke - scan sidewalls of 1 1 and 1 2, end walls 1 3 and 1 4, the top wall 1 5 and the lower wall 1 6 by binding together the dielectric substrate 3 is common sheet - Rudoke - fixed to the desired position in the scan, the inner conductor 4 1 to 4 6 each short end and the grounding conductor of which is provided on the surface of the dielectric substrate 3 5 is common - Rudoke - Graphics and electrically connected with the connection conductors 10 1 provided on the rear surface of the dielectric substrate 3, 10 4 and 10 6 are coaxial connector
2 1, is connected to the 2 4 and the inner conductors of the two 6 to each other. In addition,
If necessary, the thin metal layer deposited on the edge of the dielectric substrate 3, in common with the edge of the dielectric substrate 3 - Rudoke - between to the groove 13 3 no bored to scan the wall surface 13 6 by fixing by means such as soldering, to the inner conductor 4 1 formed in the dielectric substrate 3 and each short end and the ground conductor 5 4 6 common sheet - to ensure electrical connection between the scan - Rudoke At the same time, the mechanical coupling between the dielectric substrate 3 and the common shield case can be strengthened.

【0009】図6は、本案共用器の等価回路図で、T4
共通の入力又は出力端子、T1及びT6は出力又は入力端
子、R1ないしR6は共振回路、CCは結合線路、M45 及びM
56 は磁界結合係数である。このように構成した本案共
用器は、共通端子24に入力した信号のうち、内部導体44
ないし46より成る帯域通過ろ波器における通過域内の周
波数信号は、端子26から出力し、内部導体41ないし44
び導体11と接地導体5より成る結合線路によって形成さ
れる帯域阻止ろ波器において減衰して端子21から出力す
ることはない。共通端子24に入力した信号のうち、内部
導体44ないし46より成る帯域通過ろ波器における減衰域
内の周波数信号は、端子26から出力することなく、端子
21から出力する。内部導体44ないし46より成る帯域通過
ろ波器と、内部導体41ないし44及び導体11と接地導体5
より成る結合線路によって形成される帯域阻止ろ波器と
の間に介在させた干渉阻止導体8によって両ろ波器間の
干渉が阻止され、又、帯域通過ろ波器の通過域に対応す
る周波数信号のうち、帯域阻止ろ波器において反射又は
減衰不十分な成分は段間結合阻止導体6及び7によって
阻止される。なお、段間結合阻止導体6及び7による阻
止効果が不十分なおそれがある場合には、段間結合阻止
導体6及び7の設置位置に対応する共通のシ−ルドケ−
スの内壁面から板状の阻止導体を突設させるか、又は共
通のシ−ルドケ−スの内壁面と誘電体基板3間で内部導
体41と42との間及び内部導体42と43との間に対応する個
所に、内部導体41ないし43と平行に棒状の阻止導体を設
けてもよい。以上は、帯域阻止ろ波器を4段の内部導体
で構成すると共に、帯域通過ろ波器を3段の内部導体で
構成した場合を例示したが、各段数を適宜増減して本考
案を実施することができる。
FIG. 6 is an equivalent circuit diagram of the duplexer of the present invention, in which T 4 is a common input or output terminal, T 1 and T 6 are output or input terminals, R 1 to R 6 are resonant circuits, and CC is a coupled line. , M 45 and M
56 is a magnetic field coupling coefficient. Thus constituted merits duplexer, of the input signal to the common terminal 2 4, inner conductors 4 4
The frequency signal in the pass band of the band pass filter consisting of 4 to 4 6 is output from the terminal 26, and the band stop filter formed by the inner conductors 4 1 to 4 4 and the coupled line consisting of the conductor 11 and the ground conductor 5. not be output from the terminal 2 1 attenuated in duplexer. Common terminal 2 4 of the input signal into a frequency signal attenuation region in the inner conductor 4 4 to the band-pass unit consisting of 4-6, without outputting from the terminal 2 6, terminal
2 Output from 1 . Bandpass filter consisting of inner conductors 4 4 to 4 6 , inner conductors 4 1 to 4 4 and conductor 11 and ground conductor 5
The interference prevention conductor 8 interposed between the filter and the band stop filter formed by the coupling line prevents the interference between the two filters, and the frequency corresponding to the pass band of the band pass filter. The components of the signal that are reflected or under-attenuated in the band stop filter are blocked by the interstage coupling stop conductors 6 and 7. When the blocking effect of the interstage coupling prevention conductors 6 and 7 may be insufficient, a common shield cable corresponding to the installation position of the interstage coupling prevention conductors 6 and 7 may be provided.
Either by projecting blocking conductor from the inner wall surface plate of the scan, or common sheet - Rudoke - between scan the inner wall surface of the dielectric substrate 3 in the inner conductor 4 1 and 4 2 and between the inner conductor 4 2 with at a location corresponding to between 4 3, it may be provided blocking conductor parallel to the rod-like inner conductor 4 1 to 4 3. In the above, the case where the band-stop filter is composed of four-stage inner conductors and the band-pass filter is composed of three-stage inner conductors has been exemplified, but the present invention is implemented by appropriately increasing or decreasing the number of stages. can do.

【0010】[0010]

【考案の効果】本案共用器は、帯域阻止ろ波器及び帯域
通過ろ波器を構成する各素子を、誘電体基板の表裏面に
付着させた金属薄層で形成してあるため、帯域阻止ろ波
器を構成する結合線路を、従来のように共通のシ−ルド
ケ−スの外部に設けることなく、共通のシ−ルドケ−ス
内に設けることとなり、したがって、全体の構成が簡潔
小型となり、又、各素子を形成する導体の寸法及び配設
関係を所要値に正確に一致させることが容易で、更に、
共通のシ−ルドケ−スの内壁に穿った溝に誘電体基板の
縁部を嵌入するように形成してあるから組立が容易で、
共通のシ−ルドケ−スと誘電体基板の機械的結合を強固
にすることが可能であると共に、誘電体基板の表裏面に
設けた構成素子と共通のシ−ルドケ−ス及び入出力端子
との電気的接続を確実にすることができ、量産にも好適
である。
EFFECTS OF THE INVENTION In the duplexer of the present invention, each element constituting the band stop filter and the band pass filter is formed by a thin metal layer adhered to the front and back surfaces of the dielectric substrate. The coupling line forming the filter is provided inside the common shield case without being provided outside the common shield case as in the conventional case, and therefore the overall configuration is simple and compact. Moreover, it is easy to exactly match the dimensions and arrangement relationship of the conductors forming each element with required values, and further,
It is easy to assemble because it is formed so that the edge of the dielectric substrate fits into the groove formed in the inner wall of the common shield case.
It is possible to strengthen the mechanical coupling between the common shield case and the dielectric substrate, and the common shield case and input / output terminals with the constituent elements provided on the front and back surfaces of the dielectric substrate. The electrical connection can be ensured, which is suitable for mass production.

【図面の簡単な説明】[Brief description of drawings]

【図1】本考案の一実施例を示す正面図である。FIG. 1 is a front view showing an embodiment of the present invention.

【図2】本考案の一実施例を示す側面図である。FIG. 2 is a side view showing an embodiment of the present invention.

【図3】本考案の一実施例を示す断面図である。FIG. 3 is a sectional view showing an embodiment of the present invention.

【図4】本考案の一実施例を示す断面図である。FIG. 4 is a sectional view showing an embodiment of the present invention.

【図5】本考案の一実施例の要部を示す図で、図5
(a)は表面図、図5(b)は裏面図である。
FIG. 5 is a view showing the main part of an embodiment of the present invention.
5A is a front view and FIG. 5B is a back view.

【図6】本案共用器の等価回路図である。FIG. 6 is an equivalent circuit diagram of the duplexer of the present invention.

【図7】従来の共用器を示す断面図である。FIG. 7 is a cross-sectional view showing a conventional duplexer.

【符号の説明】[Explanation of symbols]

11 共通のシ−ルドケ−スの側壁 12 共通のシ−ルドケ−スの側壁 13 共通のシ−ルドケ−スの端壁 14 共通のシ−ルドケ−スの端壁 15 共通のシ−ルドケ−スの上壁 16 共通のシ−ルドケ−スの下壁 21 出力又は入力端子 24 共通の入力又は出力端子 26 出力又は入力端子 3 誘電体基板 41 内部導体 42 内部導体 43 内部導体 44 内部導体 45 内部導体 46 内部導体 5 接地導体 6 段間結合阻止導体 7 段間結合阻止導体 8 ろ波器間の干渉阻止導体 91 結合容量素子の形成導体 92 結合容量素子の形成導体 93 結合容量素子の形成導体 94 結合容量素子の形成導体 96 結合容量素子の形成導体 101 接続導体 102 接続導体 103 接続導体 104 接続導体 106 接続導体 11 結合線路の形成導体 122 分岐点 123 分岐点 133 溝 134 溝 135 溝 136 溝 14 共通のシ−ルドケ−ス 151 内部導体 152 内部導体 153 内部導体 154 内部導体 155 内部導体 156 内部導体 161 出力又は入力端子 164 共通の入力又は出力端子 166 出力又は入力端子 17 結合線路 182 分岐点 183 分岐点 191 結合容量素子 192 結合容量素子 193 結合容量素子 194 結合容量素子 196 結合容量素子1 1 Side wall of common shield case 1 2 Side wall of common shield case 1 3 End wall of common shield case 1 4 End wall of common shield case 1 5 Common Upper wall of shield case 1 6 Lower wall of common shield case 2 1 Output or input terminal 2 4 Common input or output terminal 2 6 Output or input terminal 3 Dielectric substrate 4 1 Inner conductor 4 2 Inner conductor 4 3 Inner conductor 4 4 Inner conductor 4 5 Inner conductor 4 6 Inner conductor 5 Ground conductor 6 Interstage coupling prevention conductor 7 Interstage coupling inhibition conductor 8 Interference interference prevention conductor 9 1 Coupling element forming conductor 9 2 Forming conductor of coupling capacitance element 9 3 Forming conductor of coupling capacitance element 9 4 Forming conductor of coupling capacitance element 9 6 Forming conductor of coupling capacitance element 10 1 Connection conductor 10 2 Connection conductor 10 3 Connection conductor 10 4 Connection conductor 10 6 connection conductors 11 coupled line forming conductor 12 2 branch point 12 3 branch point 13 third groove 13 4 grooves 13 5 grooves 13 6 grooves 14 common sheet - Rudoke - scan 15 1 inner conductor 15 2 Conductor 15 third inner conductor 15 4 inner conductor 15 5 inner conductor 15 6 internal conductor 16 and one output or input terminal 16 4 common input or output terminal 16 6 output or input terminal 17 coupling line 18 2 branch points 18 3 branch point 19 1 Coupling capacitance element 19 2 Coupling capacitance element 19 3 Coupling capacitance element 19 4 Coupling capacitance element 19 6 Coupling capacitance element

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 【請求項1】帯域阻止ろ波器の形成用導体と、通過域の
中心周波数が前記帯域阻止ろ波器における減衰域の中心
周波数に一致する帯域通過ろ波器の形成用導体とを設け
た誘電体基板と、 内表面に穿った溝に前記誘電体基板の周縁を嵌入させ
て、前記誘電体基板を内装支持する共通のシールドケー
スとを備えると共に、 前記誘電体基板に設けられる帯域阻止ろ波器の形成用導
体が、 前記誘電体基板の表面に設けられ、各下端部が前記共通
のシールドケースに接地される複数個の内部導体形成用
導体と、 前記誘電体基板の表面のうち、前記各下端部が接地され
る複数個の内部導体形成用導体の各上端部と適宜間隔を
隔てる箇所に設けられ、上端縁が前記共通のシールドケ
ースに接地される結合線路形成用接地導体と、 前記誘電体基板の裏面のうち、前記誘電体基板の表面に
設けられた前記結合線路形成用接地導体に対応する箇所
に設けられ、全長が、帯域阻止ろ波器の減衰域における
中心周波数に対応する管内波長の1/4の整数倍で、一
端を始端として、前記管内波長の1/4間隔毎に分岐点
を有する結合線路形成用導体と、 前記各下端部が接地される複数個の内部導体形成用導体
のうち、初段又は終段の内部導体形成用導体の上端部
と、前記誘電体基板を介して対向する結合容量素子形成
用導体及びこの結合容量素子形成用導体を前記結合線路
形成用導体の一端及び共通の入力又は出力端子に接続す
る導体と、 前記各下端部が接地される複数個の内部導体形成用導体
のうち、終段又は初段の内部導体形成用導体の上端部と
前記誘電体基板を介して対向する結合容量素子形成用導
体及びこの結合容量素子形成用導体を前記結合線路形成
用導体の他端及び出力又は入力端子に接続する導体と、 前記各下端部が接地される複数個の内部導体形成用導体
のうち、中間段の内部導体形成用導体の上端部と前記誘
電体基板を介して対向する結合容量素子形成用導体及び
この結合容量素子形成用導体を前記結合線路形成用導体
の前記分岐点に接続する導体とより成り、 前記誘電体基板に設けられる帯域通過ろ波器の形成用導
体が、 前記誘電体基板面に設けられ、各一端部が前記共通のシ
ールドケースに接地される複数個の内部導体形成用導体
と、 前記各一端部が接地される複数個の内部導体形成用導体
のうち、終段又は初段の内部導体形成用導体の非接地端
部と対向する結合容量素子形成用導体及びこの結合容量
素子形成用導体を出力又は入力端子に接続する導体とよ
り成る ことを特徴とする共用器。
1. A conductor for forming a band stop filter and a pass band
The center frequency is the center of the attenuation band in the band stop filter.
And a conductor for forming a bandpass filter matching the frequency
The dielectric substrate and the groove formed in the inner surface by fitting the peripheral edge of the dielectric substrate.
A common shield case that internally supports the dielectric substrate.
And a conductor for forming a band stop filter provided on the dielectric substrate.
A body is provided on the surface of the dielectric substrate, and each lower end is the common
For forming multiple internal conductors that are grounded to the shield case of
Of the conductor and the surface of the dielectric substrate, each of the lower ends is grounded.
The upper end of each of the multiple inner conductor forming conductors
It is installed in the place where it is separated, and the upper edge is the common shield case.
A grounding conductor for forming a coupled line that is grounded to the ground, and a backside of the dielectric substrate on the front surface of the dielectric substrate.
Location corresponding to the provided ground conductor for forming the coupled line
Is provided in the attenuation band of the band-stop filter.
It is an integer multiple of 1/4 of the guide wavelength corresponding to the center frequency,
Starting from the end, branch points at intervals of ¼ of the guide wavelength
For forming a coupled line, and a plurality of conductors for forming an internal conductor whose lower ends are grounded
Of the inner conductor forming conductor in the first or last stage
And forming a capacitive coupling element facing each other through the dielectric substrate
And a conductor for forming the coupling capacitance element,
Connect to one end of forming conductor and common input or output terminal
Conductors and a plurality of inner conductor forming conductors whose lower ends are grounded
The upper end of the inner or inner conductor forming conductor
Conductors for forming a coupling capacitance element facing each other through the dielectric substrate
The body and the conductor for forming the coupling capacitance element to form the coupling line
A conductor connected to the other end of the conductor for output and an output or input terminal, and a plurality of conductors for forming internal conductors whose lower ends are grounded
Of the inner conductor forming conductor in the middle stage
A conductor for forming a coupling capacitance element facing each other through an electric substrate, and
The conductor for forming the coupling capacitance element is the conductor for forming the coupling line.
Of a conductor connected to the branch point of, and a conductor for forming a bandpass filter provided on the dielectric substrate.
A body is provided on the surface of the dielectric substrate, and one end of each body is connected to the common shield.
A plurality of internal conductor forming conductors grounded to the shield case
And a plurality of internal conductor forming conductors each of which is grounded
Of the above, the non-grounded end of the conductor for forming the final or first stage internal conductor
For forming a coupling capacitance element facing the section and this coupling capacitance
A conductor that connects the element forming conductor to the output or input terminal
Duplexer characterized by comprising Ri.
JP3168392U 1992-04-14 1992-04-14 Shared device Expired - Fee Related JPH0746961Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3168392U JPH0746961Y2 (en) 1992-04-14 1992-04-14 Shared device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3168392U JPH0746961Y2 (en) 1992-04-14 1992-04-14 Shared device

Publications (2)

Publication Number Publication Date
JPH0585105U JPH0585105U (en) 1993-11-16
JPH0746961Y2 true JPH0746961Y2 (en) 1995-10-25

Family

ID=12337896

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3168392U Expired - Fee Related JPH0746961Y2 (en) 1992-04-14 1992-04-14 Shared device

Country Status (1)

Country Link
JP (1) JPH0746961Y2 (en)

Also Published As

Publication number Publication date
JPH0585105U (en) 1993-11-16

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