JPH0740049B2 - Current error detection circuit - Google Patents
Current error detection circuitInfo
- Publication number
- JPH0740049B2 JPH0740049B2 JP61009225A JP922586A JPH0740049B2 JP H0740049 B2 JPH0740049 B2 JP H0740049B2 JP 61009225 A JP61009225 A JP 61009225A JP 922586 A JP922586 A JP 922586A JP H0740049 B2 JPH0740049 B2 JP H0740049B2
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- current
- variable resistor
- output
- error detection
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Landscapes
- Measurement Of Current Or Voltage (AREA)
Description
【発明の詳細な説明】 産業上の利用分野 本発明は一般家庭において使用する加熱調理器の入力電
流制御回路などに使用する電流誤差検出回路に関するも
のである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a current error detection circuit used for an input current control circuit of a heating cooker used in general households.
従来の技術 従来この種の電流誤差検出回路は、第３図に示すよう
に、電流設定を行う可変抵抗１に、抵抗４と抵抗５を直
列に接続し、抵抗4,可変抵抗1,抵抗５の直列回路に直列
電源７を接続し、目的の電流Ｉを検知する電流トランス
２と、電流トランス２の出力を整流するたとえばダイオ
ードなどの整流素子４本で構成した全波整流回路３と、
電流トランス２の出力に接続した抵抗６とリップル除去
用のコンデンサ８を有し、整流回路３のマイナス出力端
子を抵抗５と可変抵抗１の接続点に接続し、整流回路３
のプラス出力端子と、可変抵抗１の中点の電位差v0を誤
差出力とするものが一般的であった。2. Description of the Related Art Conventionally, in this type of current error detection circuit, as shown in FIG. 3, a resistor 4 and a resistor 5 are connected in series to a variable resistor 1 for setting a current, and a resistor 4, a variable resistor 1, and a resistor 5 are connected. A series power source 7 is connected to the series circuit of the current transformer 2 to detect a target current I, and a full-wave rectifying circuit 3 configured by four rectifying elements such as diodes for rectifying the output of the current transformer 2,
It has a resistor 6 connected to the output of the current transformer 2 and a capacitor 8 for removing ripples, and the minus output terminal of the rectifier circuit 3 is connected to the connection point of the resistor 5 and the variable resistor 1.
In general, the error output is the potential difference v 0 between the positive output terminal and the middle point of the variable resistor 1.
発明が解決しようとする問題点 このような従来の構成では、整流回路３を構成する整流
素子の順方向の電圧降下があるためにv0に誤差を生じ、
v0が常に零になるように電流Ｉを制御する閉ループ回路
を構成した場合には、可変抵抗１の中点の位置と電流Ｉ
の関係は第４図に示すようになり、電流設定を最も絞っ
た時、すなわち可変抵抗１の中点を最も下にした時でも
Ｉ＝０にすることができないため、低電流の範囲では電
流設定ができないという問題点があった。Problems to be Solved by the Invention In such a conventional configuration, there is an error in v 0 due to the forward voltage drop of the rectifying element forming the rectifying circuit 3,
When a closed loop circuit that controls the current I is configured so that v 0 is always zero, the position of the midpoint of the variable resistor 1 and the current I
The relationship is as shown in FIG. 4, and I = 0 cannot be set even when the current setting is most narrowed, that is, when the midpoint of the variable resistor 1 is set to the lowest. There was a problem that it could not be set.
本発明は前記問題点に鑑み整流回路を構成する整流素子
の順方向の電圧降下による誤差をなくし、誤差出力が常
に零になるように目的の電流を制御する閉ループ回路を
構成した場合、低電流の範囲まで電流設定を可能とする
電流誤差検出回路を提供するものである。In view of the above problems, the present invention eliminates an error due to a forward voltage drop of a rectifying element forming a rectifying circuit, and configures a closed loop circuit that controls a target current so that an error output is always zero, and a low current The present invention provides a current error detection circuit that enables current setting up to the range.
問題点を解決するための手段 この目的を達成するために本発明の電流誤差検出回路
は、可変抵抗と、前記可変抵抗の両端に前記可変抵抗に
対して並列に接続した分圧回路と、電流を検知する電流
トランスと、前記電流トランスの出力を整流する整流回
路を有し、前記整流回路の出力端子の一方を前記分圧回
路の出力端子に接続し、前記整流回路の他の出力端子と
前記可変抵抗の中点の電位差を誤差出力とするものであ
る。Means for Solving the Problems In order to achieve this object, a current error detection circuit of the present invention comprises a variable resistor, a voltage dividing circuit connected in parallel to the variable resistor at both ends of the variable resistor, and a current divider. And a rectifying circuit for rectifying the output of the current transformer, one of the output terminals of the rectifying circuit is connected to the output terminal of the voltage dividing circuit, and the other output terminal of the rectifying circuit. The potential difference at the midpoint of the variable resistor is used as an error output.
作用 この構成により本発明の電流誤差検出回路は、分圧回路
の出力分が整流素子の順方向の電圧降下を打ち消すた
め、誤差出力が常に零になるように目的の電流を制御す
る閉ループ回路を構成した場合でも低電流の範囲まで電
流設定を行うことができる。Action With this configuration, the current error detection circuit of the present invention cancels the forward voltage drop of the rectifying element by the output of the voltage dividing circuit, so that a closed loop circuit that controls the target current so that the error output is always zero is provided. Even when configured, the current can be set up to a low current range.
実施例 以下本発明の一実施例について図面を参照しながら説明
する。第１図は本発明の一実施例における電流誤差検出
回路の回路図である。第１図において、11は可変抵抗、
12は可変抵抗11の両端に接続した分圧回路で、抵抗15と
抵抗16で構成されている。13は目的の電流Ｉを検知する
電流トランス、14は電流トランス13の出力を整流する整
流回路、17と18はそれぞれ可変抵抗11の両端から直列に
接続した抵抗、19は電流トランス13の出力に接続した抵
抗、20は分圧回路12と可変抵抗11の並列回路と抵抗17と
抵抗18の直列回路に電圧を印加する直流電源、21はリッ
プル除去用のコンデンサである。Embodiment One embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a circuit diagram of a current error detection circuit according to an embodiment of the present invention. In FIG. 1, 11 is a variable resistor,
A voltage dividing circuit 12 is connected to both ends of the variable resistor 11, and is composed of a resistor 15 and a resistor 16. 13 is a current transformer that detects the target current I, 14 is a rectifier circuit that rectifies the output of the current transformer 13, 17 and 18 are resistors connected in series from both ends of the variable resistor 11, and 19 is an output of the current transformer 13. A connected resistor, 20 is a DC power source for applying a voltage to the parallel circuit of the voltage dividing circuit 12 and the variable resistor 11 and the series circuit of the resistor 17 and the resistor 18, and 21 is a capacitor for ripple removal.
以上の構成において、整流回路14の一方の出力端子（マ
イナス端子）は分圧回路12の出力端に接続している。こ
れにより、整流回路14のマイナス端子の電位は、抵抗18
と可変抵抗11の接続点よりも分圧回路12の出力分だけ高
くなるため、整流回路14を構成する整流素子の順方向の
電圧降下を打ち消すことができる。このため、v0が常に
零になるように電流Ｉを制御する閉ループ回路を構成し
た場合には、可変抵抗11の中点の位置と電流Ｉの関係は
第２図に示すようになり、電流設定を最も絞った時、す
なわち可変抵抗11の中点を最も下にした時にはＩ＝０に
することができる。従って低電流の範囲まで電流設定が
可能である。もちろん分圧回路12の分圧比を加減するこ
とにより、可変抵抗11の中点を最も下にした時のＩの値
も変えることができる。In the above configuration, one output terminal (minus terminal) of the rectifier circuit 14 is connected to the output terminal of the voltage dividing circuit 12. As a result, the potential of the negative terminal of the rectifier circuit 14 becomes
Since it is higher than the connection point of the variable resistor 11 by the output of the voltage dividing circuit 12, the forward voltage drop of the rectifying element forming the rectifying circuit 14 can be canceled. Therefore, when a closed loop circuit that controls the current I is configured so that v 0 is always zero, the relationship between the position of the midpoint of the variable resistor 11 and the current I is as shown in FIG. When the setting is most narrowed, that is, when the midpoint of the variable resistor 11 is set to the lowest, I = 0 can be set. Therefore, the current can be set up to a low current range. Of course, by adjusting the voltage dividing ratio of the voltage dividing circuit 12, the value of I when the midpoint of the variable resistor 11 is at the lowest position can be changed.
なお本実施例では分圧回路12を抵抗15と抵抗16の直列回
路で構成したが、たとえば抵抗16のかわりに１個の整流
素子あるいは複数の整流素子を直列に接続したものを用
いたものでもよい。その場合は前記整流素子の順方向の
電圧降下により整流回路14を構成する整流素子の順方向
の電圧降下を打ち消すことができ、また整流回路14を構
成する整流素子の順方向の電圧降下の温度特性を打ち消
すこともできるという効果がある。In this embodiment, the voltage dividing circuit 12 is composed of a resistor 15 and a resistor 16 in series. However, instead of the resistor 16, one rectifying element or a plurality of rectifying elements connected in series may be used. Good. In that case, the forward voltage drop of the rectifying element constituting the rectifier circuit 14 can be canceled by the forward voltage drop of the rectifying element, and the temperature of the forward voltage drop of the rectifying element constituting the rectifier circuit 14 can be canceled. There is an effect that the characteristics can be canceled.
また本実施例では電流トランス13は単相で出力が二端子
のものを用い、整流回路14は全波整流回路を用いたが、
電流トランスは三相のものを使ってもよく、また出力が
中性点つきのものであってもよく、整流回路も半波整流
や倍電圧整流回路を用いてもよくまたその組み合わせも
自由である。In the present embodiment, the current transformer 13 is a single-phase one having two terminals and the rectifier circuit 14 is a full-wave rectifier circuit.
The current transformer may be a three-phase one, the output may be one with a neutral point, the rectifier circuit may be a half-wave rectifier or a voltage doubler rectifier circuit, and the combination thereof is free. .
発明の効果 以上の実施例からも明らかなように本発明の電流誤差検
出回路は、特に可変抵抗と、前記可変抵抗の両端に前記
可変抵抗に対して並列に接続した分圧回路と、電流を検
知する電流トランスと、前記電流トランスの出力を整流
する整流回路を有し、前記整流回路の出力端子の一方を
前記分圧回路の出力端子に接続し、前記整流回路の他の
出力端子と前記可変抵抗の中点の電位差を誤差出力とす
ることによって、整流回路を構成する整流素子の順方向
の電圧降下による誤差をなくし、誤差出力が常に零にな
るように目的の電流を制御する閉ループ回路を構成した
場合、低電流の範囲まで電流設定を可能とする電流誤差
検出回路を提供することができ、従来の問題を解消して
いるものである。EFFECTS OF THE INVENTION As is apparent from the above embodiments, the current error detection circuit of the present invention, in particular, includes a variable resistor, a voltage dividing circuit connected in parallel to the variable resistor at both ends of the variable resistor, and a current A current transformer for detecting, and a rectifier circuit for rectifying the output of the current transformer, one of the output terminals of the rectifier circuit is connected to the output terminal of the voltage dividing circuit, and the other output terminal of the rectifier circuit and the A closed-loop circuit that controls the target current so that the error output is always zero by eliminating the error due to the forward voltage drop of the rectifying element that constitutes the rectifier circuit, by using the potential difference at the midpoint of the variable resistance as the error output. In the case of (1), it is possible to provide a current error detection circuit capable of setting a current in a low current range, thereby solving the conventional problem.
第１図は本発明の一実施例における電流誤差検出回路の
回路図、第２図は第１図に示した本発明の一実施例にお
ける電流誤差検出回路の誤差出力が常に零になるように
目的の電流を制御する閉ループ回路を構成した場合の可
変抵抗の中点の位置と電流の特性図、第３図は従来の技
術における電流誤差検出回路の回路図、第４図は第３図
に示した従来の技術における電流誤差検出回路の誤差出
力が常に零になるように目的の電流を制御する閉ループ
回路を構成した場合の可変抵抗の中点の位置と電流の特
性図である。 11……可変抵抗、12……分圧回路、13……電流トラン
ス、14……整流回路。FIG. 1 is a circuit diagram of a current error detection circuit according to an embodiment of the present invention, and FIG. 2 is a circuit diagram of the current error detection circuit according to the embodiment of the present invention shown in FIG. FIG. 3 is a circuit diagram of a current error detection circuit in the prior art, and FIG. 3 is a circuit diagram of a current error detection circuit in the prior art when a closed loop circuit for controlling a target current is configured. FIG. 9 is a characteristic diagram of a position of a middle point of a variable resistance and a current when a closed loop circuit that controls a target current is configured so that an error output of a current error detection circuit in the related art shown is always zero. 11 …… Variable resistance, 12 …… Voltage divider circuit, 13 …… Current transformer, 14 …… Rectifier circuit.
Claims (1)
変抵抗に対して並列に接続した分圧回路と、電流を検知
する電流トランスと、前記電流トランスの出力を整流す
る整流回路を有し、前記整流回路の出力端子の一方を前
記分圧回路の出力端子に接続し、前記整流回路の他の出
力端子と前記可変抵抗の中点の電位差を誤差出力とする
電流誤差検出回路。1. A variable resistor, a voltage dividing circuit connected to both ends of the variable resistor in parallel with the variable resistor, a current transformer for detecting a current, and a rectifying circuit for rectifying an output of the current transformer. And a current error detection circuit in which one of the output terminals of the rectifier circuit is connected to the output terminal of the voltage divider circuit and the potential difference between the other output terminal of the rectifier circuit and the midpoint of the variable resistor is used as an error output.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61009225A JPH0740049B2 (en) | 1986-01-20 | 1986-01-20 | Current error detection circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61009225A JPH0740049B2 (en) | 1986-01-20 | 1986-01-20 | Current error detection circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS62254075A JPS62254075A (en) | 1987-11-05 |
| JPH0740049B2 true JPH0740049B2 (en) | 1995-05-01 |
Family
ID=11714475
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP61009225A Expired - Lifetime JPH0740049B2 (en) | 1986-01-20 | 1986-01-20 | Current error detection circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0740049B2 (en) |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS49143716U (en) * | 1973-04-12 | 1974-12-11 | ||
| JPS5868888A (en) * | 1981-10-19 | 1983-04-23 | 三洋電機株式会社 | Multiport induction heating cooking device |
| JPS58131684A (en) * | 1983-01-14 | 1983-08-05 | 三洋電機株式会社 | Induction heating cooking device |
-
1986
- 1986-01-20 JP JP61009225A patent/JPH0740049B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPS62254075A (en) | 1987-11-05 |
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