JPH0738792A - Electronic still camera - Google Patents

Abstract

PURPOSE:To attain quick photographing preparation by an inexpensive constitution by operating an image pickup element at a high speed at the time of photographing preparation, and operating the image pickup element at a low speed at the time of photographing. CONSTITUTION:A solid-state image pickup element (CCD) 1 outputs a picture signal synchronized with a reading clock generated by a synchronization generating circuit 8. The outputted picture signal is amplified by an amplifier 2, converted into a digital signal by an A/D converter 3, and inputted to a process part 4. The process part 4 operates a signal processing, and outputted picture data are stored in a memory 5 by a system controller 9 which operates general control. Then, at the time of processing the picture signal for recording or the like at the time of photographing, the picture signal is read from the CCD 1 at a reading speed lower than a normal television signal speed, and at the time of obtaining data for picture quality control at the time of photographing preparation, the picture signal is read at a reading speed higher than the reading speed at the time of photographing.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electronic still camera which obtains image information by an image pickup means such as a solid-state image pickup device and records it in a storage medium such as a semiconductor memory.

[0002]

2. Description of the Related Art Generally, a solid-state image pickup device mounted on a camera tends to have a higher resolution, and the number of pixels is increasing. Therefore, the driving speed of the image pickup device must be increased. For example, there is an image pickup device in which one screen has 400,000 pixels, and when an image pickup signal is read out from such a high resolution image pickup device at a normal television signal speed,
The driving speed is as high as 14.3 MHz (4 fsc).

Therefore, it has been proposed to reduce the driving speed of the solid-state image pickup device (Japanese Patent Laid-Open No. 58-1537).
No. 3).

[0004]

Generally, a semiconductor memory such as SRAM is suitable as a memory of a digital electronic still camera. However, a semiconductor memory that can be accessed at a speed suitable for reading at a television signal speed from an imaging device having 400,000 pixels has a complicated structure, consumes a large amount of power, and is therefore expensive. If the analog-digital converter is also composed of such elements suitable for high-speed operation, the same problem will occur.

Therefore, the conventional digital electronic still camera is not necessarily suitable for high resolution because of its complicated structure, increased power consumption, and high price. In addition, the trend toward higher resolution in imaging devices will continue to accelerate, and such problems will become more prominent.

In order to solve this problem, Japanese Patent Laid-Open No. 58-58
As described in 15373, it is possible to slow down the reading speed of the video signal from the imaging device.

However, at such a low reading speed, it takes a relatively long time to obtain image quality control data such as autofocus, IRIS control and white balance control, and it takes time to prepare for photographing. Therefore, in order to obtain the image quality control data as described above,
Special measures such as using a sensor outside will be required.

[0008]

An electronic still camera according to the present invention includes a solid-state image pickup device, an amplifier for amplifying an output signal of the solid-state image pickup device, and a signal for amplifying the signal amplified by the amplifier into digital data. A / D converter and the A / D converter
A process unit that processes the digital data converted by the converter, a memory that stores the digital data that has been processed by the process unit, a memory control unit that controls the address of the memory, and the like. In an electronic still camera composed of a D / A converter for converting digital data into an analog signal, at the time of image pickup, the signal reading speed from the solid-state image pickup device is set lower than the television signal speed of NTSC, auto focus,
When data for image quality control such as IRIS control and white balance control is obtained, the speed is higher than the reading speed from the image pickup device.

[0009]

According to the present invention, when an image pickup signal is processed for recording or the like, it is read out from the image pickup device at a read speed lower than a normal television signal speed, and when image quality control data is obtained, the read speed at the time of image pickup is obtained. By reading out at a higher reading speed, it is possible to quickly prepare for shooting with an inexpensive configuration.

[0010]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 shows an example of the configuration of a digital electronic still camera which is an embodiment of the present invention. In the figure, a CCD type solid-state image pickup device (CCD) 1 as an electronic image pickup means
Outputs a signal (image signal) corresponding to an optical image incident through an optical system (not shown) in synchronization with a read clock generated by the synchronization generating circuit 8.

The image signal output from the CCD 1 is amplified by the amplifier 2, then digitized by the A / D converter 3 to be converted into image data, which is input to the process unit 4. The process unit 4 performs well-known signal processing such as color separation and gamma correction, and performs signal processing of input image data. Then, the image data output from the process unit 4 is stored in the memory 5 by the system controller 9 that integrally controls photographing by the digital electronic still camera, transfer of various data, and other processing. The system controller 9 is composed of a CPU, a ROM storing its execution program, a RAM for storing necessary data, and the like.

By the way, the system controller 9 has a microcomputer as a main control circuit, and controls writing and reading of data to and from the memory 5 in addition to control means for performing well-known general control in an electronic still camera. And a control means for controlling the iris via the iris driving means 12 by monitoring the state of the image signal detected by the detection circuit 11.

Here, the detection circuit 11 is, for example, C
An integrating circuit for detecting the exposure amount of CD1,
It may be a high-pass filter for detecting the degree of focusing.

The operation display unit 10 is an input unit for an operator of the electronic still camera to input an instruction to the system controller 9.

Next, the operation of the electronic still camera configured as described above will be described with reference to the flowchart of FIG. First, in the standby state as shown in FIG. 2, the system controller 9 monitors the generation of a shooting preparation instruction in step a, monitors the generation of a shooting instruction in step b,
In step c, the generation instruction of the reproduction instruction is repeatedly monitored.

In this standby state, when a shooting preparation instruction such as half-pressing of the release button is issued, the system controller 9 executes the processing from step a to step d.
In step d, the system controller 9 outputs a signal for controlling the driving speed of the CCD 1 to the synchronization generating circuit 8. In response to this signal, the synchronization generation circuit 8 generates a driving pulse for the CCD 1 at a speed higher than the driving speed at the time of photographing for preparation for photographing.

CCD driven by this drive pulse
The signal output from 1 is detected by the detection circuit 11 and input to the I / O port of the system controller 9.

As described above, the detection circuit is a CCD.
An integration circuit for detecting the exposure amount of 1 and a high-pass filter for detecting the degree of focusing.

The system controller 9 detects the exposure amount of the CCD 1 based on the signal input to the system controller 9 from the integrating circuit for detecting the light amount, and drives the iris motor to open the iris if the exposure amount is under. To give feedback. Alternatively, if the exposure amount seems to be over, feedback is applied to drive the IRIS motor in the direction of closing the IRIS.

The signal that has passed through the high-pass filter for detecting the degree of focusing is the system controller 9
In order to judge whether the lens is in focus or out of focus, the focus signal is monitored while moving the lens minutely and the lens is moved in the focus direction. Focus detection in this case uses a conventional method. That is, the fact that the in-focus image signal contains more high-frequency components than that in the out-of-focus state is used.

As described above, when the iris is controlled to the proper value and the lens is controlled to the in-focus state, the system controller 9 returns to the standby state.

Next, when a photographing instruction such as pressing the release button is issued, the system controller 9 shifts the processing from step b to step e, and the system controller 9 controls the synchronization generating circuit 8 to control the driving speed of the CCD 1. The signal of is output. The driving speed at this time is step d.
Is slower than that of the process unit 4 and the memory 5 and is slower than or equal to the operating speed of the process unit 4 and the memory 5. The signal output from the CCD 1 is the amplifier 2
After being amplified by the A / D converter 3, it is converted into digital data by the A / D converter 3 and well-known signal processing such as color separation and gamma correction is performed in the process unit 4. Further, the processed image data is controlled by the system controller 9. Is recorded in the memory 5. After recording the image data for one screen in the memory 5, the system controller 9 returns to the standby state.

On the other hand, in the standby state, when a reproduction instruction is given by pressing a reproduction instruction key provided on the operation display section 10 which is an input section, for example, the system controller 9
Moves the process from step c to step f, and step f
The image data recorded in the memory 5 is read out, and D
Output to the / A converter 6. The D / A converter 6 receives the clock of the standard television signal speed from the sync generation circuit 8 and converts the image data into an analog signal and outputs it to a video signal driver (not shown).
Output the TSC signal. The operation between the memory 5 and the D / A converter 6 is continued until there is a reproduction stop instruction. afterwards,
The system controller 9 returns to the standby state.

The present invention is not limited to the above embodiment, and for example, in the above embodiment, the detection circuit 11 is used.
May be a white balance detection circuit. Further, the shutter speed of the image sensor may be changed to adjust the exposure amount.

Besides, various modifications can be made without departing from the scope of the present invention.

[0026]

As described above, according to the digital electronic still camera of the present invention, the image pickup device is operated at a high speed at the time of preparation for shooting, and the image pickup device is operated at a low speed at the time of shooting, so that the camera process unit and the recording unit Since the operating speed of the medium can be given a margin, an inexpensive digital electronic still camera with a simple configuration is realized, and the added value of the digital electronic still camera is improved.

[Brief description of drawings]

FIG. 1 is a block diagram showing the configuration of an electronic still camera that is an embodiment of the present invention.

FIG. 2 is a flowchart showing a control procedure by the system controller 9 in FIG. 1 in the embodiment of the present invention.

[Explanation of symbols]

 1 CCD type solid-state image sensor (CCD) 2 Amplifier 3 A / D converter 4 Process part 5 Memory 6 D / A converter 8 Synchronization generation circuit 9 System controller 10 Operation display part 11 Detection circuit 12 IRIS drive circuit

Claims (1)

[Claims] 1. A solid-state imaging device, an amplifier for amplifying an output signal of the solid-state imaging device, an A / D converter for converting the signal amplified by the amplifier into digital data, and the A / D conversion. A processing unit for processing digital data converted by a processor, a memory for storing digital data after the processing by the processing unit, a memory control unit for performing address control of the memory, and the memory stored in the memory. In an electronic still camera composed of a D / A converter that converts digital data into an analog signal, at the time of image capturing, the signal reading speed from the solid-state image sensor is set to be slower than the NTSC television signal speed, and When obtaining image quality control data for focus, IRIS control, white balance control, etc., it is faster than the reading speed from the image sensor. An electronic still camera which is characterized in that.