JPH0736705A - Compiler execution system - Google Patents

Abstract

PURPOSE:To accelerate the compiling speed of a compiler and to improve the efficiency of hardware resources. CONSTITUTION:When the compiler is started, a control part 11 loads all the phase processing modules on a main memory unit in a sub task form. A first phase processing module 12 reads a text from a source program file 3, generates token data (intermediate language generated inside the compiler) equivalent to one case and writes them in a shared memory 21. When the token data are written in the shared memory 21, a second phase processing module 13 receives the token data and performs a processing. Thereafter, the similar processing 15 performed upto a forth phase processing module 15 and an object is generated and is stored in an object program file.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a compiler execution system, and more particularly to a compiler execution system in which the internal processing of the compiler is performed by a plurality of phase processes.

[0002]

2. Description of the Related Art Conventionally, this type of compiler execution method has been
As shown in the representative example in FIG. 2, the execution of the internal processing phase is executed serially and in order, and the tokens in each phase are passed through the intermediate files.

[0003]

In the conventional compiler execution method described above, since the execution method of the internal processing phase is serial processing by a single task, all tokens generated by the phase must be temporarily saved in the intermediate file. I won't. Therefore, this method has a problem that a large amount of auxiliary storage device is used and even in the case of a multiprocessor type central processing unit, the utilization efficiency of hardware resources is poor because only one CPU is used.

[0004]

According to the compiler execution method of the present invention, in a compiler execution method in which the internal processing of the compiler is performed in a plurality of phases, a plurality of phases are activated as separate tasks and tokens generated in each phase. It is configured by passing data between phases via a shared memory provided on the main storage device and performing processing in each phase in parallel.

[0005]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram of an embodiment of the present invention.
The embodiment of FIG. 1 shows a case in which there are four processing phases, and is composed of a compiler 1, a main storage device 2, a source program file 3, and an object program 4, and the compiler 1 includes a control unit 11 and a first phase process. It has a module 12, a second phase processing module 13, a third processing module 14, and a fourth processing module 15, and the main memory 2 is provided with three shared memories 21, 22, and 23. Note that data tables other than token text, dictionaries, etc. are not shown because they are not related to the present invention.

In the above configuration, when the compiler 1 is activated, the control unit 11 loads all the phase processing modules in the form of subtasks on the main storage device and activates each phase processing module. The first phase processing module 12 reads a text from the source program file 3, generates one token data (intermediate language generated in the compiler), and writes the token data in the shared memory 21. Second phase processing module 1
3 reads the token data stored by the first phase processing module 12 from the shared memory 21 and executes the processing of the phase. When the processing for one case is completed, the second phase processing module 13 writes the token data generated in that phase in the shared memory 22. The third phase processing module 14 processes the token data stored by the second phase processing module 13 from the shared memory 22 in the reading phase. When the third phase processing module 14 completes the processing for one case, it writes the token data generated in that phase in the shared memory 23. Fourth
The phase processing module 15 reads the token data stored by the third phase processing module 14 from the shared memory 23 and processes the read phase. The fourth phase processing module 15 creates an object and creates the object program file 4. in this way,
Data is passed between phases in units of token data.

FIG. 3 is a diagram for explaining the structure of the shared memories 21, 22, and 23 in FIG. 1, and all the shared memories have the same structure. The shared memory has a buffering function for storing a plurality of token data in order to absorb the difference in processing speed of each phase, and a function for passing data between tasks. The shared memory is a memory space that can be freely read and written by multiple tasks.
It is created with the structure shown in. Buffer queue 201
Is set to the number of valid token data. The record number of the written token data is set in the write pointer 202. In the read pointer 203, the record number of the last read token data is set. The unused area start pointer 204 is set with the start address of the token data storage area 206 that is not used. The unused area end pointer 205 includes
The address of the last part of the unused token data storage area 206 is set. The token data storage area 206 is a memory space in which tokens are stored. The size of this area is set by the user side according to the capacity of the mounted memory of the system. The record index unit 207 stores the record pointer 208 and the length 2 of the stored token data.
09 is stored in association with the record number, the smaller record number area for the read pointer is reused.

FIG. 4 is a flow chart of the process of writing the token data in the shared memory. The process of writing the token data will be described with reference to FIG. First, it is determined whether the unused area remains in the token data storage area 206 by the size of the token to be stored, and whether the value obtained by adding the token length to the unused area start pointer 204 is smaller than the final address of the token storage area. If there is no remaining area, the value of the unused area start pointer 204 is set to the token data storage area start address (steps 401 and 402). Next, it is checked whether the value obtained by adding the length of the token data to be stored to the value of the unused area start pointer 204 exceeds the value of the unused area end pointer 206. The storage area 206 is kept in a wait state until there is a free space (step 403). When the token data storage area 206 has a sufficient area for storing the token data, the token data is copied to the token data storage area 206 (step 404), and the record pointer 208 and the length 20 of the record index unit 207 are copied.
9 is set (steps 405 and 406). And
The value of the token data length is added to the value of the unused area start pointer 204 (step 407), and the value of the buffer queue 201 is added by 1 (step 408).

FIG. 5 is a flow chart of a process of reading token data from the shared memory. The process of reading token data will be described with reference to FIG. Buffer queue 201
If the value of 0 is 0, there is no token data waiting to be processed, and a wait state is set (step 501). If the value of the buffer queue 201 is other than 0, the read pointer 2
03 and the record index unit 207 to read the token data (step 502). The value of the taken token length is added to the value of the unused area final pointer 205 (step 503). 1 is added to the value of the read pointer 203 (step 504) and the value of the buffer queue 1 is set to 1
Subtract (step 505). By referring to the value of the buffer queue 1, the token data being written can be delivered without being mistakenly taken.

FIG. 6 is a diagram showing the flow of processing when a plurality of programs are compiled according to the present invention, showing a case where n programs are compiled in four processing phases.

[0012]

As described above, according to the present invention, the processing of the next phase can be started without waiting for the completion of the processing of the previous phase. Further, since the token data generation side and the token data reception side exist at the same time, it is not necessary to create an intermediate file. Generally, since an intermediate file is created on a magnetic disk, physical input / output occurs, which causes a decrease in compilation performance. However, in the present invention, token data can be delivered without using an intermediate file. . This has the effect of improving the compile speed performance. In addition, even if you compile multiple programs, you do not have to start more tasks than the number of phases, so time sharing is less likely to occur and it is efficient. When you compile multiple programs at once, each MPU is fully occupied. By performing the processing in this manner, there is an effect that the consumption efficiency of MPU resources can be improved.

[Brief description of drawings]

FIG. 1 is a configuration diagram of an embodiment of the present invention.

FIG. 2 is a diagram showing an example of a conventional compiler execution method.

FIG. 3 is a configuration diagram of a shared memory according to the embodiment of FIG.

FIG. 4 is a flow chart of processing at the time of writing to the shared memory of FIG.

5 is a flow chart of processing at the time of reading from the shared memory of FIG.

FIG. 6 is a state diagram when a plurality of programs are compiled according to the present invention.

[Explanation of symbols]

 1 Compiler 2 Main Memory 3 Source Program File 4 Object Program File 12 First Phase Processing Module 13 Second Phase Processing Module 14 Third Phase Processing Module 15 Fourth Phase Processing Module 21, 22, 23 Shared Memory 61, 62, 63 Intermediate file

Claims (1)

[Claims] 1. In a compiler execution method in which the internal processing of a compiler is performed in a plurality of phases, a plurality of phases are started as separate tasks, and a token memory generated in each phase is provided in a shared memory provided in a main storage device. A compiler execution method characterized in that the phases are passed between each other and the processing in each phase is performed in parallel.