JPH07321052A - Method of manufacturing polycrystalline semiconductor film - Google Patents

Method of manufacturing polycrystalline semiconductor film

Info

Publication number
JPH07321052A
JPH07321052A JP11517694A JP11517694A JPH07321052A JP H07321052 A JPH07321052 A JP H07321052A JP 11517694 A JP11517694 A JP 11517694A JP 11517694 A JP11517694 A JP 11517694A JP H07321052 A JPH07321052 A JP H07321052A
Authority
JP
Japan
Prior art keywords
semiconductor film
polycrystalline semiconductor
film
polycrystalline
crystal grain
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11517694A
Other languages
Japanese (ja)
Other versions
JP3244380B2 (en
Inventor
Yoichiro Aya
洋一郎 綾
Keiichi Sano
景一 佐野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP11517694A priority Critical patent/JP3244380B2/en
Publication of JPH07321052A publication Critical patent/JPH07321052A/en
Application granted granted Critical
Publication of JP3244380B2 publication Critical patent/JP3244380B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Abstract

PURPOSE:To provide the method of manufacturing a polycrystalline semiconductor film with expanded crystalline particle diameter. CONSTITUTION:A semiconductor film 3 to be a starting material formed on a substrate 1 as a sample 5 is fixed in a substrate holder 6 comprising a piezoelectric oscillating element 7. Next, the piezoelectric element 7 is impressed with a voltage to generate ultrasonic oscillation as well as laser-anneal for molten recrystallization of the semiconductor film 3.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は多結晶半導体膜の製造方
法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a polycrystalline semiconductor film.

【0002】[0002]

【従来の技術】薄膜トランジスタ(TFT)は、たとえ
ばアクティブマトリックス型液晶パネルの駆動装置に用
いられている。この薄膜トランジスタを形成する際に
は、p型またはn型にドープされた多結晶Si膜等の多
結晶半導体膜がその材料として用いられる。薄膜トラン
ジスタにおいて、より高い電界効果移動度を得るために
は、電子に対する障壁となる結晶粒界が少ない方がよ
く、したがって多結晶半導体膜の結晶粒径が大きい方が
よい。
2. Description of the Related Art A thin film transistor (TFT) is used, for example, in a drive device of an active matrix type liquid crystal panel. When forming this thin film transistor, a polycrystalline semiconductor film such as a p-type or n-type doped polycrystalline Si film is used as the material. In order to obtain a higher field effect mobility in a thin film transistor, it is better that the number of crystal grain boundaries that act as a barrier for electrons is smaller, and therefore the larger the crystal grain size of the polycrystalline semiconductor film is.

【0003】そこで、多結晶半導体膜の結晶粒径を拡大
するために様々な方法が提案されている。その方法の1
つとして、H.Kuriyama et al.: Japanese Journal of A
pplied Physics, Vol. 30, No. 12B, December, 1991,p
p.3700-3703 に提案されているレーザアニール法があ
る。このレーザアニール法は、例えばプラズマCVD法
により形成された非晶質Si膜(以下、a−Si膜と呼
ぶ)にレーザ光をパルス的に照射し、a−Si膜を一旦
溶融させた後に再び凝固させて多結晶Si膜を形成する
ものである。この方法の物理的機構としては、a−Si
膜の溶融および再結晶の過程で小さな結晶粒が形成さ
れ、その結晶粒の結晶粒界に対してエネルギーを付与す
ることにより結晶粒界が破壊され、結晶粒径が拡大して
いくと考えられている。
Therefore, various methods have been proposed to increase the crystal grain size of the polycrystalline semiconductor film. Method 1
H. Kuriyama et al .: Japanese Journal of A
pplied Physics, Vol. 30, No. 12B, December, 1991, p
There is a laser annealing method proposed on p.3700-3703. In this laser annealing method, for example, an amorphous Si film (hereinafter referred to as an a-Si film) formed by a plasma CVD method is irradiated with a laser beam in a pulsed manner, the a-Si film is once melted, and then the a-Si film is melted again. It is solidified to form a polycrystalline Si film. The physical mechanism of this method is a-Si.
It is considered that small crystal grains are formed during the process of melting and recrystallization of the film, and energy is applied to the crystal grain boundaries to destroy the crystal grain boundaries and expand the crystal grain size. ing.

【0004】[0004]

【発明が解決しようとする課題】上記のレーザアニール
法において、結晶粒径を増大させるためにはより多くの
エネルギーを付与する必要がある。そのために、レーザ
の出力を増大させるかまたは照射するレーザ光のパルス
の数を増加させると、膜荒れが生じてしまうという問題
があった。したがって、従来は多結晶Si膜の結晶粒径
がある程度の大きさで飽和してしいた。
In the above laser annealing method, it is necessary to apply more energy in order to increase the crystal grain size. Therefore, when the laser output is increased or the number of laser light pulses to be applied is increased, there is a problem that film roughness occurs. Therefore, conventionally, the crystal grain size of the polycrystalline Si film is saturated to some extent.

【0005】それゆえに、本発明の目的は、膜荒れ等の
問題を生じることなく結晶粒径を拡大することができる
多結晶半導体膜の製造方法を提供することである。
Therefore, an object of the present invention is to provide a method for producing a polycrystalline semiconductor film which can increase the crystal grain size without causing problems such as film roughness.

【0006】[0006]

【課題を解決するための手段】本発明に係る多結晶半導
体膜の製造方法は、基板上の半導体膜を出発材料として
多結晶半導体膜を製造する方法において、基板または半
導体膜に超音波を印加しつつ基板上の半導体膜を加熱し
て溶融させた後、再結晶させることにより多結晶半導体
膜を形成するものである。
A method for producing a polycrystalline semiconductor film according to the present invention is a method for producing a polycrystalline semiconductor film using a semiconductor film on a substrate as a starting material, wherein ultrasonic waves are applied to the substrate or the semiconductor film. While the semiconductor film on the substrate is heated and melted while being recrystallized, a polycrystalline semiconductor film is formed.

【0007】[0007]

【作用】本発明に係る多結晶半導体膜の製造方法におい
ては、出発材料である半導体膜を加熱して溶融させる際
に、基板または半導体膜に超音波を印加することによ
り、半導体膜に間接的にまたは直接的にエネルギーが付
与される。それにより、横方向の結晶成長が促進され、
結晶粒界の形成が妨げられる。その結果、形成された多
結晶半導体膜の結晶粒径がさらに拡大する。この方法に
よれば、加熱のためのエネルギーを増大させる必要がな
いので、膜荒れが生じない。
In the method for producing a polycrystalline semiconductor film according to the present invention, when the semiconductor film which is the starting material is heated and melted, ultrasonic waves are applied to the substrate or the semiconductor film to indirectly affect the semiconductor film. Energy is directly or directly applied. This promotes lateral crystal growth,
Formation of grain boundaries is prevented. As a result, the crystal grain size of the formed polycrystalline semiconductor film is further expanded. According to this method, since it is not necessary to increase the energy for heating, the film is not roughened.

【0008】[0008]

【実施例】以下、本発明の実施例を図面を参照しながら
詳細に説明する。
Embodiments of the present invention will now be described in detail with reference to the drawings.

【0009】図1は、本発明の一実施例による多結晶半
導体膜の製造方法を示す製造工程図である。
FIG. 1 is a manufacturing process diagram showing a method for manufacturing a polycrystalline semiconductor film according to an embodiment of the present invention.

【0010】まず、図1の(a)に示すように、ガラス
等からなる基板1上に、例えば熱CVD法により、Si
2 等からなるバッファ層2を0.05〜3μmの厚さ
に形成する。次に、図1の(b)に示すように、バッフ
ァ層2上に、例えばプラズマCVD法により、出発材料
となるノンドープ、p型またはn型の半導体膜3を0.
05〜3μmの厚さに形成した後、アニール処理により
脱水素化を行う。さらに、図1の(c)に示すように、
半導体膜3上に、例えば熱CVD法により、SiO2
からなるキャップ膜4を0.05〜3μmの厚さに形成
する。このようにして、基板1上にバッファ層2、半導
体膜3およびキャップ膜4が積層されたサンプル5が作
製される。
First, as shown in FIG. 1A, Si is formed on a substrate 1 made of glass or the like by, for example, a thermal CVD method.
The buffer layer 2 made of O 2 or the like is formed to a thickness of 0.05 to 3 μm. Next, as shown in FIG. 1B, a non-doped p-type or n-type semiconductor film 3 as a starting material is formed on the buffer layer 2 by, for example, a plasma CVD method.
After being formed to a thickness of 05 to 3 μm, dehydrogenation is performed by annealing treatment. Furthermore, as shown in (c) of FIG.
A cap film 4 made of SiO 2 or the like is formed on the semiconductor film 3 to have a thickness of 0.05 to 3 μm by, for example, a thermal CVD method. In this way, the sample 5 in which the buffer layer 2, the semiconductor film 3 and the cap film 4 are laminated on the substrate 1 is manufactured.

【0011】次に、図1の(d)に示すように、サンプ
ル5を超音波振動する基板ホルダ6に取り付ける。基板
ホルダ6としては、例えばPZTのような圧電振動素子
7の両面に銀電極8を蒸着したものを用いる。ここで、
PZTとは、チタン酸ジルコン酸鉛(Pb(Zr,T
i)O3 )系圧電振動素子の総称である。
Next, as shown in FIG. 1D, the sample 5 is attached to the substrate holder 6 which vibrates ultrasonically. As the substrate holder 6, for example, a piezoelectric vibrating element 7 such as PZT having silver electrodes 8 deposited on both sides is used. here,
PZT is lead zirconate titanate (Pb (Zr, T
i) A general term for O 3 ) type piezoelectric vibrating elements.

【0012】そして、図1の(e)に示すように、基板
ホルダ6に電圧を印加し、超音波振動を連続的にまたは
パルス的に発生させた状態でサンプル5に対してレーザ
光9をパルス的に照射する。レーザ光を発生するレーザ
としては、例えば波長が1μm以下のエキシマレーザを
用い、レーザ光の出力は0.1〜1J/cm2 とする。
このようにして、サンプル5の半導体膜3を出発材料と
して多結晶半導体膜が形成される。
Then, as shown in FIG. 1 (e), a laser beam 9 is applied to the sample 5 in a state where a voltage is applied to the substrate holder 6 to generate ultrasonic vibration continuously or in a pulsed manner. Irradiate in pulses. As a laser for generating laser light, for example, an excimer laser having a wavelength of 1 μm or less is used, and the output of laser light is 0.1 to 1 J / cm 2 .
In this way, a polycrystalline semiconductor film is formed using the semiconductor film 3 of Sample 5 as a starting material.

【0013】本実施例では、出発材料となる半導体膜3
として、プラズマCVD法により形成したノンドープの
a−Si膜を用いた。
In this embodiment, the semiconductor film 3 as a starting material is used.
A non-doped a-Si film formed by the plasma CVD method was used as.

【0014】表1に本実施例における多結晶半導体膜の
作製条件を示す。
Table 1 shows the conditions for producing the polycrystalline semiconductor film in this embodiment.

【0015】[0015]

【表1】 [Table 1]

【0016】表1に示すように、本実施例では、超音波
印加のための圧電振動素子7として共振周波数2MHz
のPZTを用い、サンプル5を圧電振動素子7からなる
基板ホルダ6上に直接固定し、それを真空容器内にセッ
トし、真空容器内を10-4Pa程度まで真空引きした。
As shown in Table 1, in this embodiment, the piezoelectric vibrating element 7 for applying ultrasonic waves has a resonance frequency of 2 MHz.
The sample 5 was directly fixed on the substrate holder 6 composed of the piezoelectric vibrating element 7 by using the PZT of No. 1 and set in a vacuum container, and the inside of the vacuum container was evacuated to about 10 −4 Pa.

【0017】その後、圧電振動素子7に電圧を印加して
超音波振動を発生させ、真空容器の紫外光導入窓よりレ
ーザ光を導入してレーザアニールを行った。このときの
基板温度は400℃である。また、レーザ光としては、
波長193nmのArFエキシマレーザを用い、エネル
ギー密度を200mJ/cm2 とした。
After that, a voltage was applied to the piezoelectric vibrating element 7 to generate ultrasonic vibration, and laser light was introduced through the ultraviolet light introduction window of the vacuum container to perform laser annealing. The substrate temperature at this time is 400 ° C. Also, as the laser light,
An ArF excimer laser with a wavelength of 193 nm was used and the energy density was set to 200 mJ / cm 2 .

【0018】本実施例では、図2の(a)に示すよう
に、レーザ照射のタイミングと超音波印加のタイミング
とを少しずらした。図2の(b)に示すように、超音波
印加のタイミングをレーザ照射のタイミングとほぼ同期
をとってもよい。
In this embodiment, as shown in FIG. 2 (a), the laser irradiation timing and the ultrasonic wave application timing were slightly shifted. As shown in FIG. 2B, the ultrasonic wave application timing may be substantially synchronized with the laser irradiation timing.

【0019】圧電振動素子7へ印加する電圧を0Vから
30Vまで変化させて複数種類の多結晶Si膜のサンプ
ルを作製し、各多結晶Si膜の最大粒径をSEM(走査
型電子顕微鏡)写真より測定した。図3に圧電振動素子
7に対する印加電圧と得られた多結晶Si膜の最大結晶
粒径との関係を示す。
The voltage applied to the piezoelectric vibrating element 7 was changed from 0 V to 30 V to prepare samples of a plurality of types of polycrystalline Si films, and the maximum grain size of each polycrystalline Si film was taken by SEM (scanning electron microscope) photograph. More measured. FIG. 3 shows the relationship between the applied voltage to the piezoelectric vibrating element 7 and the maximum crystal grain size of the obtained polycrystalline Si film.

【0020】図3から明らかなように、圧電振動素子7
に対する印加電圧が増大し、超音波のエネルギーが大き
くなるほど、最大結晶粒径も増大することがわかる。例
えば、圧電振動素子7に30Vの電圧を印加した場合に
は、最大結晶粒径が約3μmになった。
As is apparent from FIG. 3, the piezoelectric vibrating element 7
It can be seen that the maximum crystal grain size also increases as the applied voltage to V increases and the ultrasonic energy increases. For example, when a voltage of 30 V was applied to the piezoelectric vibrating element 7, the maximum crystal grain size was about 3 μm.

【0021】なお、上記実施例では、レーザ光をサンプ
ル5にパルス的に照射しているが、レーザ光をサンプル
5に連続照射しても、上記実施例と同様に、結晶粒径が
拡大された多結晶半導体膜が得られる。
In the above-mentioned embodiment, the sample 5 is irradiated with the laser beam in a pulsed manner. However, even if the sample 5 is continuously irradiated with the laser beam, the crystal grain size is enlarged similarly to the above-mentioned example. A polycrystalline semiconductor film is obtained.

【0022】また、上記実施例では、10-4Pa程度の
真空中でレーザアニール法による溶融再結晶化を行って
いるが、Ar等の不活性ガス雰囲気中や、N2 等のガス
雰囲気中でレーザアニール法による溶融再結晶化を行っ
てもよい。
Further, in the above embodiment, the melt recrystallization is performed by the laser annealing method in a vacuum of about 10 -4 Pa, but in an inert gas atmosphere such as Ar or a gas atmosphere such as N 2. Alternatively, melt recrystallization may be performed by laser annealing.

【0023】図4は、本発明の他の実施例による多結晶
半導体膜の製造方法を示す図である。図4の実施例で
は、半導体膜の溶融再結晶化のためにランプアニール法
を用いる。このランプアニール法は、J.Fair and J.Meh
lhaff: Proc. of International Flat Panel Display C
onference, Section A, pp. 109-113 において提案され
ている。
FIG. 4 is a diagram showing a method of manufacturing a polycrystalline semiconductor film according to another embodiment of the present invention. In the embodiment of FIG. 4, a lamp annealing method is used for melting and recrystallization of the semiconductor film. This lamp annealing method is based on J. Fair and J. Meh.
lhaff: Proc. of International Flat Panel Display C
onference, Section A, pp. 109-113.

【0024】図4に示すように、図1の(a)〜(c)
と同様の方法で作製されたサンプル5を圧電振動素子7
からなる基板ホルダ6上に設置する。ハロゲンランプ、
キセノンランプ等からなる光源10から発せられた光を
集光用反射鏡11および平面反射鏡12を用いてサンプ
ル5に照射する。同時に、図1の実施例と同様に、圧電
振動素子7に電圧を印加し、サンプル5に超音波振動を
加える。
As shown in FIG. 4, (a) to (c) of FIG.
The sample 5 manufactured by the same method as the
It is installed on the substrate holder 6 made of. Halogen lamp,
Light emitted from a light source 10 composed of a xenon lamp or the like is applied to a sample 5 using a converging reflecting mirror 11 and a plane reflecting mirror 12. At the same time, similarly to the embodiment of FIG. 1, a voltage is applied to the piezoelectric vibrating element 7 and ultrasonic vibration is applied to the sample 5.

【0025】表2に本実施例における多結晶半導体膜の
作製条件を示す。
Table 2 shows the conditions for producing the polycrystalline semiconductor film in this example.

【0026】[0026]

【表2】 [Table 2]

【0027】表2に示すように、本実施例では、ランプ
アニール法の光源10として光強度が100mW/cm
2 程度のハロゲンランプを用いた。サンプル5上に集光
される光の径を約2mmとし、集光後の光の強度を50
0W/cm2 程度とした。また、アニール時間を約3秒
とした。
As shown in Table 2, in this embodiment, the light intensity of the light source 10 of the lamp annealing method is 100 mW / cm.
A halogen lamp of about 2 was used. The diameter of the light focused on the sample 5 is set to about 2 mm, and the intensity of the light after focusing is 50 mm.
It was set to about 0 W / cm 2 . The annealing time was about 3 seconds.

【0028】本実施例においては、圧電振動素子7とし
て、図1の実施例と同様に、共振周波数2MHzのPZ
Tを用いたが、圧電振動素子7に連続的に電圧を印加
し、サンプル5に対して連続的に超音波振動を加えた状
態でランプアニール法による溶融再結晶化を行った。サ
ンプル5に集光された光のエネルギー密度は最大100
0W/cm2 に達するので、基板1上に堆積されたa−
Si膜を溶融させることができる。
In this embodiment, as the piezoelectric vibrating element 7, a PZ having a resonance frequency of 2 MHz is used as in the embodiment of FIG.
Although T was used, a voltage was continuously applied to the piezoelectric vibrating element 7 and the sample 5 was melt-recrystallized by a lamp annealing method while continuously applying ultrasonic vibration. The energy density of the light focused on the sample 5 is 100 at maximum.
Since 0 W / cm 2 is reached, a- deposited on the substrate 1
The Si film can be melted.

【0029】図1の実施例と同様に、圧電振動素子7へ
印加する電圧を0Vから30Vまで変化させて複数種類
の多結晶Si膜のサンプルを作製した。図5に圧電振動
素子7に対する印加電圧と得られた多結晶Si膜の最大
結晶粒径との関係を示す。
Similar to the embodiment shown in FIG. 1, the voltage applied to the piezoelectric vibrating element 7 was changed from 0 V to 30 V to prepare samples of a plurality of types of polycrystalline Si films. FIG. 5 shows the relationship between the applied voltage to the piezoelectric vibrating element 7 and the maximum crystal grain size of the obtained polycrystalline Si film.

【0030】図5から明らかなように、ランプアニール
法により溶融再結晶化を行った場合にも、圧電振動素子
7に対する印加電圧が増大するほど最大結晶粒径が増大
することがわかる。例えば、圧電振動素子7に30Vの
電圧を印加した場合には、最大結晶粒径が約1.2μm
となった。
As is apparent from FIG. 5, even when the melt recrystallization is performed by the lamp annealing method, the maximum crystal grain size increases as the applied voltage to the piezoelectric vibrating element 7 increases. For example, when a voltage of 30 V is applied to the piezoelectric vibrating element 7, the maximum crystal grain size is about 1.2 μm.
Became.

【0031】図6は超音波印加方法の他の例を示す図で
ある。図6の方法では、図1の(a)〜(c)と同様の
方法により作製されたサンプル5を基板ホルダ13上に
設置し、サンプル5の上方からアンテナ14等を用いて
超音波を照射し、同時に、サンプル5にレーザ光9を照
射する。
FIG. 6 is a diagram showing another example of the ultrasonic wave applying method. In the method of FIG. 6, a sample 5 manufactured by the same method as in FIGS. 1A to 1C is placed on the substrate holder 13, and ultrasonic waves are emitted from above the sample 5 using the antenna 14 and the like. At the same time, the sample 5 is irradiated with the laser beam 9.

【0032】図6の超音波印加方法を用いても、圧電振
動素子7を用いた場合と同様に、結晶粒径が拡大された
多結晶半導体膜が得られる。また、図6の超音波印加方
法を図4の実施例に適用してもよい。
By using the ultrasonic wave applying method shown in FIG. 6, a polycrystalline semiconductor film having an enlarged crystal grain size can be obtained as in the case of using the piezoelectric vibrating element 7. Further, the ultrasonic wave applying method of FIG. 6 may be applied to the embodiment of FIG.

【0033】上記実施例では、レーザアニール法または
ランプアニール法による溶融再結晶化の際に超音波を印
加しているが、その他の溶融再結晶化法、例えば、電子
ビーム、フラッシュランプ等を用いた溶融再結晶化の際
に超音波を印加しても、上記実施例と同様に、結晶粒径
が拡大された多結晶半導体膜を得ることができる。
In the above embodiment, ultrasonic waves are applied at the time of melting and recrystallization by the laser annealing method or the lamp annealing method, but other melting and recrystallization methods such as electron beam and flash lamp are used. Even if an ultrasonic wave is applied during the melt recrystallization, a polycrystalline semiconductor film having an enlarged crystal grain size can be obtained as in the above-mentioned embodiment.

【0034】出発材料としては、プラズマCVDまたは
LPCVD(低圧化学気相成長)法により形成されたノ
ンドープあるいはp型またはn型にドープされたa−S
i等の非晶質半導体を用いることができる。
As a starting material, non-doped p-type or n-type doped a-S formed by plasma CVD or LPCVD (low pressure chemical vapor deposition) method is used.
An amorphous semiconductor such as i can be used.

【0035】また、出発材料として結晶粒径が比較的小
さな多結晶半導体膜を用いてもよい。たとえば、前処理
として固相成長(SPC)法等により形成されたノンド
ープあるいはp型またはn型にドープされた多結晶Si
膜等の多結晶半導体膜を出発材料としてもよい。この場
合にも、結晶粒径が拡大された多結晶半導体膜が得られ
る。
A polycrystalline semiconductor film having a relatively small crystal grain size may be used as a starting material. For example, non-doped or p-type or n-type doped polycrystalline Si formed by a solid phase growth (SPC) method or the like as a pretreatment.
A polycrystalline semiconductor film such as a film may be used as a starting material. Also in this case, a polycrystalline semiconductor film having an enlarged crystal grain size can be obtained.

【0036】さらに、前処理としてレーザアニールによ
り形成されたノンドープあるいはp型またはn型にドー
プされた多結晶Si膜を出発材料としてもよい。例え
ば、上記のH.Kuriyama et al.: Japanese Journal of A
pplied Physics, Vol. 30, No.12B, December, 1991, p
p. 3700-3703 に示されているように、500℃以下の
低温基板加熱を行ってa−Si膜を溶融させ、溶融した
Siの凝固過程を制御しながらレーザ光を多パルスで照
射することにより、結晶粒径の比較的小さな多結晶Si
膜を形成し、その多結晶Si膜を出発材料として用いて
もよい。
Further, a non-doped or p-type or n-type doped polycrystalline Si film formed by laser annealing as a pretreatment may be used as a starting material. For example, H. Kuriyama et al .: Japanese Journal of A above.
pplied Physics, Vol. 30, No.12B, December, 1991, p
As shown in p. 3700-3703, heating the substrate at a low temperature of 500 ° C or lower to melt the a-Si film, and irradiating laser light with multiple pulses while controlling the solidification process of the melted Si. Due to the relatively small crystal grain size of polycrystalline Si
A film may be formed and the polycrystalline Si film may be used as a starting material.

【0037】また、プラズマCVD法等により形成され
たノンドープあるにはp型またはn型にドープされた微
結晶Siを含む非晶質半導体膜を出発材料としてもよ
い。
A non-doped or p-type or n-type doped amorphous semiconductor film containing microcrystalline Si formed by plasma CVD or the like may be used as a starting material.

【0038】なお、通常20kHz以上の周波数を有す
る音波を超音波と呼ぶが、本発明では超音波発生の容易
性および圧電振動素子を用いる点から0.1〜100M
Hz程度の周波数を有する超音波を用いることが好まし
い。
Although a sound wave having a frequency of 20 kHz or more is generally called an ultrasonic wave, in the present invention, it is 0.1 to 100 M from the viewpoint of ease of ultrasonic wave generation and the use of a piezoelectric vibrating element.
It is preferable to use ultrasonic waves having a frequency of about Hz.

【0039】[0039]

【発明の効果】以上のように、本発明によれば、出発材
料となる半導体膜の溶融再結晶化の際に半導体膜に超音
波を印加することにより、膜荒れ等の問題が生じること
なく、結晶粒径が拡大された多結晶半導体膜が得られ
る。
As described above, according to the present invention, ultrasonic waves are applied to the semiconductor film at the time of melting and recrystallization of the semiconductor film as a starting material, so that problems such as film roughness do not occur. A polycrystalline semiconductor film having an enlarged crystal grain size can be obtained.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例による多結晶半導体膜の製造
方法を示す製造工程図である。
FIG. 1 is a manufacturing process diagram showing a method for manufacturing a polycrystalline semiconductor film according to an embodiment of the present invention.

【図2】図1の実施例におけるレーザ照射および超音波
印加のタイミングを示すタイミングチャートである。
2 is a timing chart showing the timing of laser irradiation and ultrasonic wave application in the embodiment of FIG.

【図3】図1の実施例における圧電振動素子に対する印
加電圧と得られた多結晶半導体膜の最大結晶粒径との関
係を示す図である。
3 is a diagram showing the relationship between the applied voltage to the piezoelectric vibrating element in the embodiment of FIG. 1 and the maximum crystal grain size of the obtained polycrystalline semiconductor film.

【図4】本発明の他の実施例による多結晶半導体膜の製
造方法を示す図である。
FIG. 4 is a diagram showing a method for manufacturing a polycrystalline semiconductor film according to another embodiment of the present invention.

【図5】図4の実施例における圧電振動素子に対する印
加電圧と得られた多結晶半導体膜の最大結晶粒径との関
係を示す図である。
5 is a diagram showing the relationship between the applied voltage to the piezoelectric vibration element and the maximum crystal grain size of the obtained polycrystalline semiconductor film in the example of FIG.

【図6】超音波印加方法の他の例を示す図である。FIG. 6 is a diagram showing another example of an ultrasonic wave applying method.

【符号の説明】[Explanation of symbols]

1 基板 3 半導体膜 5 サンプル 6 基板ホルダ 7 圧電振動素子 9 レーザ光 10 光源 11 集光用反射鏡 12 平面反射鏡 14 アンテナ なお、各図中同一符号は同一または相当部分を示す。 1 Substrate 3 Semiconductor Film 5 Sample 6 Substrate Holder 7 Piezoelectric Vibrating Element 9 Laser Light 10 Light Source 11 Condensing Reflecting Mirror 12 Planar Reflecting Mirror 14 Antenna In the drawings, the same reference numerals indicate the same or corresponding parts.

フロントページの続き (51)Int.Cl.6 識別記号 庁内整理番号 FI 技術表示箇所 H01L 29/786 21/336 Continuation of the front page (51) Int.Cl. 6 Identification code Office reference number FI technical display location H01L 29/786 21/336

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 基板上の半導体膜を出発材料として多結
晶半導体膜を製造する方法において、前記基板または前
記半導体膜に超音波を印加しつつ前記半導体膜を加熱し
て溶融させた後、再結晶させることにより多結晶半導体
膜を形成することを特徴とする多結晶半導体膜の製造方
法。
1. A method for manufacturing a polycrystalline semiconductor film using a semiconductor film on a substrate as a starting material, wherein the semiconductor film is heated and melted while applying ultrasonic waves to the substrate or the semiconductor film, A method for producing a polycrystalline semiconductor film, which comprises forming the polycrystalline semiconductor film by crystallization.
JP11517694A 1994-05-27 1994-05-27 Method for manufacturing polycrystalline semiconductor film Expired - Fee Related JP3244380B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11517694A JP3244380B2 (en) 1994-05-27 1994-05-27 Method for manufacturing polycrystalline semiconductor film

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11517694A JP3244380B2 (en) 1994-05-27 1994-05-27 Method for manufacturing polycrystalline semiconductor film

Publications (2)

Publication Number Publication Date
JPH07321052A true JPH07321052A (en) 1995-12-08
JP3244380B2 JP3244380B2 (en) 2002-01-07

Family

ID=14656233

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11517694A Expired - Fee Related JP3244380B2 (en) 1994-05-27 1994-05-27 Method for manufacturing polycrystalline semiconductor film

Country Status (1)

Country Link
JP (1) JP3244380B2 (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003017505A (en) * 2001-04-23 2003-01-17 Toshiba Corp Method for manufacturing polycrystalline silicon thin film transistor
JP2004179653A (en) * 2002-11-15 2004-06-24 Semiconductor Energy Lab Co Ltd Manufacturing methods for semiconductor sheet and semiconductor device, and laser processing equipment
JP2006032982A (en) * 2005-09-02 2006-02-02 Semiconductor Energy Lab Co Ltd Heating processing method of thin film
US8106330B2 (en) 2002-11-15 2012-01-31 Semiconductor Energy Laboratory Co., Ltd. Method for fabricating semiconductor film and semiconductor device and laser processing apparatus

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003017505A (en) * 2001-04-23 2003-01-17 Toshiba Corp Method for manufacturing polycrystalline silicon thin film transistor
JP2004179653A (en) * 2002-11-15 2004-06-24 Semiconductor Energy Lab Co Ltd Manufacturing methods for semiconductor sheet and semiconductor device, and laser processing equipment
JP4610178B2 (en) * 2002-11-15 2011-01-12 株式会社半導体エネルギー研究所 Method for manufacturing semiconductor device
US8106330B2 (en) 2002-11-15 2012-01-31 Semiconductor Energy Laboratory Co., Ltd. Method for fabricating semiconductor film and semiconductor device and laser processing apparatus
JP2006032982A (en) * 2005-09-02 2006-02-02 Semiconductor Energy Lab Co Ltd Heating processing method of thin film

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