JPH07302962A - Circuit board and its manufacture - Google Patents

Circuit board and its manufacture

Info

Publication number
JPH07302962A
JPH07302962A JP8182095A JP8182095A JPH07302962A JP H07302962 A JPH07302962 A JP H07302962A JP 8182095 A JP8182095 A JP 8182095A JP 8182095 A JP8182095 A JP 8182095A JP H07302962 A JPH07302962 A JP H07302962A
Authority
JP
Japan
Prior art keywords
hole
insulating substrate
conductive paint
circuit board
conductive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP8182095A
Other languages
Japanese (ja)
Other versions
JP2775715B2 (en
Inventor
Sakae Shinkawa
栄 新川
Takaharu Makino
隆治 牧野
Satoshi Ban
悟志 伴
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hokuriku Electric Industry Co Ltd
Original Assignee
Hokuriku Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hokuriku Electric Industry Co Ltd filed Critical Hokuriku Electric Industry Co Ltd
Priority to JP7081820A priority Critical patent/JP2775715B2/en
Publication of JPH07302962A publication Critical patent/JPH07302962A/en
Application granted granted Critical
Publication of JP2775715B2 publication Critical patent/JP2775715B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/09Use of materials for the conductive, e.g. metallic pattern
    • H05K1/092Dispersed materials, e.g. conductive pastes or inks
    • H05K1/095Dispersed materials, e.g. conductive pastes or inks for polymer thick films, i.e. having a permanent organic polymeric binder
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038Through-connections; Vertical interconnect access [VIA] connections
    • H05K3/4053Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
    • H05K3/4069Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in organic insulating substrates

Abstract

PURPOSE:To obtain a circuit board in which a conductive defect is not caused, which can perform a high-density.mounting operation, which can be manufactured easily and whose yield is high. CONSTITUTION:A circuit board is provided with circuit patterns 2 formed on both faces of an insulating board 1, with lands 3 formed at end parts, on one side, of the circuit patterns 2 so as to be faced by sandwiching the insulating board 1 and with a through hole 4 formed in the insulating board 1 so as to be close to the lands 3. The inside diameter of individual opening parts 4a, 4b on both faces of the insulating board 1 of the through hole 4 is different, the inner wall face of the through hole 4 in a part close to the opening part 4a whose diameter is small out of the opening parts 4a, 4b swells and protrudes gently to the inside, and a small-diameter part 4c whose inside diameter is small is formed. A conductive paint 5 which is connected to the through hole 4 and to the lands 3 on both faces of the insulating board 1 and which has been hardened is provided.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】この発明は、絶縁基板の両面に形
成される回路パターンと、その両面の回路パターンの電
気的導通を図る導電スルーホールを有する回路基板とそ
の製造方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a circuit board having circuit patterns formed on both sides of an insulating substrate, conductive through holes for electrically connecting the circuit patterns on both sides, and a method for manufacturing the same.

【0002】[0002]

【従来の技術】従来、スルーホール回路基板の導電スル
ーホールは、絶縁基板にパンチングによって透孔を形成
し、この透孔に導電塗料を印刷によって複数回塗布して
回路基板両面の回路パターンの導通を図っていた(実公
昭55−44398号、以下従来例(イ)と称す)。
又、導電スルーホールの信頼性向上のために、基板の透
孔に基板の表裏両面側から表裏一対のスキージで導電ペ
イントを圧入する方法(特開昭58−91696号、以
下従来例(ロ)と称す)や、基板の透孔に導電ペイント
を複数回塗り重ねる方法(特開昭58−74097号、
以下従来例(ハ)と称す)、あるいは基板の透孔にスク
リーン印刷の手法を用いて導電ペイントを塗布する際、
基板の透孔に対応するマスク孔に段差のあるスクリーン
を用いる方法(特開昭57−112096号、以下従来
例(ニ)と称す)等もあった。
2. Description of the Related Art Conventionally, a conductive through hole of a through-hole circuit board is formed by punching a through hole in an insulating substrate, and a conductive paint is applied to the through hole a plurality of times by printing to conduct circuit patterns on both surfaces of the circuit board. (Japanese Utility Model Publication No. 55-44398, hereinafter referred to as "conventional example (a)").
Further, in order to improve the reliability of the conductive through hole, a method of press-fitting conductive paint into the through hole of the substrate from both front and back sides of the substrate with a pair of front and back squeegees (Japanese Patent Laid-Open No. 58-91696, hereinafter referred to as conventional example (b)). Or a method of applying conductive paint a plurality of times to the through holes of the substrate (JP-A-58-74097,
Hereinafter, referred to as a conventional example (C)), or when applying a conductive paint to the through holes of the substrate by using a screen printing method,
There is also a method of using a screen having a step in a mask hole corresponding to the through hole of the substrate (Japanese Patent Laid-Open No. 57-112096, hereinafter referred to as a conventional example (d)).

【0003】[0003]

【発明が解決しようとする課題】上記従来例(イ)の印
刷による導電スルーホールの形成は上記公報に開示され
ているように、複数回の塗布及び硬化を重ねないと信頼
性の高いものができなかった。しかも、複数回の印刷に
よる印刷ズレによって、導電スルーホールの小径化も図
れず、工数や材料コストが増大するという欠点がある。
さらに、複数回の印刷によって導電塗料同士の層間に気
泡が入ったり、印刷ムラが生じたりして、強度的に弱い
個所ができてクラックが入りやすくなる欠点がある。ま
た、複数回の印刷によって、導電塗料の飛散により回路
間のショートを生ずる機会も増大し、歩留まりも悪くな
る。特に、透孔が小さい場合導電塗料が透孔内に入りに
くく、導電層の薄い部分が生じやすく、断線の可能性も
増大してしまう。
As disclosed in the above publication, the formation of the conductive through holes by the printing of the above-mentioned conventional example (a) is highly reliable unless it is applied and cured a plurality of times. could not. In addition, there is a drawback in that the diameter of the conductive through hole cannot be reduced due to the printing misalignment caused by printing a plurality of times, and the man-hour and material cost increase.
Further, there is a drawback that bubbles are generated between the layers of the conductive paint or printing unevenness is caused by printing a plurality of times, and weak spots are formed on the strength and cracks easily occur. In addition, when printing is performed a plurality of times, the chances of causing short circuits between circuits due to the scattering of the conductive paint are increased, and the yield is deteriorated. In particular, when the through holes are small, the conductive paint is less likely to enter the through holes, thin portions of the conductive layer are likely to occur, and the possibility of disconnection increases.

【0004】従来例(ロ)では 透孔以外の箇所に付着
した導電ペイントを後から除去する必要があった。ま
た、従来例(ハ)では、従来例(イ)と同様の欠点があ
り、従来例(ニ)では、スクリーンのマスク孔に段差を
形成するのに手数がかかっていた。
In the conventional example (b), it was necessary to later remove the conductive paint attached to the places other than the through holes. Further, the conventional example (C) has the same drawbacks as those of the conventional example (A), and in the conventional example (D), it is troublesome to form a step in the mask hole of the screen.

【0005】この発明は上述の従来の技術に鑑みて成さ
れたもので、導電不良等がなく、高密度実装が可能であ
り、製造も容易で歩留まりの高い回路基板とその製造方
法を提供することを目的とする。
The present invention has been made in view of the above-mentioned conventional technique, and provides a circuit board which is free from conductive defects and the like, enables high-density mounting, is easy to manufacture, and has a high yield, and a manufacturing method thereof. The purpose is to

【0006】[0006]

【課題を解決するための手段】この発明は、絶縁基板の
両面に形成された回路パターンと、この回路パターンの
一端部に上記絶縁基板をはさんで互いに対向して形成さ
れたランドと、このランドに近接して絶縁基板に形成さ
れた透孔を有し、この透孔の絶縁基板の両面の各開口部
の内径が異なっており、この開口部のうち径の小さい方
の開口部に近い透孔内壁面がゆるやかに内側に膨出して
内径が小さくなっている小径部が形成され、この透孔及
び上記絶縁基板の両面のランドに接続し硬化した導電塗
料を備えた回路基板である。又、上記ランドは、上記導
電塗料の外側に印刷形成されたものである。
According to the present invention, there are provided a circuit pattern formed on both sides of an insulating substrate, and lands formed at one end of the circuit pattern so as to face each other with the insulating substrate sandwiched therebetween. It has a through hole formed in the insulating substrate close to the land, and the inside diameter of each opening on both sides of the insulating substrate of this hole is different, and it is close to the opening of the smaller diameter of these openings. A circuit board is provided with a small-diameter portion in which the inner wall surface of the through hole gently bulges inward to reduce the inner diameter, and is connected to the through hole and the lands on both sides of the insulating substrate and hardened conductive paint. The land is printed on the outside of the conductive paint.

【0007】また、この発明は、絶縁基板の少なくとも
片面にランドを有する回路パターンを形成し、このラン
ド形成部分の絶縁基板を打ち抜いてその絶縁基板の両面
の各開口部の内径が異なる透孔を形成し、この透孔に上
記打ち抜きの方向とは逆の方向であって内径の大きい開
口部からスクリーンを介してスキージによる塗り込みに
よって導電塗料を塗布し、この後導電塗料を硬化させて
導電スルーホールを形成する回路基板の製造方法であ
る。また、上記導電塗料の塗布及び硬化後にその絶縁塗
料に接続したランドを印刷形成する
Further, according to the present invention, a circuit pattern having a land is formed on at least one surface of an insulating substrate, the insulating substrate at the land forming portion is punched out, and through holes having different inner diameters are formed on both sides of the insulating substrate. A conductive paint is applied to the through hole through an opening with a large inner diameter in the direction opposite to the punching direction and through a screen, and then the conductive paint is cured to cure the conductive through. It is a method of manufacturing a circuit board in which holes are formed. Also, after applying and curing the conductive paint, the land connected to the insulating paint is formed by printing.

【0008】[0008]

【作用】この発明の回路基板は、絶縁基板と導電塗料と
の接合力が強くクラック等が入りにくいものであり、透
孔の径が小さくても導電塗料を塗布しやすいようにした
ものである。
The circuit board of the present invention has a strong bonding force between the insulating substrate and the conductive paint and is resistant to cracks and the like so that the conductive paint can be easily applied even if the diameter of the through hole is small. .

【0009】さらにこの発明の回路基板の製造方法は、
内径の小さい透孔に対しても容易且つ確実に導電塗料を
塗布することができるようにしたものであり、打ち抜き
によって粗面化した壁面に導電塗料が強固に付着するよ
うにしたものである。
Furthermore, the method of manufacturing a circuit board according to the present invention is
The conductive paint can be easily and surely applied to the through holes having a small inner diameter, and the conductive paint is firmly adhered to the wall surface roughened by punching.

【0010】[0010]

【実施例】以下、この発明の一実施例について図面に基
づいて説明する。図1、図2はこの実施例のスルーホー
ル回路基板の部分断面図であり、絶縁基板1の両面に銅
箔による回路パターン2が形成されており、この回路パ
ターン2の一端部はランド3になている。このランド3
は、その中央部がくり抜かれてドーナツ状になってお
り、このくり抜き部3aの直径は、絶縁基板1の各面で
わずかに異なっており、ここでは図中の直径D1,D2
は、D1<D2となっている。このくり抜き部3a内の
絶縁基板1は、打ち抜かれて透孔4が形成されている。
この透孔4はランド3のくり抜き部3aの直径D1,D
2より小さい内径に打ち抜かれており、その内径は、一
方の開口部4aの内径d1と他方の開口部4bの内径d
2の関係がd1<d2となっており、さらに基板内部の
内径は開口部4aに近い方の内径が徐々に小さくなるよ
うに壁面が膨出して小径部4cを形成している。従っ
て、この小径部4cの内径d3は、d3<d1である。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. 1 and 2 are partial cross-sectional views of a through-hole circuit board of this embodiment, in which a circuit pattern 2 made of copper foil is formed on both surfaces of an insulating substrate 1, and one end of this circuit pattern 2 is a land 3. It is This land 3
Has a doughnut-shaped central portion that is hollowed out, and the diameter of the hollowed-out portion 3a is slightly different on each surface of the insulating substrate 1. Here, the diameters D1 and D2 in the drawing are shown.
Is D1 <D2. The through hole 4 is formed by punching out the insulating substrate 1 in the hollow portion 3a.
The through holes 4 have diameters D1 and D of the cut-out portion 3a of the land 3.
The inner diameter is smaller than 2, and the inner diameter is d1 of the opening 4a on one side and the inner diameter d of the opening 4b on the other side.
The relationship of 2 is d1 <d2, and the inner diameter of the inside of the substrate further bulges so that the inner diameter closer to the opening 4a is gradually reduced to form a small diameter portion 4c. Therefore, the inner diameter d3 of the small diameter portion 4c is d3 <d1.

【0011】この透孔4には、銀、銅、ニッケル、カー
ボン等を熱硬化性樹脂又は紫外線硬化性樹脂中に含んだ
導電塗料5が塗布されており、この導電塗料5は、絶縁
基板1の両面のランド3に接続し、導電スルーホール6
を形成している。導電塗料5は、その粘度や透孔4の内
径によって図1に示すように、透孔4を塞いでしまう場
合や、図2に示すように孔ができる場合があり、一般に
粘度は10ポイズから60ポイズ程度が好ましく、電気
的性能も良好である。
A conductive paint 5 containing silver, copper, nickel, carbon or the like in a thermosetting resin or an ultraviolet curable resin is applied to the through hole 4, and the conductive paint 5 is the insulating substrate 1. Conductive through holes 6 connected to lands 3 on both sides of
Is formed. Depending on the viscosity and the inner diameter of the through hole 4, the conductive paint 5 may block the through hole 4 as shown in FIG. 1 or may have holes as shown in FIG. About 60 poise is preferable, and electrical performance is also good.

【0012】以上の構成の導電スルーホール6を有する
スルーホール回路基板の製造方法について、図3、図4
に基づいて説明する。先ず図3(A)に示すように、絶
縁基板1に回路パターン2及びランド3を形成し、ラン
ド3のくり抜き部3aのうち径の大きい方を下側にし、
図3(B)に示すように、プレス加工機にセットする。
プレス加工機のポンチ7は上側のランド3の上方に位置
し、ダイス8が下側の、径の大きいくり抜き部3aを有
するランド3の下方に位置する。
A method of manufacturing a through-hole circuit board having the conductive through-hole 6 having the above-described structure will be described with reference to FIGS.
It will be described based on. First, as shown in FIG. 3A, the circuit pattern 2 and the land 3 are formed on the insulating substrate 1, and the larger diameter of the cutout portion 3a of the land 3 is set to the lower side.
As shown in FIG. 3 (B), it is set in a press working machine.
The punch 7 of the press machine is located above the upper land 3, and the die 8 is located below the lower land 3 having the large-diameter cutout 3a.

【0013】この後、ポント7を作動させ、ランド3の
くり抜き部3aの内側の絶縁基板1を打ち抜く。この
際、図3(C)及び図1に示すように、ポンチ7とダイ
ス8との間にクリアランスをとるため、開口部4aの直
径d1より開口部4の直径d2の方が大きくなる。ま
た、打ち抜いた後、透孔4の内壁面はわずかに内側に盛
り上がって小径部4cを形成する。この小径部4cは、
せん断当初の絶縁基板1の表面近傍の組織のすべりがせ
ん断方向に対しV字状に斜めに発生し、せん断の進行に
伴ってポンチ7の径より小さい部分が外側に押しやら
れ、打ち抜きが終了するとこの押しやられた部分がわず
かに膨出することによって生じるものであり、透孔の内
径が小さい場合に顕著に現われる。
After that, the punch 7 is operated to punch out the insulating substrate 1 inside the cutout portion 3a of the land 3. At this time, as shown in FIG. 3C and FIG. 1, since a clearance is provided between the punch 7 and the die 8, the diameter d2 of the opening 4 is larger than the diameter d1 of the opening 4a. After punching, the inner wall surface of the through hole 4 slightly rises inward to form the small diameter portion 4c. This small diameter portion 4c is
Slip of the tissue near the surface of the insulating substrate 1 at the beginning of shearing occurs obliquely in a V shape with respect to the shearing direction, and as the shearing progresses, a portion smaller than the diameter of the punch 7 is pushed outward, and punching is completed. This is caused by a slight bulge of this pushed portion, and it appears remarkably when the inner diameter of the through hole is small.

【0014】次に、この絶縁基板1の透孔4に導電塗料
5を塗布する。この際、図4(A)に示すように、導電
塗料5は、ポンチ7で打ち抜いた方向と逆の方向から塗
り込まれる。この導電塗料5の塗布は、透孔4の大径の
開口部4b側の表面にスクリーン9を載せ、位置合わせ
をし、その上から導電塗料5をゴム等の弾性のあるスキ
ージ10でかき取りながら一回の操作によりスクリーン
9の透過部9aから透孔4内に導電塗料5を塗り込む。
この際、スキージ10は図示するように絶縁基板1に押
しつけて、スクリーン9との角度が先端部で小さくなる
ようにし、塗り込む圧力が高くなるようにする。する
と、図4(B)に示すように、導電塗料5は透孔4内を
通って反対側の開口部4aでわずかに広がり、ちょうど
ランド3と接続する。この際、導電塗料がランド3にま
で広がるように、基台11には逃げ部12が形成されて
いる。この基台11の形状は適宜変更できる。
Next, a conductive paint 5 is applied to the through holes 4 of the insulating substrate 1. At this time, as shown in FIG. 4A, the conductive paint 5 is applied from the direction opposite to the direction punched by the punch 7. To apply the conductive paint 5, a screen 9 is placed on the surface of the through-hole 4 on the side of the large-diameter opening 4b, the position is aligned, and the conductive paint 5 is scraped off with an elastic squeegee 10 such as rubber. On the other hand, the conductive paint 5 is applied from the transmissive portion 9a of the screen 9 into the through hole 4 by a single operation.
At this time, the squeegee 10 is pressed against the insulating substrate 1 as shown in the drawing so that the angle with the screen 9 becomes smaller at the tip end portion, and the pressure for applying is increased. Then, as shown in FIG. 4B, the conductive paint 5 passes through the through hole 4 and slightly spreads at the opening 4 a on the opposite side, and is just connected to the land 3. At this time, a relief portion 12 is formed on the base 11 so that the conductive paint spreads to the land 3. The shape of the base 11 can be changed as appropriate.

【0015】最後に、図4(C)に示すように、導電塗
料5を加熱、または紫外線により硬化させ導電スルーホ
ール6が完成する。
Finally, as shown in FIG. 4C, the conductive paint 5 is heated or cured by ultraviolet rays to complete the conductive through holes 6.

【0016】この実施例の導電スルーホール6は、近年
の高密度実装化の要請により、透孔4の径を図1のd2
の径でd2=0.8mm位に設定しており、d1はd2
より5ないし10%程度小さく設定している。そして、
ランド3のくり抜き部3aと透孔4とのすき間xは0.
05mmないし0.3mmに設定する。このように設定
すると、従来のように内径が1.5mm程度の透孔では
見られなかった透孔4内での盛り上がりが顕著になり、
ポンチ7とダイス8とのクリアランスを適度に設定する
ことにより、図示するように透孔4に丸みが生じ、透孔
4の開口部4a,4bでの角部にも丸みが生じる。これ
によって、絶縁基板1が加熱乾燥によって収縮しても角
部で導電塗料にクラックが入ったりすることがなくな
る。
The conductive through hole 6 of this embodiment has a diameter of the through hole 4 which is d2 in FIG. 1 in response to the recent demand for high density packaging.
The diameter is set to d2 = 0.8 mm, and d1 is d2
It is set about 5 to 10% smaller than that. And
The clearance x between the hollow 3a of the land 3 and the through hole 4 is 0.
Set to 05 mm to 0.3 mm. With this setting, the swelling in the through hole 4, which was not seen in the conventional through hole having an inner diameter of about 1.5 mm, becomes remarkable,
By appropriately setting the clearance between the punch 7 and the die 8, the through hole 4 is rounded as shown in the drawing, and the corners of the openings 4a and 4b of the through hole 4 are also rounded. As a result, even if the insulating substrate 1 shrinks due to heating and drying, the conductive paint is not cracked at the corners.

【0017】また、この実施例の製造方法は、導電塗料
5をスクリーン9を介して透孔4に一回の操作で塗り込
むだけなので、簡単に塗布することができる。しかも、
打ち抜き方向とは逆の方向から塗り込むので、透孔4の
開口部のうち大きい方から導電塗料が流れ込み、小径部
4cで導電塗料に圧力が加わることになり粗面である透
孔4に非常にスムーズに且つすきまなく導電塗料が充満
する。特に従来のように、ピンを挿入して塗布できない
ような小さい透孔でも、確実に塗布が可能である。
Further, in the manufacturing method of this embodiment, the conductive paint 5 is applied to the through-hole 4 through the screen 9 by one operation, so that it can be applied easily. Moreover,
Since the coating is applied from the direction opposite to the punching direction, the conductive paint flows in from the larger one of the openings of the through holes 4, and pressure is applied to the conductive paint at the small diameter portion 4c, so that the through holes 4 that are rough surfaces are extremely damaged. It is filled with conductive paint smoothly and without gaps. In particular, it is possible to reliably apply even a small through hole that cannot be applied by inserting a pin as in the conventional case.

【0018】また、本発明による回路基板は、図5と図
6(B)に示すように、片面の回路パターン21のラン
ド31が導電スルーホール6の口縁部分の導電塗料5の
上部及び外側に重ねて印刷形成されたものであってもよ
い。
Further, in the circuit board according to the present invention, as shown in FIGS. 5 and 6 (B), the land 31 of the circuit pattern 21 on one surface is the upper and outer sides of the conductive paint 5 at the edge of the conductive through hole 6. It may be formed by printing on top of.

【0019】また、その製造方法としては、図6
(A),(B)に示すように、絶縁基板1の片面にのみ
回路パターン22を形成し、そのランド32と一緒に絶
縁基板1を打ち抜いてくり抜き部3aとつづみ状の透孔
4を同時に形成し、それから前述の方法と同様にして導
電塗料5の塗り込みと硬化を行ない、その後絶縁基板1
のまだ回路パターンが形成していない面に、ランド31
が導電塗料5の上に重なるようにして回路パターン21
を印刷形成する場合もある。ここで、透孔4の穿設前に
形成する回路パターン22は絶縁基板1のいずれの面に
あっても良い。
Further, the manufacturing method is as shown in FIG.
As shown in (A) and (B), the circuit pattern 22 is formed only on one surface of the insulating substrate 1, and the insulating substrate 1 is punched out together with the land 32 to form the hollow portion 3a and the stab-like through hole 4. At the same time, the conductive coating material 5 is applied and cured in the same manner as described above, and then the insulating substrate 1 is formed.
Land 31 on the surface where the circuit pattern is not yet formed
Circuit pattern 21 so that it overlaps the conductive paint 5.
May be formed by printing. Here, the circuit pattern 22 formed before forming the through holes 4 may be on any surface of the insulating substrate 1.

【0020】さらに、図7(A),(B)に示すよう
に、絶縁基板1の両面に回路パターン2を形成し、絶縁
基板1を介して相対するランド3のくり抜き部3aを透
孔4の穿設時に併せて形成し、その後前述の方法と同様
に透孔4の大径開口部4b側から導電塗料を塗り込み、
そして硬化処理を行なう方法も可能である。
Further, as shown in FIGS. 7A and 7B, the circuit patterns 2 are formed on both surfaces of the insulating substrate 1, and the cut-out portions 3a of the lands 3 facing each other through the insulating substrate 1 are provided with the through holes 4. Is also formed at the time of drilling, and then the conductive paint is applied from the large-diameter opening 4b side of the through hole 4 in the same manner as described above,
A method of carrying out a curing treatment is also possible.

【0021】上記二例の製造方法においてはランド3の
くり抜き部3aを透孔4の穿設時に併せて形成するもの
であるから、予めくり抜き部3aを形成する工程が省略
できる。
In the manufacturing method of the above two examples, since the hollow portion 3a of the land 3 is also formed when the through hole 4 is formed, the step of forming the hollow portion 3a in advance can be omitted.

【0022】尚、この発明の回路パターンは、銅箔ばか
りでなく、導電塗料を印刷した回路パターンでも良い
し、また従来行なわれている他の方法により形成したも
のでも良い。さらに、導電塗料の増量も任意に設定し得
るものであり、粘度や塗布の際のスキージの角度や速さ
も透孔の径等に合わせて適宜設定すれば良い。
The circuit pattern of the present invention may be not only a copper foil but also a circuit pattern printed with a conductive paint, or may be formed by another method which has been conventionally used. Further, the amount of the conductive paint can be arbitrarily set, and the viscosity and the angle and speed of the squeegee at the time of application may be appropriately set according to the diameter of the through hole and the like.

【0023】また、透孔をパンチングにより形成した落
ち、透孔の形状を整えるために、ドリルで角を落とした
り小径部をわずかに削ったりすること等も適宜可能であ
り、導電塗料の塗布を容易にするため等の加工は任意に
なし得るものである。
It is also possible to drop the corners with a drill or slightly scrape the small diameter portion in order to adjust the shape of the through holes formed by punching the through holes, and to apply the conductive paint. Processing such as facilitation is optional.

【0024】[0024]

【発明の効果】この発明の回路基板は、絶縁基板の透孔
の内部にふくらみを持たせるようにしたので、導電塗料
にクラックが生じたり剥離したりすることがない。従っ
て、導電性スルーホールの検査を表裏面からの外観目視
のみによって行なっても支障がなく、回路基板の製造工
程や部品の実装工程での歩留まりが向上し、回路基板の
信頼性も高くなる。また、この発明の回路基板の製造方
法は、絶縁基板の透孔の打ち抜き方向とは逆の方向から
導電塗料を塗り込んでいるので、透孔の開口部のうち広
い方から1回の印刷でスムーズに導電塗料が流れ込み、
極めて小さい透孔に対しても導電塗料の塗布が可能であ
る。これによって、導電スルーホールの小径化が可能で
あり、回路基板の実装密度の向上を図ることができると
共に、回路基板の生産性を顕著に高め得る。
Since the circuit board of the present invention has a bulge inside the through hole of the insulating substrate, the conductive paint is not cracked or peeled off. Therefore, there is no problem even if the inspection of the conductive through holes is performed only by visually observing the appearance from the front and back surfaces, the yield in the manufacturing process of the circuit board and the mounting process of components is improved, and the reliability of the circuit board is also increased. Further, in the method for manufacturing a circuit board according to the present invention, the conductive paint is applied from the direction opposite to the punching direction of the through holes of the insulating substrate, so that the printing can be performed once from the widest opening of the through holes. Conductive paint flows in smoothly,
Conductive paint can be applied to even extremely small holes. As a result, the diameter of the conductive through hole can be reduced, the packaging density of the circuit board can be improved, and the productivity of the circuit board can be significantly improved.

【図面の簡単な説明】[Brief description of drawings]

【図1】この発明の第一実施例の回路基板の部分断面図
である。
FIG. 1 is a partial sectional view of a circuit board according to a first embodiment of the present invention.

【図2】この発明の第一実施例における導電スルーホー
ルの他の状態を示す部分断面図である。
FIG. 2 is a partial cross-sectional view showing another state of the conductive through hole in the first embodiment of the present invention.

【図3】この発明の第一実施例の回路基板の製造工程を
示す部分断面図である。
FIG. 3 is a partial cross-sectional view showing the manufacturing process of the circuit board according to the first embodiment of the present invention.

【図4】この発明の第一実施例の回路基板の製造工程を
示す部分断面図である。
FIG. 4 is a partial cross-sectional view showing the manufacturing process of the circuit board according to the first embodiment of the present invention.

【図5】この発明の回路基板の他の実施例における導電
スルーホール部分の断面図である。
FIG. 5 is a sectional view of a conductive through hole portion in another embodiment of the circuit board of the present invention.

【図6】この発明の回路基板の製造方法の他の実施例に
おける主要な作業工程を示す部分断面図である。
FIG. 6 is a partial cross-sectional view showing main work steps in another embodiment of the method for manufacturing a circuit board according to the present invention.

【図7】この発明の回路基板の製造方法のさらに他の実
施例における主要な作業工程を示す部分断面図である。
FIG. 7 is a partial cross-sectional view showing main work steps in still another embodiment of the method for manufacturing a circuit board of the present invention.

【符号の説明】[Explanation of symbols]

1 絶縁基板 2,21,22 回路パターン 3,31,32 ランド 4 透孔 4a,4b 開口部 4c 小径部 5 導電塗料 6 導電スルーホール 9 スクリーン 10 スキージ 1 Insulating Substrate 2, 21, 22 Circuit Pattern 3, 31, 32 Land 4 Through Hole 4a, 4b Opening 4c Small Diameter 5 Conductive Paint 6 Conductive Through Hole 9 Screen 10 Squeegee

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】 絶縁基板の両面に形成された回路パター
ンと、この回路パターンの一端部に上記絶縁基板をはさ
んで互いに対向して形成されたランドと、このランドに
近接して絶縁基板に形成された透孔を有し、この透孔の
絶縁基板の両面の各開口部の内径が異なっており、この
開口部のうち径の小さい方の開口部に近い透孔内壁面が
ゆるやかに内側に膨出して内径が小さくなっている小径
部が形成され、この透孔及び上記絶縁基板の両面のラン
ドに接続し硬化した導電塗料を備えたことを特徴とする
回路基板。
1. A circuit pattern formed on both sides of an insulating substrate, lands formed on one end of the circuit pattern so as to face each other with the insulating substrate sandwiched between the circuit pattern, and an insulating substrate close to the land. There is a formed through hole, the inner diameter of each opening on both sides of the insulating substrate of this through hole is different, and the inner wall surface of the through hole close to the opening of the smaller diameter is gently inside. A circuit board, characterized in that a small-diameter portion having a small inner diameter is formed by swelling to the through hole and a conductive paint which is hardened by being connected to the lands on both sides of the insulating board.
【請求項2】 上記ランドは、上記導電塗料の外側に印
刷形成されたものである請求項1記載の回路基板。
2. The circuit board according to claim 1, wherein the land is formed by printing on the outside of the conductive paint.
【請求項3】 絶縁基板の少なくとも片面にランドを有
する回路パターンを形成し、このランド形成部分の絶縁
基板を打ち抜いてその絶縁基板の両面の各開口部の内径
が異なる透孔を形成し、この透孔に上記打ち抜きの方向
とは逆の方向であって内径の大きい開口部からスクリー
ンを介してスキージによる塗り込みによって導電塗料を
塗布し、この後導電塗料を硬化させて導電スルーホール
を形成する回路基板の製造方法。
3. A circuit pattern having a land is formed on at least one surface of an insulating substrate, and the insulating substrate at the land forming portion is punched out to form through holes having different inner diameters on the both sides of the insulating substrate. A conductive paint is applied to the through hole by a squeegee through a screen from an opening having a large inner diameter in a direction opposite to the punching direction, and then the conductive paint is cured to form a conductive through hole. Circuit board manufacturing method.
【請求項4】 上記導電塗料の塗布及び硬化後にその絶
縁塗料に接続したランドを印刷形成する請求項3記載の
回路基板。
4. The circuit board according to claim 3, wherein a land connected to the insulating paint is formed by printing after applying and curing the conductive paint.
JP7081820A 1995-03-13 1995-03-13 Circuit board and its manufacturing method Expired - Fee Related JP2775715B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7081820A JP2775715B2 (en) 1995-03-13 1995-03-13 Circuit board and its manufacturing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7081820A JP2775715B2 (en) 1995-03-13 1995-03-13 Circuit board and its manufacturing method

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP63184063A Division JP2610036B2 (en) 1988-07-23 1988-07-23 Circuit board

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP9252867A Division JP3068530B2 (en) 1997-09-01 1997-09-01 Circuit board manufacturing method

Publications (2)

Publication Number Publication Date
JPH07302962A true JPH07302962A (en) 1995-11-14
JP2775715B2 JP2775715B2 (en) 1998-07-16

Family

ID=13757131

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7081820A Expired - Fee Related JP2775715B2 (en) 1995-03-13 1995-03-13 Circuit board and its manufacturing method

Country Status (1)

Country Link
JP (1) JP2775715B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104272882A (en) * 2012-06-08 2015-01-07 住友电气工业株式会社 Flexible printed wiring board and method for producing flexible printed wiring board
TWI503057B (en) * 2012-01-04 2015-10-01 Inktec Co Ltd Manufacturing method of double-sided printed circuit board

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4914977A (en) * 1972-05-22 1974-02-08
JPS5660093A (en) * 1979-10-19 1981-05-23 Matsushita Electric Ind Co Ltd Method of manufacturing bothhside printed circuit board
JPS6243200A (en) * 1985-08-20 1987-02-25 日本シイエムケイ株式会社 Manufacture of printed wiring board

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4914977A (en) * 1972-05-22 1974-02-08
JPS5660093A (en) * 1979-10-19 1981-05-23 Matsushita Electric Ind Co Ltd Method of manufacturing bothhside printed circuit board
JPS6243200A (en) * 1985-08-20 1987-02-25 日本シイエムケイ株式会社 Manufacture of printed wiring board

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI503057B (en) * 2012-01-04 2015-10-01 Inktec Co Ltd Manufacturing method of double-sided printed circuit board
US10080299B2 (en) 2012-01-04 2018-09-18 Inktec Co., Ltd. Manufacturing method of double sided printed circuit board
CN104272882A (en) * 2012-06-08 2015-01-07 住友电气工业株式会社 Flexible printed wiring board and method for producing flexible printed wiring board

Also Published As

Publication number Publication date
JP2775715B2 (en) 1998-07-16

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