JPH07282406A - Data reproducing circuit and magnetic disk device - Google Patents

Abstract

PURPOSE:To enable setting gain control of an AGC amplifier suitable for reducing power consumption of a magnetic disk device, an output dynamic range of an analog amplifier, an output sync current and signal amplitude by providing a current source control circuit of an analog amplifier and a power source changeover switch. CONSTITUTION:This device is provided with a current source control circuit 137 which can vary bias voltage controlling a current value of a current source of an analog amplifier section 101 including an AGC amplifier, and a power source changeover switch 139 selecting power source voltage. Thereby, an output sync current of the analog amplifier section 101 can be arbitrarily set, and an output dynamic range is adjusted. Also, at the time of starting of the magnetic disk, non-recording, and the like, power consumption is reduced by adjusting an output sync current of the analog amplifier section 101 including an AGC amplifier to the extent in which data is reproduced and a reproduction error is not caused.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an analog amplifier and an automatic voltage gain control amplifier (AGC amplifier).
The present invention relates to an analog amplifier and an automatic voltage gain control amplifier (AGC amplifier) in a data reproduction signal processing circuit of a magnetic disk device.

[0002]

2. Description of the Related Art As a conventional analog amplifier and AGC amplifier used in a magnetic disk data reproduction processing system, there is a technique described in Japanese Patent Laid-Open No. 04-003370. In the AGC amplifier according to the related art, the power supply voltage and the current value of the current source are fixed.

In general, the error occurrence rate at the time of reproducing data of a magnetic disk device largely depends on the amplitude value of a signal output through an analog amplifier and an AGC amplifier used in a data reproducing processing circuit, and usually, The larger the signal amplitude, the lower the error rate and the higher the reliability. The reason for this is that, regarding the signal amplitude value, the analog signal of the data at the time of data reproduction is affected by noise, which induces peak shift, data bubbling, and loss, which are the causes of data reproduction errors. Therefore, it is more advantageous to increase the signal amplitude with respect to noise in terms of error rate during data reproduction.

It is well known that it is necessary to increase the output dynamic range of the analog amplifier and the AGC amplifier in order to increase the signal amplitude. Therefore, in order for the magnetic disk drive to achieve stable high-level data reproduction with a high error rate in all operating environments and all recording tracks, the maximum output dynamic range of the analog and AGC amplifiers that make up the data reproduction circuit is required. Should be set relatively large, and the signal amplitude passing through the signal circuit of the data reproduction processing system should be set relatively large (more than necessary). However, the fact that the analog amplifier and the AGC amplifier obtain a high dynamic range shows that the analog amplifier and the AGC amplifier require higher power supply voltage and current, and thus the energy (power consumption) is wasted. In this way, increasing the dynamic range and output signal amplitude requires higher power supply voltage and current consumption, which is disadvantageous in terms of low power consumption. Therefore, the minimum power supply voltage and current consumption are required. It is desired to achieve the target error rate.

[0005]

DISCLOSURE OF THE INVENTION In the prior art,
It operates with the power supply voltage within the specified range.
This is only for the purpose of guaranteeing the operation, and the performance of the analog amplifier and the AGC amplifier cannot be optimized by arbitrarily (intentionally) setting the power supply voltage and the current source current. In addition, the maximum output dynamic range changes depending on the change in the power supply voltage depending on the configuration of the analog amplifier and AGC amplifier, but this change in the maximum dynamic range is caused by an accidental change in the operating environment of the analog amplifier and AGC amplifier. However, it is not intended to optimize the performance of analog amplifiers and AGC amplifiers.

An object of the present invention is to improve the error rate and reduce the power consumption of the data reproducing circuit in the magnetic disk device or the data reproducing circuit thereof.

Another object of the present invention is to make it possible to arbitrarily set the maximum output dynamic range and signal amplitude in an analog amplifier or AGC amplifier used in a data reproducing circuit or the like.

[0008]

In order to solve the above problems, the present invention provides an input section for inputting a signal, an amplification section for amplifying a signal input to the input section, and a signal amplified by the amplification section. Waveform reshaping circuit for reshaping the waveform of the signal, a decoding unit for decoding the signal shaped by the waveform reshaping circuit into data, and an error correction circuit for performing error correction on the data decoded by the decoding unit. as,
The controller further controls the waveform shaping circuit based on an error correction result in the error correction circuit, and the waveform shaping circuit has a current source and an AGC whose gain is controlled.
Amplifier and AGC for controlling the gain of the AGC amplifier
A control circuit, and the AGC amplifier includes an amplifier unit whose dynamic range changes according to a current value of the current source, an input unit which receives a current control signal for controlling the current value of the current source, and the input unit. And a current source control unit that controls the current value of the current source in the amplifier unit based on the current control signal received by the control unit, and the control unit outputs the current control signal in order to control the waveform shaping circuit. To do.

Further, a magnetic head portion for reading and writing signals from and to a magnetic disk, an amplifying portion for amplifying the signal read by the magnetic head portion, and a waveform shaping for shaping the waveform of the signal amplified by the amplifying portion. In the error correction circuit, a magnetic disk device having a circuit, a decoding unit that decodes the signal shaped by the waveform shaping circuit into data, and an error correction circuit that performs error correction on the data decoded by the decoding unit The waveform shaping circuit further includes a control unit that controls the waveform shaping circuit based on an error correction result, and the waveform shaping circuit includes a current source and has a gain controlled AG.
C amplifier and AG for controlling the gain of the AGC amplifier
A C control circuit and an analog amplifier having a current source for amplifying an input signal, wherein the AGC amplifier and the analog amplifier have an amplifier unit whose dynamic range changes according to a current value of the current source, and the current source. An input section that receives a current control signal for controlling the current value of the current source, and a current source control section that controls the current value of the current source in the amplifier section based on the current control signal received by the input section, The control section outputs the current control signal to control the waveform shaping circuit.

[0010]

In the analog amplifier, the input section receives from the outside a current control signal for controlling the current value of the current source.
The current source control unit controls the current value of the current source in the amplifier unit based on the current control signal received by the input unit. The amplifier unit is controlled by the current value of the current source and can change the dynamic range. The input unit further receives a voltage control signal for controlling the power supply voltage value in the power supply voltage unit from the outside, and the power supply voltage unit supplies the power supply voltage to the amplifier unit by the voltage control signal received by the input unit. Change the value. By doing so, the maximum output dynamic range and the signal amplitude can be arbitrarily set.

Further, the gain of the amplifier section is made variable, an amplitude control signal for setting the amplitude in the amplifier section is inputted, and a gain control section for generating a control voltage for controlling the gain of the amplifier section by the amplitude control signal. By having, the AGC amplifier can be configured.

Further, by providing such an analog amplifier in the magnetic disk device or the data reproducing circuit thereof, power consumption can be reduced.

In the case of a magnetic disk device, etc.,
By having a control unit that controls the waveform shaping circuit based on the error correction result in the error correction circuit, in the control unit, when the magnetic disk device is started, by reading a signal from the magnetic disk by the magnetic head, The current control signal and the voltage control signal are generated and output based on the error correction result of the read signal. For example, when there is a reproduction error, the current control signal is output so as to increase the current value of the current source. In addition, when increasing the current value of the current source, the control unit increases the current value of the current source when the current value when the current value is increased is equal to or more than a predetermined specified value. Instead of outputting the control signal, the voltage control signal increases the power supply voltage value in the power supply voltage section. Thus, the AGC amplifier and the analog amplifier can be set.
Further, the control unit may set the optimum current control signal and voltage control signal for each zone of the magnetic disk or each magnetic head at the time of initial setting. Also, the optimum current control signal and voltage control signal may be set for each recording track of the magnetic disk or for each recording cylinder that is an assembly of a plurality of recording tracks located concentrically. Further, even during non-recording and non-seek, the optimum current control signal and voltage control signal may be set by reading a signal from the magnetic disk by the magnetic head.

By doing so, in the magnetic disk device or the data reproducing circuit thereof, low power consumption can be achieved within a range where no error occurs.

[0015]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A first embodiment of the present invention will be described below with reference to FIGS. FIG. 1 shows the configuration of a basic amplifier which is the core of the analog amplifier in this embodiment. In FIG. 1, the analog amplifier includes an analog amplifier unit (101) whose dynamic range changes according to the current value of a current source, and a current source control unit (a current source control unit for controlling the current value of the current source in the amplifier unit based on a current control signal ( 102)
And a power supply voltage unit (160) for varying the power supply voltage value for supplying power to the analog amplifier unit (101), a current control signal for controlling the current value of the current source, and a voltage control signal for controlling the power supply voltage value. And an input unit (150) for receiving from the outside. The analog amplifier section (101) includes an amplifier (103) for amplifying an input signal and a current source control section for limiting the amplitude.
An output stage (104) for limiting and outputting the amplified signal according to the current source setting bias voltage from (102). The current source control unit (102) generates a bias voltage generation circuit (105) that sets a current source setting bias voltage, a current value (134) sent from a hard disk controller (hereinafter abbreviated as HDC) (136), and a reference bias generation. A comparator (106) that compares the emitter potential (132) of the bipolar transistor (119) of the circuit (105), and a digital-analog conversion circuit that converts the current value held in the register (108) into an analog value (hereinafter , DAC) and a current source control DAC (10
7) is provided. The input section (150) is provided with a register (108) for inputting and holding the current value and voltage data sent from the HDC (136). The power supply voltage unit (160) includes a connection terminal (140/141) that is connected to a plurality of power supplies having different power supply voltage values, and a selection unit that selects one of the plurality of power supplies according to the voltage control signal. Equipped with. The selection section
A power supply voltage selection circuit (144) and a power supply switch (139) are provided.

The amplifier (103) comprises three bipolar type transistors (110) and (111) and five resistors (109), (112) and (135), and the output stage (104) is It comprises four bipolar transistors (113) and (114) and two resistors (115). The bias voltage generation circuit (105) for the analog amplifier in the current source control unit (102) has two MO
S-type transistors (116) and (117), bipolar type transistors (118) and (119), and resistors (120) and (121)
The comparator (106) includes four MOS type transistors (123), (124), (125) and (126) and one resistor.
(122) is provided. Also, power switch (139)
Selects the power supply voltage to be supplied to the analog amplifier section (101) of the analog amplifier. As a power supply voltage, in Figure 1, although an example in which comprises two of V _cc1 V _cc2, 3
You may make it provide two or more power supply voltages. The power supply voltage is generated by the power supply voltage selection circuit (144) according to the voltage data sent from the HDC (136), the power supply voltage signal (143) is generated, and the power supply changeover switch (139) is controlled to make the selection.

The HDC (136) is a current value (current control signal) for controlling the amplification factor in the analog amplifier section (101).
And voltage data (voltage control signal) for selecting a power supply voltage for limiting the dynamic range in the analog amplifier section (101). The HDC (136) is provided with a table (170) that stores an initial value or a preset value as current value and voltage data (134).

Next, the operation of this circuit will be described.

In FIG. 1, first, the register (108) is
HD, a magnetic disk controller for hard disks
The current value (134) sent from C (136) is received and stored.
Next, the current source control DAC (107) converts the register setting value (128), which is the current value (134) held in the register (108), into an analog value, and sets the current source setting reference voltage (133). ) Is generated and given to the comparator (106). Comparator (106)
Is the base potential of the bipolar transistor (119) at all times so that the emitter potential (132) of the bipolar transistor (119) of the reference bias generation circuit (105) and the reference voltage (133) for setting the current source are equal. Control (131). The reference bias generation circuit (105) consists of a current source setting reference voltage (133) output from the current source setting DAC (107), an emitter potential (132) and a resistor (121) of the same potential bipolar transistor (119). A current is generated from and the current equivalent to the current is passed through the transistor (118) and the resistor (120) through the current mirror circuit composed of the MOS type transistors (116) and (117), Generate a source set bias voltage (130). The current source setting bias voltage (130) generates the current of the current source of the output stage (104) of the analog amplifier section (101) composed of the bipolar transistor (114) and the resistor (115), and the current is analog. It becomes the output sink current of the amplifier section (101). The current source setting bias voltage (130) also generates the current of the current source of the amplifier (103) composed of the bipolar transistor (111) and the resistor (112), and the current and the resistor (109) and the power supply voltage are also generated. By the analog amplifier section
Amplifier that controls the maximum output dynamic range of (101)
Collector potential of bipolar transistor (110) of (103)
Determine (138).

As described above, in the configuration shown in FIG.
The dynamic range and output sink current can be adjusted by switching between the current of the current source and the power supply voltage. That is, by providing the analog amplifier with a circuit that can change the bias voltage that governs the current value of the current source and a switch that selects the power supply voltage, the output dynamic range and output sink current of the analog amplifier can be set arbitrarily. You can

Next, the output signal amplitude does not depend on the change of the input signal amplitude, and the output signal amplitude can be kept almost constant.
Regarding the circuit configuration of AMP (Auto Gain Control Amplifier),
This will be described with reference to FIG. In the case of the configuration shown in FIG. 1, since the gain of the amplifier (103) of the analog amplifier (101) is almost fixed, the input signal amplitude V _IN (127) of the amplifier (103) is limited by the output dynamic range. , AGC AMP, the output signal amplitude can be kept almost constant.

FIG. 4 is a diagram showing a circuit configuration of an AGC AMP and an AGC control circuit having the basic amplifier shown in FIG. 1 as a core. The AGC AMP (302) can set an arbitrary gain by the potential difference between the AGC reference voltage VREF (320) and the AGC control voltage VAGC (319). The AGC AMP (302) includes a gain control amplifier (hereinafter abbreviated as GCA) (404) and an output stage (405). A
The GC control circuit (305) is intended to generate VREF (320) and VAGC (319) for gain control of the AGC AMP (302). Signal amplitude setting slice level generation circuit (321)
Is a slice level VSH (431), VSL (432) indicating a desired value of the signal amplitude value of the AGC control circuit input signal (327), and
Bias of AGC input signal (327) full-wave rectified signal VCOM (430)
To generate. The AGC control circuit (305) uses the slice level VSH
(431) or VSL (432) and the full-wave rectified signal (433) signal amplitude difference is converted into electric charge, and the electric potential generated by charging / discharging electric charge to the capacitor (335) is used for AGC control The voltage VAGC (319) is generated.

Next, the operation of the circuit shown in FIG. 4 will be described. First, the HDC (136) sends the current value (134) to the register (108). The register (108) is for the current value (13
Store 4). Next, the current source control circuit (107) generates a current source setting reference voltage (133) from the register value (128) sent from the register (107). The current source circuit (137) generates the current source setting bias voltage (130) from the current source setting reference voltage (133), and the current value and output sink of the GCA current source (406) that controls the maximum output dynamic range. The current value of the output stage current source (407) that controls the current is set. The signal amplitude setting DAC (311) also generates a signal amplitude setting level (325) from the register value (128). Next, the comparator (419) of the signal amplitude setting slice level generation circuit (321) makes the emitter potential (435) of the bipolar transistor (426) equal to the signal amplitude setting level (325). The resistor (434) generates a current from the emitter potential (435) of the bipolar transistor (426) having the same potential as the signal amplitude setting level (325), and via the bipolar transistor (426), the resistor (423), (424),
Resistance (423), (424), (425)
Electric potential is generated at the lower end of each. Resistance (423), (424),
The potential generated at the lower end of (425) is impedance-converted by bipolar type transistors (420), (421), (422), respectively, and VCOM (430) which is the bias potential of the full-wave rectified signal (433) and slice Levels are VSL (431), VSH (43
2) are converted respectively. The charge comparator (409) of the AGC control circuit (305) is the input signal (327) of the AGC control circuit.
The full-wave rectified signal (433) and the slice level VSH (431) are compared, and the charge control switch (413) is turned on only for the time when the full-wave rectified signal amplitude exceeds the slice level VSH (431) to turn on the charging current. The current of the source (411) is passed through the capacitor (335) to charge the electric charge. Further, the discharge comparator (410) of the AGC control circuit (305) is configured to detect the full-wave rectified signal (433) of the input signal (327) of the AGC control circuit and the slice level V.
SL (432) is compared, and the discharge control switch (414) is turned on only for the time when the amplitude of the full-wave rectified signal (433) exceeds the slice level VSL (432), and the discharge current source
By discharging the current of (412) from the capacitor (335), the electric charge is discharged. AGC control voltage VAGC (31
9) is obtained by passing the potential generated in the capacitor (335) through the VAGC output amplifier (418). Also, the AGC reference voltage VREF (320) is a fixed potential, and the VREF generation voltage source (41
The potential of 5) is obtained via the VREF output amplifier (417).

The AGC AMP (302) side operates as follows. First, the current source control DAC (107) generates a current source setting reference voltage (133) from the register value (128). Next, the current source control circuit (137) sets the current source setting reference voltage (13
Generate the current source setting bias (130) from (3) and use the AGC AMP (30
2) GCA (404) current source (406) and output stage (405) current source (40
7) Set the current with. The current of the current source (406) of this GCA (404) and the power supply voltage are the maximum output dynamic range of the AGC AMP (302), and the current of the current source (407) of the output stage (405) is AGC AM.
Determine the output sink current of P (302). At this time, AGC AMP
(302) maximum output dynamic range and AGC control circuit (30
5) AGC AMP obtained as a result of gain setting of AGC AMP (302)
The output signal amplitude value of (301) is set to the same level.

Also, the HDC (136) uses the maximum dynamic range of the analog amplifier (101) and A when generating the current value.
An appropriate power supply voltage is judged from the signal amplitude set by the GC control circuit (305), and it goes through the register (108) and power supply voltage selection circuit, and then the power supply selector switch
Select the power supply that feeds (101) and AGC AMP (302).
The reason why this power supply is selected is that a lower power supply voltage is more advantageous in terms of low power consumption. Therefore, the output dynamic range has a sufficient margin with respect to the signal amplitude, and the maximum dynamic range is the power supply voltage. Rather, when it depends on the current value of the current source, a low-voltage power source should be used.

In this way, by providing a circuit that can arbitrarily set the slice level of the AGC control circuit that determines the gain of the AGC AMP, the amplitude of the signal passing through the analog amplifier including the AGC AMP can be arbitrarily set. It can be possible.

FIG. 14 shows a time chart in the circuit shown in FIG. As shown in FIG. 14, during normal operation, the AGC control circuit (305) controls the gain of the AGC AMP (302) so that the charge amount (1401) and the discharge amount (1402) become equal. Next, when a decoding error occurs in the 1'st trial portion, the HDC (136) uses AGCOUTX, Y (≈CNTLIN) to eliminate the error.
(X, Y) amplitude is increased to improve the decoding condition.
As the method, the HDC (136) uses the register (10
The power supply voltage selection signal (143) and the current source setting reference voltage (133) held in 6) are updated. Vcc (431) and VSL (432) which are Vcc and signal amplitude setting slices
Are reset when the register (106) is updated. In this process, AGCOUTX, Y (≈CNTLINX,
The amplitude of Y) is increased, the noise resistance is improved, and the error rate can be improved. AGC capacitor potential (1
403) is AGCAmp. When the AGC capacitor potential (1403) becomes low due to the voltage for generating the control voltage (319), AG
CAmp. Gain increases.

Next, the reproducing process of the magnetic disk device will be described with reference to FIGS. 2, 3 and 5. Figure 5
4 shows the configuration of the reproduction data processing system of the magnetic disk device in the present embodiment, the control flow of the HDC (136) for controlling the magnetic disk device is shown with reference to FIG. 2, and FIG. 3 and FIG.
When the AGC AMP (302) and AGC control circuit (305) shown in FIG. 1 and the analog amplifier shown in FIG. 1 are used in a data reproducing system circuit of a magnetic disk device, a waveform shaping circuit which is a part of the data reproducing system circuit. The circuit configuration of is shown.

In FIG. 5, the magnetic disk (501) records and holds data. The magnetic head (502) records / reproduces data on / from a magnetic disk. Head AMP (Head Am
The plifier) (512) amplifies the head read signal (503) read from the magnetic disk by the magnetic head and generates an AGC AMP input signal. Waveform shaping circuit (301) is Head AMP (512)
The waveform of the signal amplified by is shaped and the read data pulse (331) synchronized with the peak point of the AGC AMP input signal is generated. The PLL (Phase Locked Loop) circuit (504) converts the read data pulse (331) to the read data (505) and the read clock.
(506) and are generated. The Decoder (507) generates NRZ demodulated data (508) from the read data and the read clock (506). The error correction circuit (509) detects and corrects an error in the NRZ demodulated data (598). (510) is the MPU (Micro
It is a processor unit) and controls the entire magnetic disk (501) in the present embodiment.

Next, referring to FIG. 2, an error correction circuit
The operation flow of the HDC (136) composed of (509) and MPU (510) will be described. The HDC (136) sets the maximum output dynamic range of the analog amplifier and the AGC AMP, the current value and the voltage data (134) that determine the sink current and the signal amplitude value. In this embodiment, the current value and voltage data (134) of the analog amplifier and the AGC AMP are set so as to be always optimum during data recording (ID reproduction) / reproduction.

In FIG. 2, first, during seek operation in which the magnetic head moves to a desired recording track and cylinder for recording / reproducing data, an analog amplifier and AG are used.
Without setting / updating the current value and voltage data (134) of C AMP (302), after the seek operation is completed, the current value and voltage data (134) corresponding to the recorded track after the seek operation is changed to a known or initial value. (Step 802). The current value and voltage data (134) is set by referring to a table (170) provided in the control section and storing the current value and voltage data. As the initial value, the minimum value that can be set as the current value and the voltage data is set. After that, it is judged whether or not it is data reproduction (step 803), and if it is data reproduction (yes direction of step 803), the data is reproduced and the HDC (136) corrects the error in the reproduction data. Judgment is made from the result of the circuit (509) (step 805). When the error correction circuit (509) detects an error, the current value of the analog amplifier and AGC AMP (13
4) is incremented (step 806), analog amplifier and AGC AMP
And increase the dynamic range, output sink current and signal amplitude. Next, the HDC (136) determines whether or not the current value is equal to or more than the specified value (step 807), and the current value (134)
From the dynamic range of each amplifier compared to the signal amplitude,
When it is sufficiently large (when the current value is equal to or less than the specified value) (step 807: no direction), the reproduction is continued without changing the voltage data. In addition, when the dynamic range of each amplifier is smaller than the signal amplitude from the current value (134) (when the current value is the specified value or more) (yes direction of step 807), change to increase the voltage data. (Step 808) and try to reproduce the data again. The above operation is repeated as long as a reproduction error occurs, and as a result, the obtained current value and voltage data (134) is stored and updated (step 815). Further, when recording data (no direction in step 803), as the reproducing operation, only the reproduction of the ID portion for recording the physical information of the recording sector is performed (step 809), and the ID is the same as the data reproducing.
The presence or absence of a reproduction error in the partial data is monitored (step 81
0), thereby determining the current and voltage data (134) (step 811, step 812, step 813 and step 814).

FIG. 3 shows a configuration diagram in which the present invention is applied to a part of a data reproducing system circuit of a magnetic disk device. In FIG. 3, a waveform shaping circuit (301) for converting a data reproduction analog signal into a digital pulse signal is shown, which is provided with an AGC AMP. AGC AMP (302) is AGC
The gain can be set to an arbitrary value by the potential difference between the control voltages VAGC (319) and Vref (320). BUF AMP (Buffer Amplifi
er) (304) drives the circuit at the subsequent stage. AGC control circuit
(305) monitors the reproduced analog signal amplitude and adjusts the reproduced analog signal amplitude so that the reproduced analog signal amplitude has a desired amplitude value.
VAGC (319) and VREF (320) that control the gain of 2) are generated. A DIF AMP (Differential Amplifier) (306) differentiates the analog signal to generate a differential signal (329) of the data reproduction waveform. LINAMP (Linear Amp) (307) is the differential signal A
A peak detection pulse (330) is generated at the C ground passing timing. A GATE GEN (Gate Generator) (309) generates a gate signal (332) used for avoiding false detection of peaks due to noise or springing. READ PULSE GEN (Read Pul
The se generator) (308) generates a read pulse from the peak detection pulse (330) and the gate signal (332). Further, an equalizing circuit (hereinafter abbreviated as EQ) (333) for generating a signal used for equalizing is provided. A low pass filter (hereinafter abbreviated as LPF) (334) removes low frequency noise of the equalizing signal (316) after equalizing. The capacitor (335) converts the difference between the amplitude value of the BUF signal (318) output from the BUF AMP (318) and the signal amplitude setting level into electric charge and charges it.

Next, the operation of the waveform shaping circuit (301) will be described. First, the HDC (136) sends a current value and voltage data (134) to the register (108) of the waveform shaping circuit (301) according to the flow shown in FIG. And voltage data (134) is stored and held. Next,
The signal amplitude setting DAC (311) generates a signal amplitude setting level (325) that is an analog voltage level from the register setting value (128) that is the current value (326) held in the register (108). From this signal amplitude setting level (325), the signal amplitude setting level generation circuit (321) changes the full-wave rectification bias VCOM (430).
And signal amplitude setting slice levels VSH (431) and VS
L (432) is generated and sent to the AGC control circuit (305). As described above, the AGC control circuit (305) controls the gain of the AGC AMP (302) from the signal amplitude setting slice level (322) so that the signal amplitude of the AGC control circuit input signal (327) becomes a desired value. To control.

In addition, the analog amplifier AGC AMP (30
2) The output dynamic range and output sink current of the BUF AMP (304) and DIF AMP (306) are set as follows. First, the current source control DAC (107) is
Current value and current value of voltage data (134) held in the register setting value (128) to the current source setting reference voltage (13
3) is generated. The current source control circuit (137) generates a current source setting bias (130) from the current source setting reference voltage (133), and supplies it to the AGC AMP (302), BUF AMP (304) and DIF AMP (306). Apply current source setting bias. AGC AMP (302), BUF A
MP (304) and DIFAMP (306) are current source setting bias (13
From 0), set the maximum output dynamic range and output sink current for each. In addition, the power supply voltage selection circuit (1
44) generates the power supply voltage selection signal (143) from the current value and the register setting value (142) of the voltage data (134) held in the register (108), and the V
Select either cc1 (140) or Vcc2 (141) power supply.

According to the above embodiment, the maximum output dynamic range, the output sink current and the signal amplitude value of the analog amplifier such as the AGC amplifier of the data reproducing system circuit of the magnetic disk device can be set arbitrarily. Since the power consumption of the magnetic disk device can be optimized while maintaining the reliability of the data at the time of data reproduction, the optimum power consumption can be reduced.

Further, by reducing the output sink current of the analog amplifier to the extent that a data reproduction error does not occur at the time of starting the magnetic disk and at the time of non-recording / non-seek, a low level suitable for the operating environment of the magnetic disk device is obtained. Power consumption can be reduced.

In the above embodiment, the optimum value is detected by setting the initial values of the current value and the voltage data to the minimum values and increasing them to the value at which no error occurs. In addition, the initial value of the current value and the voltage data may be set to the maximum value and reduced to the value at which the error occurs, so that the value immediately before the error occurs may be detected as the optimum value.

Next, the second embodiment will be described with reference to FIGS.
And it demonstrates using FIG.

The magnetic disk in this embodiment has a CDR (C
An onstant recording method is used, and the magnetic disk (501) is divided into an outer peripheral zone (601) and an inner peripheral zone (602) for control, as shown in FIG.

FIG. 8 shows a control flow of the HDC (136) of this embodiment. In this embodiment, when the magnetic disk device is started, the maximum output dynamic range of the analog amplifier and the AGC AMP for each zone and each magnetic head,
The current value and voltage data (134) for determining the sink current and the signal amplitude value are set. Therefore, in the present embodiment, by reproducing for each zone and each magnetic head, by detecting the error rate, to set the dynamic range of the analog amplifier and AGC AMP, the output sink current and the signal amplitude, The current value and voltage data (134) at that time are stored. Hereinafter, such an operation is referred to as learning.

Next, the operation flow of this embodiment will be described with reference to FIG. After starting the magnetic disk, the HDC (136) starts a starting process for determining the current value and voltage data (134) of the current sources of the analog amplifier (101) and the AGC AMP (302) shown below (step 901). ). First, initialize the variable Z indicating the zone number and the variable H indicating the head number.
(Step 902). Next, the magnetic head is moved to the innermost track of the Zth zone (step 903), and the Hth magnetic head is activated (step 904). Next, the current value and voltage data (134) of the No. Z zone and No. H head are set to initial values (step 905), and the data is reproduced (step 906). Next, the HDC (136) determines whether or not there is an error in the reproduced data based on the result of error correction (step 907), and when the error correction circuit detects an error, the analog amplifier and AG
Increase the current value data (134) with C AMP (step 913),
Increases the dynamic range, output sink current and signal amplitude of analog amplifiers and AGC AMPs. Next, HDC (13
6) shows that if the dynamic range of each amplifier is sufficiently larger than the signal amplitude based on the current value data (134) (current value data is below the specified value) (no direction in step 914), the voltage data is not changed. In addition, from the current value data (134), when the dynamic range of each amplifier is smaller than the signal amplitude (current value data is more than the specified value) (yes direction of step 914), change the voltage data and then Attempt to reproduce data (step 906). The above operation is repeated as long as a reproduction error occurs, and the resulting current value and voltage data (134) is stored and updated (step 916). Next, the magnetic head for reproduction is switched (step 908, step 911) and the same processing as above is performed.

Further, in the z-th zone, after the learning of all heads is completed, the zones are switched and the learning processing similar to the above is performed (steps 909 and 910). After performing the learning process in all zones, the HDC (136) ends the starting process (step 910). In this case, the set current value and voltage data are held in the table (170) in association with each zone number and each head number.

According to this embodiment, an analog amplifier used in the data reproducing circuit is used in accordance with the data recording frequency of each zone of the magnetic disk device adopting the CDR method.
By setting the maximum output dynamic range and signal amplitude during data playback with the AGC amplifier to appropriate values,
It is possible to reduce the power consumption of the data reproduction circuit while achieving the target error rate.

Next, a third embodiment will be described with reference to FIGS.
And it demonstrates using FIG.

The magnetic disk used in this embodiment adopts the CDR method. As shown in FIG. 7, the magnetic disk (501) has an outer peripheral zone outer peripheral group (701) and an outer peripheral zone inner peripheral group (702). ), The inner circumference zone outer circumference group (703) and the inner circumference zone inner circumference group (704).

FIG. 9 sets the current value and the voltage data (134) for determining the maximum output dynamic range of the analog amplifier and the AGC AMP, the sink current and the signal amplitude value when the magnetic disk drive in this embodiment is started. FIG. 8 is a diagram showing a control flow of the HDC (136) of the present embodiment for this purpose.

Next, the operation flow of this embodiment will be described with reference to FIG. After starting the magnetic disk, the HDC (136) starts a starting process for determining the current value and voltage data (134) of the current source of the analog amplifier (101) and the AGC AMP (302) shown below (step 1001). ). First, a variable G indicating a group number and a variable H indicating a head number are initialized (step 1002). Next, the magnetic head is moved to the innermost track of the Gth group (step 1003), and the Hth magnetic head is activated (step 1004). Next, the current value and voltage data (134) of the No. G zone and No. H head are set to initial values (step 1005), and the data is reproduced (step 1006). Next, the HDC (136) determines whether or not there is an error in the reproduced data based on the result of the error correction (step 1007), and when the error correction circuit detects an error, the current value data (134) of the analog amplifier and the AGC AMP. (Step 1013) to increase the dynamic range, output sink current and signal amplitude of the analog amplifier and AGC AMP. Next, the HDC (136) determines from the current value data (134) when the dynamic range of each amplifier is sufficiently larger than the signal amplitude (current value data is below a specified value) (step 1014).
(no direction) means that the voltage data is not changed and the dynamic range of each amplifier is smaller than the signal amplitude from the current value data (134) (current value data is more than the specified value) (step 1014: yes direction). ) Changes the voltage data and tries to reproduce the data again (step 1006). The above operation is repeated as long as a playback error occurs, and as a result,
The set current value and voltage data (134) is stored and updated in the table (step 1016). Next, the magnetic head for reproduction is switched (step 1008 and step 10
11), the same processing as above is performed.

Further, in the G-th zone, after the learning of all heads is completed, the groups are switched and the same learning process as described above is performed (steps 1009 and 1010). After the learning process is performed in all groups, HDC ( 136) terminates the activation process (step 1010).

The reason why the zone or the inner track of each group is selected as the recording track to be learned in this embodiment is that the recording condition of the inner track is inferior to that of the outer track.

Next, a fourth embodiment will be described with reference to FIG. In this embodiment, the dynamic range and signal amplitude of the analog amplifier (101) and the AGC amplifier (302) are set to appropriate values not only during data reproduction but also during seek operation. FIG. 10 shows an operation flow of the HDC (136).

In FIG. 10, the HDC (136) confirms whether or not the seek is normally performed after the seek operation, and when the seek error occurs, the current value data (134) of the analog amplifier and the AGC AMP is increased. Then (step 1104), the dynamic range of the analog amplifier and the AGC AMP, the output sink current, and the signal amplitude are increased. Next, from the current value data (134), the HDC (136) determines that the voltage range is high when the dynamic range of each amplifier is sufficiently larger than the signal amplitude (current value data is below the specified value) (no direction in step 1105). Without changing the data, and when the dynamic range of each amplifier is smaller than the signal amplitude from the current value data (134) (current value data is above the specified value) (yes direction of step 1105),
The voltage data is changed (step 1106) and the seek is tried again (step 1101). The above operation is repeated as long as a reproduction error occurs, and the current value and voltage data (134) set as a result are stored and updated in the table (step 1103, step 1107).

As described above, even during the seek operation, the seek error can be prevented by setting the dynamic range and the signal amplitude of the analog amplifier (101) and the AGC amplifier (302) to the optimum values.

Next, a fifth embodiment will be described with reference to FIGS. 11, 12 and 13. 3 is different from the above embodiment in that the waveform shaping circuit (301) in FIG.
In contrast to receiving the values of the power supply voltage and the current source current from the HDC (136), this embodiment receives them as the signal amplitude value data (1200). In this embodiment, first, referring to FIG. 13, a control flow of the HDC (136) for controlling the magnetic disk device, and then referring to FIG. 12, an AGC AMP (302), an AGC control circuit (305) and The circuit configuration and the circuit operation of the waveform shaping circuit, which is a part of the data reproducing system circuit of the magnetic disk device, will be described using the analog amplifier having the basic amplifier shown in FIG. 1 as a core.

FIG. 11 shows a power supply voltage and current source current control circuit (1204), which is a power supply voltage value setting table.
(1205) and a current source current setting table (1206).
The power supply voltage value data (1202) corresponding to the signal amplitude register data is preset in the power supply voltage value setting table (1205). Also, the current source current setting table (1
Current source current value data (1203) corresponding to the signal amplitude register data is preset in 206). The power supply voltage and current source current control circuit (1204) refers to the power supply voltage value setting table (1205) and sets the signal amplitude register data sent from the register (108) to the power supply voltage value data (1205).
It is converted to 2) and sent to the power supply voltage selection circuit (144). Also, by referring to the current source current setting table (1206), the signal amplitude register data sent from the register (108) is converted into the current source current value data (1203), and the current source setting DAC (107) Send to.

FIG. 12 shows an example in which the present invention is applied to a part of a data reproducing system circuit of a magnetic disk device.

Next, the operation of the waveform shaping circuit (301) of this embodiment will be described. In the flow shown in FIG. 13, first, the HDC (136) is a register (1) of the waveform shaping circuit (301).
08), the signal amplitude data (1200) is transmitted, and the signal amplitude data (1200) is stored and held in the register (108). Further, the HDC (136) may be provided with a table for holding the transmitted signal amplitude value data. Next, the power supply voltage and current source current control circuit (1204) sets the signal amplitude value register data (1201) sent from the register (108) to the power supply voltage value data (120
It is converted to 2) and sent to the power supply voltage selection circuit (144). The power supply voltage and current source current control circuit (1204) converts the signal amplitude value register data (1201) sent from the register (108) into current source current value data (1203), and the current source control DAC (107).
Send to. At the same time, the signal amplitude setting DAC (311)
Is the signal amplitude value register data (12
The signal amplitude setting level (325) which is an analog voltage level is generated from 01). From the signal amplitude setting level (325), the signal amplitude setting level generation circuit (321) outputs the full-wave rectification bias VCOM (430) and the signal amplitude setting slice level VSH.
(431) and VSL (432) are generated and sent to the AGC control circuit (305). As described above, the AGC control circuit (305) sets the AGC AMP (3) so that the signal amplitude of the AGC control circuit input signal (327) becomes a desired value from the signal amplitude setting slice level (322).
Control the gain of 02). Also, the analog amplifier A
The output dynamic range and output sink current of the GC AMP (302), BUF AMP (304), and DIF AMP (306) are set as shown below. First, the current source control DAC (107) obtains the current source setting reference voltage (133) from the power source voltage held in the register (108) and the current source current value (1203) sent by the current source current control circuit (1204). To generate. This current source setting reference voltage (13
From 3), the current source control circuit (137) changes the current source setting bias (13
0), AGC AMP (302), BUF AMP (304) and DIF AM
Apply the current source setting bias to P (306). AGC AMP (30
2), BUF AMP (304) and DIF AMP (306) set their respective maximum output dynamic range and output sink current from the current source setting bias (130). In addition, the power supply voltage selection circuit (144) has a power supply voltage value data (1) corresponding to the signal amplitude value register data (1201) sent from the register (108).
A power supply voltage selection signal (143) is generated from 202), and one of Vcc1 (140) and Vcc2 (141) is selected by the power supply voltage changeover switch.

Next, FIG. 13 is a diagram showing a control flow of the HDC (136) of this embodiment. In this embodiment, the HDC sets only the signal amplitude values of the analog amplifier and the AGC AMP. Is. In addition, the power supply voltage and current source current of the analog amplifier and AGC AMP are controlled by the power supply voltage and current source current control circuit (1204) in the data recovery circuit.
It is set based on 0).

Next, the operation flow of this embodiment will be described with reference to FIG. First, during seek operation in which the magnetic head moves to the desired recording track and cylinder for data recording / reproduction (step 1401), the current value and voltage data (134) of the analog amplifier and AGC AMP (302) are set. After the seek operation is completed without updating, the signal amplitude value data (1200) corresponding to the seek recording track is set to a known value corresponding to the seek recording track (step 1402). First, during data playback (step 1403: yes
Direction, the HDC (136) determines whether or not there is an error in the reproduced data from the result of error correction (step 1405), and when the error correction circuit detects an error, increases the signal amplitude value data (step 1406), increasing the dynamic range of the analog amplifier and the AGC AMP, the output sink current and the signal amplitude. The above operation is repeated as long as a reproduction error occurs, and the resulting signal amplitude value data (1200) is stored and updated in a table holding the signal amplitude value data and a register (108) (step 1415). In addition, during data recording (no direction in step 1403), as the reproducing operation, only the reproduction of the ID section for recording the physical information of the recording sector is performed. Thereby, the current and voltage data (134) is determined (step 1409, step 1410, step 1411 and step 1412). In this way, the HDC (136) can set the current value and the voltage data corresponding to it by transmitting the signal amplitude value data.

In the embodiments described above, the maximum dynamic range of the analog amplifier and the AGC amplifier, the sink current and the signal amplitude are set by setting the current value and the voltage data (1
34) or the signal amplitude value data (1200) is set, but both may be used together. The maximum dynamic range, sink current, and signal amplitude of the analog amplifier and the AGC amplifier may be set separately. For example, when there is an error in the error correction circuit, first, only the AGC amplifier,
Adjust the maximum dynamic range, sink current and signal amplitude, and if an error occurs, adjust the sink current and signal amplitude of the analog amplifier.
The maximum dynamic range may be adjusted.

By using the analog amplifier, the AGC amplifier and the AGC control circuit of the present invention, the maximum output dynamic range, output sink current and signal amplitude value of the analog amplifier including the AGC amplifier of the data reproducing system circuit of the magnetic disk device Can be set arbitrarily, so that it is possible to optimize the power consumption for each magnetic disk device while maintaining the reliability of data at the time of data reproduction.

Further, by reducing the output sink current of the analog amplifier to the extent that a data reproduction error does not occur at the time of starting the magnetic disk and at the time of non-recording / non-seeking, it is further suitable for the operating environment of the magnetic disk device. Low power consumption can be achieved.

[0062]

According to the present invention, by varying the current value of the current source or the voltage value of the power supply voltage in the analog amplifier, in the data reproducing circuit of the magnetic disk, the low power consumption in consideration of the reproducing error at the time of reproducing the data is achieved. Electricity can be achieved.

[Brief description of drawings]

FIG. 1 is a configuration diagram of a basic amplifier circuit according to a first embodiment of the present invention.

FIG. 2 is a flowchart for setting current value and voltage data by the hard disk controller according to the first embodiment of the present invention.

FIG. 3 is a configuration diagram of a waveform shaping circuit of the magnetic disk device used in the embodiment of the present invention.

FIG. 4 is a configuration diagram of an AGC amplifier and an AGC control circuit with FIG. 1 as a core.

FIG. 5 is a block diagram of a data reproduction processing circuit of the magnetic disk device used in the embodiment of the present invention.

FIG. 6 is an explanatory diagram showing zones on a magnetic disk of a magnetic disk device used in a second embodiment of the present invention.

FIG. 7 is an explanatory diagram showing groups on a magnetic disk of a magnetic disk device used in a third embodiment of the present invention.

FIG. 8 is a flowchart for setting current value and voltage data by the hard disk controller according to the third embodiment of the present invention.

FIG. 9 is a flowchart for setting current value and voltage data by the hard disk controller according to the fourth embodiment of the present invention.

FIG. 10 is a flowchart of setting a current value and voltage data at the seek time by the hard disk controller according to the fifth embodiment of the present invention.

FIG. 11 is a configuration diagram of a power supply voltage and current source current control circuit used in a fifth embodiment of the present invention.

FIG. 12 is a flowchart for setting current value and voltage data by the hard disk controller in the fifth embodiment of the present invention.

FIG. 13 is a waveform shaping circuit configuration diagram of a magnetic disk device used in a fifth embodiment of the present invention.

FIG. 14 is a time chart in FIG.

[Explanation of symbols]

101: analog amplifier section, 102: current source control section, 103: amplifier, 104: output stage, 105: reference bias generation circuit, 106: comparator, 107: current source control DAC, 108: register, 136:
Hard disk controller (HDC), 137: Current source control circuit, 139: Power supply selector switch, 144: Power supply voltage selection circuit, 301: Waveform shaping circuit, 302: AGC AMP, 303: EQ AMP, 30
4: BUF AMP, 305: AGC control circuit, 306: DIF AMP, 307: LIN A
MP, 308: PULSE GEN, 309: GATE GEN, 311 for signal amplitude setting
DAC, 321: Signal amplitude setting slice level generation circuit, 325:
Signal amplitude setting level, 333: Equalizer circuit, 334: Low-pass filter, 335: AGC capacitor, 336: Differential capacitor, 404: Gain control amplifier, 405: AGC amplifier output stage, 406: GCA section current source, 407: Output stage current Source, 408: Full-wave rectifier circuit, 409: Charge comparator, 410: Discharge comparator, 411: Charge current source, 412: Discharge current source, 413: Charge control switch, 41
4: Discharge control switch, 415: VREF generation voltage source, 417: VREF output amplifier, 418: VAGC output amplifier, 419:
Comparator, 427: Slice level generation circuit, 430: VCO
M, 431: VSH, 432: VSL, 1204 Power supply voltage and current source current control circuit.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Kunio Watanabe, 292 Yoshida-cho, Totsuka-ku, Yokohama, Kanagawa Prefecture, Ltd. Microelectronics Equipment Development Laboratory, Hitachi, Ltd. Honcho 5-chome No. 20-1 Incorporated company Hitachi Ltd. Semiconductor Design Development Center

Claims (12)

[Claims] 1. An input unit for inputting a signal, an amplification unit for amplifying the signal input to the input unit, a waveform shaping circuit for shaping the waveform of the signal amplified by the amplification unit, and shaping by the waveform shaping circuit. A data reproducing circuit having a decoding unit that decodes the generated signal into data, and an error correction circuit that performs an error correction on the data decoded by the decoding unit, wherein the data reproduction circuit is based on an error correction result in the error correction circuit. It has a control part which controls a waveform shaping circuit, The said waveform shaping circuit is a current source and gain A is controlled.
A GC (Automatic Gain Control) amplifier and an AGC control circuit that controls the gain of the AGC amplifier are provided, and the AGC amplifier has an amplifier unit whose dynamic range changes according to the current value of the current source, and a current value of the current source. An input unit that receives a current control signal for controlling the current control signal, and a current source control unit that controls the current value of the current source in the amplifier unit based on the current control signal received by the input unit. A data reproducing circuit, which outputs the current control signal to control the waveform shaping circuit. 2. The power supply voltage unit according to claim 1, further comprising a power supply voltage unit for varying a power supply voltage value supplied to the amplifier unit of the AGC amplifier, wherein the input unit controls the power supply voltage value in the power supply voltage unit. The data reproducing circuit, wherein the control unit further outputs the voltage control signal in order to control the waveform shaping circuit. 3. The power supply voltage unit according to claim 2, wherein the power supply voltage unit selects one of the plurality of power supplies according to the voltage control signal and a connection terminal connected to each of a plurality of power supplies having different power supply voltage values. A data reproducing circuit comprising: a selecting unit. 4. The waveform shaping circuit according to claim 2,
The analog amplifier further includes a current source that amplifies an input signal, and the analog amplifier has a power supply voltage unit that varies a power supply voltage value that supplies power to the amplifier unit, and a dynamic range changes depending on a current value of the current source. And an input unit that receives a current control signal for controlling the current value of the current source and a voltage control signal for controlling the power supply voltage value in the power supply voltage unit from the control unit, and the input unit. And a current source control unit that controls the current value of the current source in the amplifier unit based on the received current control signal. 5. A magnetic head unit for reading and writing signals from and on a magnetic disk, an amplifying unit for amplifying the signal read by the magnetic head unit, and a waveform shaping for shaping the waveform of the signal amplified by the amplifying unit. A magnetic disk device comprising: a circuit, a decoding unit that decodes the signal shaped by the waveform shaping circuit into data, and an error correction circuit that performs error correction on the data decoded by the decoding unit. The circuit further includes a control unit that controls the waveform shaping circuit based on an error correction result in the circuit, and the waveform shaping circuit has a current source and a gain controlled A
A GC (Automatic Gain Control) amplifier, an AGC control circuit that controls the gain of the AGC amplifier, and an analog amplifier that includes a current source that amplifies an input signal are provided, and the AGC amplifier and the analog amplifier include the current source. An amplifier unit whose dynamic range changes according to the current value, an input unit for receiving a current control signal for controlling the current value of the current source, and a current in the amplifier unit based on the current control signal received by the input unit. And a current source control unit that controls a current value of a power source, wherein the control unit outputs the current control signal to control the waveform shaping circuit. 6. The power supply voltage unit according to claim 5, further comprising a power supply voltage unit for varying a power supply voltage value supplied to the amplifier unit of the AGC amplifier and the analog amplifier, wherein the input unit has a power supply voltage value in the power supply voltage unit. The magnetic disk device further receives a voltage control signal for controlling, and the control unit further outputs the voltage control signal for controlling the waveform shaping circuit. 7. The error correction circuit according to claim 6, wherein the control section causes the magnetic head to read a signal from a magnetic disk, and based on an error correction result of the error correction circuit for the read signal. A magnetic disk device characterized by generating and outputting the current control signal and the voltage control signal which have the minimum power consumption without causing an error. 8. The current control signal according to claim 7, wherein the controller reads a signal from the magnetic disk for each zone of the magnetic disk or each magnetic head, and outputs the signal for each zone of the magnetic disk or each magnetic head. A magnetic disk drive storing the voltage control signal. 9. The control unit according to claim 7, wherein the control unit reads a signal from the magnetic disk for each recording track of the magnetic disk or for each recording cylinder that is an assembly of a plurality of recording tracks located on a concentric circle, A magnetic disk device for storing the current control signal and the voltage control signal output for each recording track or each recording cylinder of the disk. 10. The magnetic disk device according to claim 6, wherein the control unit outputs the current control signal and the voltage control signal which are the minimum power consumption without causing a seek error at the time of seek. 11. The control unit according to claim 6, wherein when there is a reproduction error in the error correction circuit during reproduction of the magnetic disk, the control unit increases the current value of the current source by using the current control signal. A magnetic disk device characterized in that the output is made to occur. 12. The control unit according to claim 11, when increasing the current value of the current source, if the current value when the current value is increased is equal to or more than a predetermined specified value, A magnetic disk device, wherein the voltage control signal is output so as to increase the power supply voltage value in the power supply voltage section, instead of outputting the current control signal so as to increase the current value.