JPH0727566B2 - Local area projection calculator - Google Patents

Description

TECHNICAL FIELD OF THE INVENTION The present invention relates to x, y of an arbitrarily designated area of two-dimensional plane data.
The present invention relates to a local area projection calculation device that obtains a directional projection.

Conventional techniques and problems In character and figure recognition image processing, the method of obtaining projections in the x and y directions is often used. This will be described with reference to FIG. 2. Characters, figures to be recognized, or, generally speaking, an image is scanned to obtain a video signal, which is sampled to
256 × 256, each divided into 8-bit pixels, the same capacity memory, that is, the address in the x and y directions is 256 × 256,
Each address is stored in the memory MEM having a depth (number of memory cells) of 8, and each pixel is read out with y = 0, x = 0,1, ... 255, and the sum X ₀ of the values of each pixel is obtained. Then y = 1, x = 0,1, ... 2
Each pixel is read out as 55, the sum X ₁ of the values of each pixel is obtained, and the same operation is performed up to y = 255, x = 0, 1, ... 255 to obtain the projection result in the x direction, and x = 0, Each pixel is read out with y = 0,1, ... 255, the sum Y ₀ of the values of each pixel is obtained, and the same processing is performed up to x = 255, y = 0,1, ... 255, and the y-direction projection result is obtained. Is to ask.

If the value of each pixel is 0 if the pixel is white, 255 (8-bit maximum value) if it is black, and gray is the middle of these values, the projection result will be large where there are many dark pixels as shown in the figure. From the result, it is possible to infer what or where the image is. For example, if it is roughly said that the image is the number 1, the y-direction projection result is the maximum at a certain position, and the others are 0, and the x-direction projection result is that all X _{0 to} X ₂₅₅ are the same. Because,
From this, it can be estimated that the recognition target image is the number 1.

However, if the image has a fine pattern, the projection results in the x and y directions are similar, and it is difficult to estimate the image pattern from the projection result. For this purpose, it is effective to subdivide the image, obtain the projection result for each of the regions, and to judge them by combining them. Of course, if the x, y projection result for each small area is to be obtained, the processing becomes considerably complicated and the processing time becomes long. That is, in the conventional method, software is often used to calculate the projection of image data, that is, the projection of data arranged in a two-dimensional plane, and the processing speed is slow. Although there is a hardware implementation to solve this processing speed, it is designed to calculate the histogram of a fixed size area, and it is possible to calculate the projection of each small area of any size and position. Not a thing. The calculated projection result is used for subsequent image processing and pattern recognition. In the conventional method, it is necessary to transfer the projection result to the processor that performs these.
There is a problem that the amount of data transfer is large.

An object of the present invention is to improve such a point, and in order to calculate the projection of two-dimensional plane data, a local region of size M × N is cut out from the whole data, and To m, n
The projection of a local small area subdivided by can be obtained at high speed with only one scan, and by sharing the memory with the processor that uses the projection result, let's omit the transfer to the memory of the processor. It is what

Configuration of the Invention According to the present invention, a specified M × of two-dimensional data in pixel units is designated.
Within a local region of size N, the region is designated with values m, n
In the local area projection calculation device for calculating the x and y direction projections of each local small area divided by, the x direction projection memory (M1) for storing the cumulative data of the x direction projections of each local small area and the y direction projection A y-direction projection memory (M2) for storing cumulative data and a memory for storing the two-dimensional data are scanned in the x-direction and the y-direction to read out data, and an x-direction address and a y-direction address and a clock are received and designated. X for each local subregion while scanning the local region of size M × N
Direction, the x direction of the cumulative data of each projection in the y direction, the upper direction address indicating the storage area in each projection memory in the y direction, and the x direction for storing the individual cumulative data in the local small area, y Direction: An address generation circuit that generates a lower address that indicates an address in a storage area in each projection memory; data that is read by scanning a memory that stores the two-dimensional data with x and y direction addresses; The above-mentioned x-direction projection memory (M1) is accessed by the upper and lower addresses generated by the circuit and the accumulated data of the x-direction projection up to immediately before reading is added, and the result of the addition is used to store in the x-direction projection memory (M1). A first adder for updating the cumulative data of the x-direction projection of the corresponding address, and data read by scanning the memory for storing the two-dimensional data at each address in the x and y directions, The above-mentioned y-direction projection memory (M2) is accessed by the upper and lower addresses generated by the address generation circuit and the accumulated data of the y-direction projection up to immediately before reading is added, and the result of the addition is added to the y-direction projection memory (M2). A second adder for updating the accumulated data of the y-direction projection of the address in the above), which will be described below with reference to the drawings.

Embodiment of the invention As shown in FIG. 1, an image is scanned to form multi-valued pixels.
According to the present invention, a rectangular area A having an arbitrarily designated point (x ₀ , y ₀ ) as a starting point and having M in the x direction and N in the y direction (referred to as a local area) is used for the image memory MEM that stores the dimensional data. Is cut out, and the projection of each small region B divided by m in the x direction and n in the y direction can be calculated by one scanning (reading) of the image memory MEM. Here, M, N, m, n can be arbitrarily specified, and M, N is represented by the number of addresses, for example. Further, it is preferable that m, n be an integer fraction of M, N.

FIG. 3 shows the calculation start point (x ₀ ,
y ₀ ), the addresses of the input two-dimensional data in the x and y directions (x, y), the size of the local area (M, N), and the size of the local small area (m ′, n ′) (here Then, a circuit for generating a projection memory address from m '= M / m, n' = N / n) is shown. 11 ~ 16
Are registers, 21-26 are comparators, 31-35 are counters, 41-
45 is an OR gate, 46 is an AND gate, 51 is a driver, 52
Is an address conversion table. To the registers 11 to 16, from the initial setting data bus DB, x ₀ and x ₀ , respectively, as shown in the figure.
+ M, y ₀ , y ₀ + N, m ', and n'are transferred and stored. Memory access is TV scan type, memory ME
If M is 256 × 256, an 8-bit counter for x address and an 8-bit counter for y address are used, the address generation clock is added to the x address counter, and the overflow pulse of the x address counter is added to the y address counter. In addition, the count values x and y of these counters become the addresses in the x direction and the y direction for accessing the memory MEM. However, the count values x and y of these counters are used for the projection processing and the comparators 21, 22 and Add to 23 and 24. The data stored in the registers 11 to 14 are added to the other inputs of these comparators as shown in the figure, and the comparator 21 is xx ₀ and the comparator 22 is xx _0.
+ M, yy ₀ for comparator 23, y for comparator 24
The output is produced at y ₀ + N. More specifically, these outputs are the outputs of OR gates 41 to 44 that take the logical sum of the coincident (=), smaller (<), and larger (>) outputs of the comparators. When the logical product of the outputs of these OR gates is taken by the AND gate 46, the output of the AND gate is generated in the M × N area starting from (x ₀ , y ₀ ) and this output is generated by the data synchronization clock CLK. (This is the same as the clock used for x, y generation, and is synchronized with the read data of the memory MEM) and becomes the enable signal of the counter 35. The output of AND gate 46 also serves as an enable signal for counters 31-34.

The counter 31 counts the data synchronizing clock CLK within the M × N area, and when the count value reaches m ', the comparator 25 produces a coincident output, which is the clear of the counters 31 and 35 and the counter 33.
Input pulse. Similarly, the counter 32 counts the x> x ₀ + M output of the comparator 22 within the M × N area (which indicates how many x-direction scans have been performed within the M × N area), and the comparator 26
When the count value reaches n ', it clears itself and the counter 35 and becomes the input pulse of the counter 34. Therefore, the count values of these counters 33 and 34 indicate the address of the local small area B expressed in the small area unit. For example, the first
For the local small area at the upper left corner of the figure (this can be expressed as 0,0 if it is an address in small area units), the count value of the counter 33,34 is 0,0, and for that at the lower right corner (this is m ', n') m ', n', and those in between take intermediate values.

The address conversion table 52 uses these count values (0,0) to
In response to (m ', n'), an upper address of the storage address of the projection result of the local small area B on the x, y projection memory is generated. The address conversion table 52 is substantially a ROM (read-only memory), receives 00 to m'n 'as ROM access addresses, and generates a storage upper address ADD _U of the x, y projection result of each local small area B. To do. The counter 35 counts the data synchronization clock CLK within the M × N area, and the comparator 25
Is reset every time the count value reaches m ', and a lower address ADD _{Ly of the} memory for storing the cumulative data of y projection of each local small area is generated. Similarly, the counter 55 counts the number of times that the output of the comparator 25 becomes 1, and is reset each time the count value becomes n'by the output of the comparator 26, and stores the accumulated data of x projection of each local small area. Generate the lower address ADD _Lx of the memory. Upper and lower address AD of these
D _U , ADD _Lx , and ADD _Ly are output as the projection memory address ADD via the driver 51.

FIG. 4 shows a memory for storing cumulative data of x and y projections, and M1 and M2 are the memories. This memory is also used as the main memory of the processor that uses the projection result, and for this reason, a switching circuit is provided for input data and addresses. Reference numerals 63 and 64 denote selectors for switching the input data D, the write enable signal ▲ ▼, the address signal ADD, and the chip select signal CS. The subscript 1 of these symbols D, ▲ ▼, ... is this circuit, that is, x,
The one generated by the y-direction projection circuit, the subscript 2 indicates that generated by the processor side using the projection result.

The projection is performed by scanning the local area of the two-dimensional data in the x direction or the y direction as described above and reading the pixel data and taking the sum thereof. In this circuit, the sum is added by the adders 61 and 62.
Then do as follows. That is, FIG. 5 (a) shows the above M ×
A region A of N is shown, which is divided by m, n
B ₁₁ , B ₁₂ , ……… B _ji and projected in the x direction for each small area
X ₁₁₁ , X ₁₁₂ , ..., X ₁₂₁ , X ₁₂₂ , ... and y-direction projection
Y ₁₁₁ , Y ₁₁₂ , ..., Y ₁₂₁ , Y ₁₂₂ , ... are required,
Since all of these are obtained by one memory scan for the local region of the input two-dimensional data, the x-direction projection is performed from the first pixel 1 in the x-direction scan of the region A as shown in FIG. 5 (b). Up to pixel m ', x-direction projection memory M1
The accumulated data up to that point at address A111 is read and added to the pixel data, and the addition result is added to the same address A1.
The operation of updating the accumulated data by writing to 11 is repeated, and x is calculated from the next pixel m ′ + 1 to pixel 2m ′.
The operation of reading the cumulative data at the address A121 of the directional projection memory M1, adding it to the pixel data, and writing the addition result to the same address A121 is repeated, and the same processing is performed thereafter. By doing this, addresses A111, A of memory M1
121, ... In the X direction projection result X of the small areas B ₁₁ , B ₁₂ ,.
₁₁₁ , X ₁₂₁ , ... are written. The same applies to subsequent scanning in the x direction, but the data storage address is incremented by 1 in the y direction.

For the y-direction projection, the first x-direction scan data RD1 of the area A is written to the addresses 1 to M of the y-direction projection memory M2, and the next x-direction scan data RD2 is the address 1 of the memory M2.
.About.M, the data RD2 and the data RD2 are added in correspondence to each pixel and written to the same address of the memory M2, and the same process is performed for n'-times x-direction scanning, the addresses 1 to M of the memory M2 are read. Is the y-direction projection Y ₁₁₁ of the blocks B _{1l to} B _1i ,
Y ₁₁₂ , ... Is stored. The same processing is performed on the next blocks B _{2l to} B _2i . The same applies hereafter, and thus M ×
One television scan of the N area can obtain the projection results in the x and y directions of all the small areas.

The adders 61 and 62 and memories M1 and M2 of FIG. 4 receive the read data D1 of the memory MEM and the output address ADD1 of the circuit of FIG. 3 and perform the addition as described above, and the projection results are stored in the memories M1 and M2.
To store. The upper address output from the address conversion table 52 of FIG. 3 is the memory M1, M2 for each of the small areas B11, B12, ....
Shows the storage address of the projection result of
The address output by indicates the data read / write address of the memories M1 and M2 for receiving the projection results in the x and y directions for each small area. As is well known, the write enable ▲ ▼ is a signal for selecting a memory write / read mode, and the chip select signal CS is a select signal for the memories M1 and M2.

In this way, when the projection results in the x and y directions are stored in the memories M1 and M2, the selectors 63 and 64 are set to the subscript 1 of each signal by the select signal SLT.
Switching from side 2 to side 2, the projection result utilization processor can access the memories M1 and M2, and the read data is sent to the data bus DB2 of the processor through the drivers 53 and 54. In this way, the memories M1 and M2 serve as the main memory of the processor that obtains the projection result and the main memory of the processor that uses the projection result.Therefore, it is not necessary to transfer the projection result to the processor that uses the result, and large-capacity data transfer is performed. You don't have to.

When implementing the present invention, the capacity of the projection memory is determined while paying attention to the following points.

Assuming that the size of the input image is 512 (width in the x direction) x 512 (width in the y direction) and the bit width per pixel is 8 bits, when the number of divisions is m = n = 1, the data width of the required memory Is the worst case of. If each pixel for one line is added in the x direction, 256 (maximum pixel value) x 512 (width in x direction) = 131072
(17-bit width) is the required data width of the x-direction projection memory. The address width required to access the contents of the x-direction projection memory is determined by the maximum number of divisions n. For example, at the time of setting, m = n =
Since 512 pieces are meaningless, setting m = n = 256 as the maximum number of divisions corresponds to dividing the input image into 256 × 256 = 65486 by 2 pixels in the y direction, and a total of 16 bits is enough.

The same applies to the case of adding pixels for one row in the y direction, and the data width of the y direction projection memory may be 17 bits and the address width may be 16 bits. The above is shown in FIG.

Next, consider the case where the number of divisions is m = n = 2. In this case, the input image is a 256 × 256 image, as shown in FIG.
Can be thought of as one. Then, in the divided area (256 × 256), if each pixel for one row is added in the x direction, 256 (maximum pixel value) × 256 (width in x direction) = 65536
(16-bit width) is the required data width of the x-direction memory. It can be said that these 16 bits are sufficient because they have a 17-bit width prepared at the time of design as described above. The required address width of the x-direction projection memory is 2 because there are 4 sets of 256 (width in the y-direction) in the divided area.
56 × 4 = 1024 (10 bit width) is required. This is also well within the 16-bit address width prepared at the time of design. The same applies to the y-direction projection memory.

Here, the address allocation of the projection memories M1 and M2 will be specifically illustrated. The projection memory used in the present invention may be used for inputting an image and storing the calculation result, or for reading the result from the host CPU. The switching control is performed by the CPU and realized by the selectors 63 and 64 in FIG. To be done. Therefore, it is preferable that the data storage locations in the case of calculation using the projection memory are clearly separated / arranged by m and n.

As is apparent from FIG. 7, the address allocation structure of the x-direction projection memory of the present invention is generated by the circuit of FIG. 3, and is output by the counters 55, 35 and 51, and the storage location of the x-direction projection memory can be changed. specify. This is for the CPU
Since m and n are already known, the CPU can grasp which region of the input image the x projection result is by accessing this memory in order from the top. The same applies to the address allocation configuration of the y-direction projection memory.

EFFECTS OF THE INVENTION As described above, according to the present invention, it is possible to obtain all the projections in the x and y directions for each small area by one scan, and it is possible to obtain an advantage that large-capacity data transfer becomes unnecessary. The serial number is marked on the integrated circuit, but this device is effective for determining whether it is correctly engraved as planned, or whether there is bleeding, blurring, or breaks.

[Brief description of drawings]

Fig. 1 is an explanatory diagram of local areas and local small areas, and Fig. 2 is x,
FIG. 3 is an explanatory view of the y-direction projection, FIGS. 3 and 4 are explanatory views of an embodiment of the present invention, FIG. 5 is an operation explanatory view, FIG. 6 is an explanatory view of the data width and address width of the projection memory, and FIG. The figure is an illustration of a specific example of the configuration of the projection memory. In the drawing, MEM is a memory for storing two-dimensional data, D1 is its read data, CLK is a read clock, A is a local area, B is a local small area, M1 and M2 are projection memories in x and y directions, and AD.
D _U and ADD _L are upper and lower address signals, 61 and 62 are adders, 6
3 and 64 are selectors.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Toshiyuki Goto 1015 Kamiodanaka, Nakahara-ku, Kawasaki-shi, Kanagawa, within Fujitsu Limited (72) Inventor Takashi Kamiodanaka, Nakahara-ku, Kawasaki, Kanagawa 1015, within Fujitsu Limited ( 56) References JP-A-55-117944 (JP, A) JP-A-57-196375 (JP, A) JP-A-58-56429 (JP, A)

Claims (2)

[Claims] 1. A specified M of two-dimensional data in pixel units
A specified value m of the area within a local area of size × N,
In a local area projection calculation device for calculating x and y direction projections of each local small area divided by n, an x direction projection memory (M1) for storing cumulative data of x direction projections of each local small area and a y direction projection. A y-direction projection memory (M2) for storing the accumulated data of x, and a memory for storing the two-dimensional data are scanned in the x-direction and the y-direction to read data and receive an x-direction address and a y-direction address and a clock, While scanning the local area of the specified M × N size, x for each local small area
Direction, the x direction of the cumulative data of each projection in the y direction, the upper direction address indicating the storage area in each projection memory in the y direction, and the x direction for storing the individual cumulative data in the local small area, y Direction: An address generation circuit that generates a lower address that indicates an address in a storage area in each projection memory; data that is read by scanning a memory that stores the two-dimensional data with x and y direction addresses; The above-mentioned x-direction projection memory (M1) is accessed by the upper and lower addresses generated by the circuit and the accumulated data of the x-direction projection up to immediately before reading is added, and the result of the addition is used to store in the x-direction projection memory (M1). A first adder for updating the cumulative data of the x-direction projection of the corresponding address, and data read by scanning the memory for storing the two-dimensional data at each address in the x and y directions, The above-mentioned y-direction projection memory (M2) is accessed by the upper and lower addresses generated by the address generation circuit and the accumulated data of the y-direction projection up to immediately before reading is added, and the result of the addition is added to the y-direction projection memory (M2). A second adder for updating the accumulated data of the y-direction projection of the address in the above), and the local area projection calculation apparatus. 2. The x, y direction projection memory is provided with a data and address switching circuit, and can be accessed by a processor using the x, y direction projection result. The local area projection calculation device according to item 1.