JPH07274593A - Pulse motor drive circuit - Google Patents

Abstract

PURPOSE:To provide a pulse motor drive circuit wherein the operation of a pulse motor is simply restarted without shift in position if any anomaly occurs in excitation control information. CONSTITUTION:If any anomaly in excitation control signals CONT 2 is detected through an anomaly detecting circuit 3, anomaly detection signal is brought into the LOW level. Then clock signals CKB fed to an interface circuit 4 is stopped by an AND circuit 6. The output of the interface circuit 4 is kept in the state where it was before the anomaly occurred, and CPU 1 reads a first present condition notifying signal outputted from the interface circuit 4 and a second present condition notifying signal outputted from a counter circuit 8. The positions and state in which a pulse motor 9 was in the steps preceding the step in which the anomaly occurred, are thereby obtained.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a pulse motor drive circuit for driving a pulse motor used as a drive source for moving a carriage carrying an exposure lamp in a copying machine.

[0002]

2. Description of the Related Art A drive circuit for driving a pulse motor that attracts and rotates a rotor by a magnetic field generated by sequentially exciting two stator windings generally has a circuit configuration in which transistors are combined. I am using one. In such a pulse motor drive circuit, for example, the phases to be excited such as the A phase, the B phase, the antiphase of A, and the antiphase of B are changed, and the respective stator windings are sequentially excited to flow a current. ing.

In the pulse motor drive circuit, in order to excite each stator winding into the A phase, the B phase, the antiphase of A, and the antiphase of B, an excitation control signal (pulse signal) corresponding to each phase is generated. CP
A predetermined switching transistor, which is supplied under the control of U and excites each phase according to the excitation control signal, is turned on, and a current is controlled to flow in each stator winding in a predetermined direction.

When an abnormality occurs in the excitation control signal input to the pulse motor drive circuit, in order to prevent the transistor constituting the pulse motor drive circuit from being damaged, in the conventional pulse motor drive circuit, a predetermined phase for exciting each phase is specified. The switching transistors were controlled to be turned off.

[0005]

When all the predetermined switching transistors that excite each phase are in the off state, the two stator windings are opened, and the pulse motor cannot be driven. That is, in such a state, there is a problem in that the operation of the pulse motor becomes unstable and a malfunction such as misalignment occurs.
In addition, if the position of the pulse motor is misaligned, it is difficult to restart the operation of the pulse motor.

Therefore, it is an object of the present invention to provide a pulse motor drive circuit in which it is easy to restart the operation of the pulse motor without causing misalignment when an abnormality occurs in the excitation control loss. To do.

[0007]

The pulse motor drive circuit of the present invention comprises an output means for sequentially outputting the excitation control information consisting of a plurality of steps for exciting the stator winding step by step, and the output means. The output excitation control information is 1
First holding means for latching step by step, abnormality detection means for detecting an abnormality step by step from the excitation control information latched by the first holding means, and excitation control latched by the first holding means Second holding means for latching information step by step; first control means for controlling the excitation control information of the step in which the abnormality is detected by the abnormality detecting means so as not to be latched by the second holding means; Excitation means for exciting the stator winding according to the excitation control information latched by the second holding means, counting means for counting the number of steps of the excitation control information latched by the second holding means, and the abnormality. When the detecting means detects an abnormality, the abnormality detecting means detects an abnormality based on the count value of the counting means and the excitation control information latched by the second holding means. Sequentially from the excitation control information step, and a second control means for controlling said output means to output the excitation control information.

Further, the pulse motor drive circuit of the present invention is
Output means for sequentially outputting excitation control information consisting of a plurality of steps for exciting the stator winding step by step,
First holding means for latching the excitation control information output by the output means step by step, and abnormality detecting means for detecting an abnormality step by step from the excitation control information latched by the first holding means, Second holding means for latching the excitation control information latched by the first holding means step by step, and excitation control information for a step in which an abnormality is detected by the abnormality detecting means are stored by the second holding means. First control means for controlling not to latch, excitation means for exciting the stator winding according to the excitation control information latched by the second holding means, and abnormality detected by the abnormality detection means, Based on the excitation control information latched by the second holding means, the excitation control information is output sequentially from the excitation control information of the step in which the abnormality is detected by the abnormality detecting means. And and a second control means for controlling the force means.

[0009]

When the abnormality is detected in the excitation control information for exciting the stator winding, the stator winding is in accordance with the excitation control information in the step before the step in which the abnormality is held in the second holding means. By holding the wire in the excited state, it becomes possible to stop the pulse motor without causing the positional displacement of the pulse motor.

Further, based on the number of steps before the abnormality is detected and the excitation control information held by the second holding means, the operation of the pulse motor is restarted from the step where the abnormality is detected. Easy to get started.

[0011]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 shows the configuration of a pulse motor drive circuit according to an embodiment of the present invention.

In FIG. 1, the pulse motor drive circuit is
The power transistor 7 is mainly composed of a CPU 1, an interface circuit 2, an abnormality detection circuit 3, an interface circuit 4, a power transistor 7, and a counter circuit 8. The power transistor 7 is based on an excitation control signal CONT1 supplied from the CPU 1.
To drive the pulse motor 9.

The power transistor 7 is a portion of the pulse motor drive circuit of the present invention, which is composed of a transistor for exciting the stator winding of the pulse motor 9, and a specific example thereof is shown in FIG. The specific example of the circuit configuration of the power transistor (hereinafter simply referred to as a power transistor) 7 shown in FIG. 2 is conventionally well used.

FIG. 2 shows one of the two stator windings, which is the stator winding MA.
It shall be excited in the opposite phase of A. The other stator winding has exactly the same circuit configuration as that shown in FIG. 2 and will not be described. In FIG. 2, transistors TR1 and TR2 are switching elements for exciting the stator winding MA in the A phase, and use PNP-type bipolar transistors. Transistor TR1
The 1-bit excitation control signal P1 of the 4-bit parallel signal excitation control signal CONT4 (described later) is input to the base terminal of the transistor TR1 and the resistor R1 is connected to the base terminal of the transistor TR1. One end of is connected. The other end of the resistor R1 is connected to the emitter terminal of the transistor TR1, and at the connection point, the transistor T1 is connected.
The base terminal of R2 and one end of the resistor R2 are connected.
The other end of the resistor R2 is connected to the emitter terminal of the transistor R2, and the collector terminal of the transistor TR1 is connected to the collector terminal of the transistor TR2. The collector terminal of the transistor TR2 is connected to the anode terminal of the diode D1 for backflow prevention, and the cathode terminal of the diode D2 is connected to the emitter terminal of the transistor TR2. The power supply voltage Vcc of the power transmission is input to the connection point between the emitter terminal of the transistor TR2 and the other end of the resistor R2. Collector terminals of transistors TR1 and TR2 and diode D
One end of the stator winding MA is connected to the connection point with the anode terminal of No. 1, and further the anode terminal of the diode D2 of the commutation element is connected.

Transistors TR3 and TR4 are switching elements for exciting the stator winding MA in the opposite phase of A, and are NPN type bipolar transistors. A 1-bit excitation control signal P2 of a 4-bit parallel signal excitation control signal CONT4 (described later) is input to the base terminal of the transistor TR3, and the base terminal of the transistor TR3 is connected to the base terminal of the transistor TR3. One end of the resistor R3 is connected. The other end of the resistor R3 is connected to the emitter terminal of the transistor R3, and the base terminal of the transistor TR4 and one end of the resistor R4 are connected to the connection point. The other end of the resistor R4 is connected to the emitter terminal of the transistor R4, and the transistor T4
The collector terminal of R4 is connected to the collector terminal of the transistor TR3. The emitter terminal of the transistor TR4 is connected to the anode terminal of the backflow preventing diode D3, and the cathode terminal of the diode D3 is connected to the collector terminal of the transistor TR4. The cathode terminal of the diode D2 is connected to the connection point between the collector terminals of the transistors TR3 and TR4 and the cathode terminal of the diode D3. One end of the current detection resistor R9 is connected to the connection point of the emitter terminal of the transistor R4, the other end of the resistor R4, and the anode terminal of the diode D3, and the other end of the current detection resistor R9 is grounded.

Transistors TR5 and TR6 are switching elements for exciting the stator winding MA in the opposite phase of A, and are PNP type bipolar transistors. A 1-bit excitation control signal P3 of a 4-bit parallel signal excitation control signal CONT4 (described later) is input to the base terminal of the transistor TR5, and the base terminal of the transistor TR5 is connected to the base terminal of the transistor TR5. One end of the resistor R5 is connected. The other end of the resistor R5 is connected to the emitter terminal of the transistor TR5, and the connection point is connected to the base terminal of the transistor TR6 and one end of the resistor R6. The other end of the resistor R6 is connected to the emitter terminal of the transistor R6, and the collector terminal of the transistor TR5 is connected to the collector terminal of the transistor TR6. The collector terminal of the transistor TR6 is connected to the anode terminal of the diode D4 for backflow prevention, and the cathode terminal of the diode D4 is connected to the emitter terminal of the transistor TR6. The power supply voltage Vcc of the power transmission is input to the connection point between the emitter terminal of the transistor TR6 and the other end of the resistor R6. One end of the stator winding MA is connected to the connection point between the collector terminals of the transistors TR5 and TR6 and the anode terminal of the diode D4, and further the anode terminal of the diode D5 of the commutation element is connected.

Transistors TR7 and TR8 are switching elements for exciting the stator winding MA in the A phase and are NPN type bipolar transistors.
An excitation control signal P4 for 1 bit of an excitation control signal CONT4 (described later) of a 4-bit parallel signal is input to the base terminal of the transistor TR7, and the base terminal of the transistor TR7 is connected to the base terminal of the transistor TR7. Resistance R
One end of 7 is connected. The other end of the resistor R7 is connected to the emitter terminal of the transistor R7, and the base terminal of the transistor TR8 and one end of the resistor R8 are connected to the connection point. The other end of the resistor R8 is connected to the emitter terminal of the transistor TR8, and the transistor T8
The collector terminal of R8 is connected to the collector terminal of the transistor TR7. The emitter terminal of the transistor TR8 is connected to the anode terminal of the backflow preventing diode D6, and the cathode terminal of the diode D6 is connected to the collector terminal of the transistor TR8. The cathode terminal of the diode D5 is connected to the connection point between the collector terminals of the transistors TR7 and TR8 and the cathode terminal of the diode D6. One end of a current detection resistor R9 is connected to a connection point between the emitter terminal of the transistor R8, the other end of the resistor R8, and the anode terminal of the diode D6.

One end of the stator winding MA and the diode D2
At the connection point of the anode terminal of, the diode D of the commutation element
7 is connected to the cathode terminal, the anode terminal of the diode D7 is connected to the other end of the current detection resistor R9, and is further grounded.

The other end of the stator winding MA and the diode D5
At the connection point of the anode terminal of, the diode D of the commutation element
8 is connected to the cathode terminal, the other end of the current detection resistor R9 is connected to the anode terminal of the diode D8, and is further grounded.

When exciting the stator winding MA in the A phase in the power transmission having the above structure, first, the high level excitation control signal P1 is input to the base terminal of the transistor TR1 and the high level is applied to the base terminal of the transistor TR7. The excitation control signal P4 is input. Then, the transistors TR1 and TR7 are turned on, and the current is changed to the power supply Vcc,
Transistor TR2, stator winding MA, diode D
5, the transistor TR8, and the current detection resistor R9.

When exciting the stator winding MA in the opposite phase of A, first, the high level excitation control signal P2 is input to the base terminal of the transistor TR3, and the transistor TR3 is excited.
The high-level excitation control signal P3 is input to the base terminal 5 of FIG. Then, the transistors TR3 and TR5 are turned on, and a current flows through the power supply Vcc, the transistor TR6, the stator winding MA, the diode D2, the transistor TR4, and the current detection resistor R9 in this order.

The above is the operation of the power transmission when the excitation control signals P1 to P4 are normal. Next, the excitation control signal P1
The case where P4 is abnormal will be described. Excitation control signal P
The abnormalities 1 to P4 include, for example, abnormalities at the time of transient phenomenon. This will be described with reference to FIG.

In FIG. 3, the horizontal axis represents the rise of the control system power supply voltage within the time from the closing of the control system power supply switch until the voltage reaches a constant value (Vc), that is, the transient phenomenon. It is shown. That is, in the figure, the case where the rising curve of the control system power supply voltage is in the region above the rising curve 20 of the power supply system power supply voltage (curve 21) is a normal case. On the other hand, the case where the rising curve of the control system power supply voltage is in the region below the rising curve 20 of the power supply voltage of the power transmission system (curve 22) is an abnormal case.

When the excitation control signals P1 to P4 are abnormal, the excitation control signals such that the transistors TR1 and TR3 are turned on at the same time, for example, due to runaway of the CPU that supplies the excitation control signals P1 to P4. P1 and P2 are input, and transistors TR5 and T5
Excitation control signal P such that R7 is turned on at the same time
This is the case where three or four P4s are input.

At this time, when the transistors TR1 and TR3 are turned on at the same time, the current flows through Vcc, the transistor TR2, the diode D2, the transistor TR4, the current detection resistor R9, and the transistors TR5 and TR.
Even when 7 are turned on at the same time, the current is Vcc, transistor TR6, diode D5, transistor TR5.
8. The current flows through the current detection resistor R9, and each of them has a phenomenon similar to a load short-circuited state, an overcurrent flows, and the power transistor is broken.

In the conventional pulse motor drive circuit, when such abnormal excitation control signals P1 to P4 are detected,
A switching transistor TR1 for exciting each phase,
The excitation control signals P1 to P4 are controlled by providing a protection circuit for turning off all of TR3, TR5, and TR7.

Returning to the description of FIG. 1 of the present embodiment. CPU1
Supplies to the pulse motor drive circuit a clock signal CKA for reading the excitation control signal and an excitation control signal CONT1 for operating the pulse motor 9 in synchronization with the clock signal CKA, and at the same time, an abnormality detection circuit. 3 (described later), the interface circuit 4 (described later) excitation control signal CONT4, the counter circuit 8 (described later) present status notification signal, and based on these information, the excitation control signal CONT1 When an abnormality is detected, the pulse motor 9 is controlled to operate normally again without causing positional deviation of the pulse motor.

The excitation control signal CONT1 is a 4-bit parallel signal. Excitation control signal CON from CPU1
First, T1 and the clock signal CKA are input to the interface circuit 2.

The interface circuit 2 is composed of four flip-flop circuits corresponding to the 4-bit excitation control signal CONT1, and reads the excitation control signal CONT1 at the timing of the clock signal CKA to interface circuit. 2 and is input to the abnormality detection circuit 3 as the excitation control signal CONT2.

The abnormality detection circuit 3 uses the excitation control signal CONT.
2 detects an abnormality, and outputs an abnormality detection signal as a result. A specific example thereof is shown in FIG. In FIG. 4, the excitation control signal CONT2 is a 4-bit parallel signal, and each 1 bit thereof is excited by the excitation control signals P1 to P1.
P4.

The excitation control signal P1 is input to one input terminal of the AND circuit 30, the excitation control signal P2 is input to the input terminal of the inverter circuit 31, and at the same time, the excitation control signal P2 of the excitation control signal CONT3 is unchanged. Is output as.

The excitation control signal P2 logically inverted by the inverter circuit 31 is input to the other input terminal of the AND circuit 30 and is ANDed with the excitation control signal P1. As a result, the output terminal of the AND circuit 30. To excitation control signal CON
The excitation control signal P1 for one bit of T3 is output.

The excitation control signal P3 is input to one input terminal of the AND circuit 32, the excitation control signal P4 is input to the input terminal of the inverter circuit 33, and at the same time, the excitation control signal P4 of the excitation control signal CONT3 is input as it is. Is output as.

The excitation control signal P4 logically inverted by the inverter circuit 33 is input to the other input terminal of the AND circuit 32 and logically ANDed with the excitation control signal P3, and as a result, the output terminal of the AND circuit 32. To excitation control signal CON
The excitation control signal P3 for one bit of T3 is output.

The outputs from the AND circuit 30 and the AND circuit 32 are input to the two input terminals of the OR circuit 34, respectively, and the OR circuit 34 performs the inversion OR operation.
An abnormality detection signal is output. This abnormality detection signal is high level in the normal state, but becomes low level when the excitation control signals P1 and P3 of the excitation control signal CONT3 simultaneously become low level, and detects an abnormality. In other words, when the excitation control signals P1 and P2 of the excitation control signal CONT2 turn on the transistors TR1 and TR3 at the same time (for example, the excitation control signals P1 and P2 of the excitation control signal CONT2 become high level at the same time). Time) or the excitation control signal CONT2
Excitation control signals P3 and P4 of the transistor TR5
If both and TR7 are turned on at the same time (for example, when the excitation control signals P3 and P4 of the excitation control signal CONT2 simultaneously become high level), it is determined that the abnormality is detected and the abnormality detection signal becomes low level.

The abnormality detection signal output from the abnormality detection circuit 3 is input to the CPU 1 and at the same time, is input to one of the input terminals of the AND circuit 6. Further, the excitation control signal CONT3 output from the abnormality detection circuit 3 is input to the interface circuit 4.

Clock signal CK output from CPU 1
A is logically inverted by the inverter circuit 5, and is then input to the other of the input terminals of the AND circuit 6, and the AND circuit 6 is logically ORed with the abnormality detection signal, and the result is input to the interface circuit 4. It That is, the AND circuit 6 receives the clock signal CK only when the abnormality detection signal is at the high level.
The clock signal CKB obtained by logically inverting A is input to the interface circuit 4.

The interface circuit 4 is composed of four flip-flop circuits corresponding to the 4-bit excitation control signal CONT3. The interface circuit 4 reads the excitation control signal CONT3 at the timing of the clock signal CKB, and the interface circuit 4 is read. 4 and is input to the power transmission 7 as the excitation control signal CONT4. At this time, since the clock signal CKB is controlled so as not to be input to the interface circuit 4 when the abnormality detection circuit 3 detects an abnormality, the excitation control signal CONT4 is output to the power transmission 7 only when the abnormality is normal. It Further, the excitation control signal CON
T4 is also output to the CPU 1 as a first current status notification signal to notify the current status of control to the power transmission 7.

According to the excitation control signal CONT4, the power transmission 7 excites the stator winding MA to any one of the A phase, the antiphase of A, the B phase, and the antiphase of B, and the pulse motor 9 is driven. That is, in FIG. 2, when the excitation control signal CONT4 is normal, when exciting the stator winding MA to the A-phase, first, the high-level excitation control signal P1 is input to the base terminal of the transistor TR1, and the transistor TR7 is excited.
The high level excitation control signal P4 is input to the base terminal of the. Then, the transistors TR1 and TR7 are turned on, and a current flows through the power supply Vcc, the transistor TR2, the stator winding MA, the diode D5, the transistor TR8, and the current detection resistor R9 in this order.

When exciting the stator winding MA in the opposite phase of A, first, the high level excitation control signal P2 is input to the base terminal of the transistor TR3, and the transistor TR3 is excited.
The high-level excitation control signal P3 is input to the base terminal 5 of FIG. Then, the transistors TR3 and TR5 are turned on, and a current flows through the power supply Vcc, the transistor TR6, the stator winding MA, the diode D2, the transistor TR4, and the current detection resistor R9 in this order.

The clock signal CKB output from the AND circuit 6 is also input to the counter circuit 8. Here, the number of steps of the excitation control signal output according to the timing of the clock signal CKB is counted, and the result is notified to the CPU 1 as a second current status notification signal.

Next, the operation of the pulse motor drive circuit shown in FIG. 1 will be described with reference to the time chart shown in FIG. The interface circuit 2 reads the excitation control signal CONT1 supplied from the CPU 1 at the rising timing of the clock signal CKA also supplied from the CPU 1. The result output is the excitation control signal CONT.
It is 2. The excitation control signal CONT2 at this time is called the excitation control information of step 1.

In the excitation control information of step 1, no abnormality is detected by the abnormality detection circuit 3, so the interface circuit 4 reads the excitation control signal CONT3 at the rising timing of the clock signal CKB, and the result is read. The power transmission 7 is controlled according to the output excitation control signal CONT4. In addition, this excitation control signal CONT4
Is notified to the CPU 1 as a first current status notification signal.
The count value of the counter circuit 8 at this time is 1 (that is, it means step 1), and the value is notified to the CPU 1 as a second current status notification signal.

Next, the interface circuit 2 reads the excitation control signal CONT1 at the next rising timing of the clock signal CKA, and as a result, the excitation control signal CON.
T2 is output. Excitation control signal CONT2 at this time
Is referred to as excitation control information of step 2.

In the excitation control information of this step 2, since the abnormality detection circuit 3 detects an abnormality, the abnormality detection signal changes from the high level to the low level. Then, the clock signal CKB is stopped, and the excitation control signal CONT4 output from the interface circuit 4 and the counter value of the counter circuit 8 do not change and the state before the abnormality is detected is maintained. That is, the output from the interface circuit 4 holds the excitation control information of step 1, and the counter value of the counter circuit 8 is held at 1.

When the abnormality detection signal becomes low level, the CPU 1 reads the contents of the first current situation notification signal and the second current situation notification signal, and confirms the position and state of the pulse motor 9 that has moved. In this case, the moved position and state of the pulse motor 9 are controlled by the excitation control information in step 1.

After that, since the pulse motor 9 is operated again, the CPU 1 executes the next step, that is, step 2.
When the excitation control signal CONT1 is output, the interface circuit 2 reads the clock signal CKA also supplied from the CPU 1 at the rising timing. The excitation control signal CONT2 output as a result thereof is again the excitation control information of step 2. Since no abnormality is detected in the excitation control signal in step 2 in the abnormality detection circuit 3, the abnormality detection signal becomes high level. Further, the interface circuit 4 reads the excitation control signal CONT3 at the rising timing of the clock signal CKB, and according to the excitation control signal CONT4 output as a result, the power transmission 7
Is controlled. Further, the excitation control signal CONT4 is notified to the CPU 1 as a first current status notification signal. The count value of the counter circuit 8 at this time is 2, and the value is notified to the CPU 1 as a second current status notification signal. That is,
The control based on the excitation control information in step 2 is completed. Hereinafter, the same operation is performed in the case of the excitation control information in steps 3 to 4.

As described above, according to this embodiment,
When an abnormality is detected in the excitation control signal CONT2 in the abnormality detection circuit 3, the abnormality detection signal becomes low level, the clock signal CKB input to the interface circuit 4 is stopped by the AND circuit 6, and the output of the interface circuit 4 is output. By maintaining the state of the step before the abnormality occurs, the stator winding MA is kept in the excited state, and therefore the pulse motor 9 can be stopped without causing positional deviation. That is, in the abnormality detection circuit 3,
Even when an abnormality is detected, the stator winding MA is always excited, so that the pulse motor 9 can be prevented from malfunctioning due to opening of the winding.

Further, the CPU 1 has the interface circuit 4
Reading the first current status notification signal output from the counter circuit 8 and the second current status notification signal output from the counter circuit 8,
By confirming the moved position and state of the pulse motor 9 by the step before the step in which the abnormality is detected, it becomes easy to restart the operation of the pulse motor 9 from the step in which the abnormality is detected.

In this embodiment, only one of the two stator windings for driving the pulse motor 9 has been described, but the explanation is exactly the same for the other stator winding.

[0051]

As described above, according to the present invention, when the excitation control information is abnormal, it is possible to easily restart the operation of the pulse motor without causing the position shift. Can be provided.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of a pulse motor drive circuit according to an embodiment of the present invention.

FIG. 2 is a diagram showing a specific example of a circuit configuration of a power transistor.

FIG. 3 is a diagram for explaining an abnormality during a transient phenomenon of a control system power supply voltage.

FIG. 4 is a diagram showing a specific example of a circuit configuration of an abnormality detection circuit.

FIG. 5 is a time chart for explaining the operation of the pulse motor drive circuit.

[Explanation of symbols]

1 ... CPU, 2 ... Interface circuit, 3 ... Abnormality detection circuit, 4 ... Interface circuit, 5 ... Inverter circuit, 6
... AND circuit, 7 ... Power transistor, 8 ... Counter circuit, 9 ... Pulse motor.

Claims (2)

[Claims] 1. Output means for sequentially outputting excitation control information consisting of a plurality of steps for exciting the stator winding step by step, and latching the excitation control information output by this output step step by step. 1 holding means and the excitation control information latched by the first holding means,
An abnormality detection unit that detects an abnormality step by step; a second holding unit that latches the excitation control information latched by the first holding unit step by step; and an abnormality detection step by the abnormality detection unit. First control means for controlling the excitation control information so as not to be latched by the second holding means; and excitation means for exciting the stator winding according to the excitation control information latched by the second holding means, Counting means for counting the number of steps of the excitation control information latched by the second holding means; and a count value of the counting means when an abnormality is detected by the abnormality detecting means, and the second holding means. A control means for controlling the output means to output the excitation control information sequentially from the excitation control information of the step in which the abnormality is detected by the abnormality detection means based on the latched excitation control information; The pulse motor driving circuit, characterized by comprising control means, the. 2. Output means for sequentially outputting excitation control information consisting of a plurality of steps for exciting the stator winding step by step, and latching the excitation control information output by this output step step by step. 1 holding means and the excitation control information latched by the first holding means,
An abnormality detection unit that detects an abnormality step by step; a second holding unit that latches the excitation control information latched by the first holding unit step by step; and an abnormality detection step by the abnormality detection unit. First control means for controlling the excitation control information so as not to be latched by the second holding means; and excitation means for exciting the stator winding according to the excitation control information latched by the second holding means, When an abnormality is detected by the abnormality detecting means, based on the excitation control information latched by the second holding means, the excitation control information in the step in which the abnormality is detected by the abnormality detecting means is sequentially added to the excitation control information. And a second control unit for controlling the output unit so as to output control information, and a pulse motor drive circuit.