JPH07264218A - Bus matching method and device - Google Patents

Abstract

PURPOSE:To match a bus optimizingly by storing in advance a matched impedance for each connection of a function extender and setting an impedance depending on the actual connection state based on the impedance. CONSTITUTION:In the device matching a bus to which plural function extenders 1 are connected, a storage device 7 stores in advance an impedance 2 in matching with a connection state of the function extender possibly connected to the bus. When the function extender 1 is connected to the bus, a detection means 6 detects the connection state and when the storage device 7 stores the connection state of the function extender 1 to be detected, the electric impedance 2 on the bus is set based on the stored impedance 2. When the detected connection state is not stored, data are transferred between the function extenders, transmission reception data are compared to retrieve the matched impedance and to set the impedance based on the result.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a bus matching device and method capable of connecting a function expansion device by a user in an information processing device such as a personal computer. When a plurality of function expansion devices are connected in a bus to which the function expansion device can be connected, the load capacity to the function expansion device, that is, the sum of the input / output capacity and the bus capacity of each function expansion device increases, and The rise and fall times are longer. Also, due to the mismatch between the terminating impedance and the characteristic impedance of the wiring of the bus and the mismatch between the characteristic impedance of the function expansion device and the wiring of the bus, signal reflection, waveform distortion, garbled data during high speed data transfer, etc. However, it caused an error in transmission and an increase in leaked radio waves, making high-speed data transfer impossible.

[0002]

2. Description of the Related Art Conventionally, in order to prevent the above-mentioned harmful effects, the number of function expansion devices connected, the data transfer speed and the transfer width are limited in advance at the time of designing, and the electrical impedance on the bus is at the maximum. And the minimum state was set, and the value of the terminating impedance was set so that matching could be achieved in either state.

[0003]

DISCLOSURE OF THE INVENTION In the prior art,
Since the number of connections, transfer speed, and transfer width were limited, it was difficult to add functions and transfer large amounts of data at high speed. Also,
Since a method of searching for a matching impedance was used only when the electrical impedance on the bus was maximum and minimum, it could not be said that proper matching was performed.

It is an object of the present invention to eliminate the restrictions on the number of function expansion devices to be connected, the transfer speed, and the transfer width when matching buses at the time of designing, and to minimize the influence of bus mismatch.

[0005]

FIG. 1 is a diagram showing a principle flowchart of the present invention. The impedance value that is matched for each connection state of the function expansion device that may be connected to the bus is stored. When the function expansion device is connected to the bus, the connection state of the function expansion device is detected.

If the detected connection state of the function expansion device is stored in advance, the electrical impedance value on the bus is set based on the stored impedance value. If the detected connection status of the function expansion device is not stored in advance, data is transferred between the function expansion devices, the transmission data and the reception data are compared, the validity of the data is verified, and a matching impedance value is retrieved. Then, the electrical impedance value on the bus is set based on the retrieved result.

FIG. 2 is a diagram showing the principle configuration of the present invention.
A storage device 7 that stores the value of the impedance 2 on the matched bus for each connection state of the function expansion device 1 connected to the bus, and means for detecting the connection state of the function expansion device 1 connected to the bus. 6 and the detected connection state of the function expansion device 1 is stored in the storage device 7, a means 4 for setting the value of the electrical impedance 2 on the bus based on the stored value of the impedance 2 is provided. Have.

[0008]

That is, in the present invention, a plurality of matched impedance values are stored in advance for each connection state of the function expansion device connected to the bus, and the connection state of the function expansion device actually connected to the bus is stored. By setting the impedance value to be changeable based on the impedance value stored in accordance with the above, optimum bus matching for each connection state becomes possible.

[0009]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 3 is a diagram showing a first embodiment of the present invention. FIG. 4 is a diagram showing the configuration of the termination impedance and the termination impedance control unit.

FIG. 5 is a diagram showing a second embodiment of the present invention. Figure 6 shows termination impedance and termination impedance
It is a figure which shows the structure of an A / D converter control part. FIG. 7 is a flow chart for storing the card connection state in the embodiment of the present invention.

FIG. 8 is a flow chart of the first embodiment of the present invention. FIG. 9 is a flowchart of the second embodiment of the present invention. FIG. 10 is a diagram showing a memory map in the nonvolatile memory. 3 and 5, in FIG.
Reference numeral 2-7 is a terminating impedance (digital variable impedance), 8 is a transmitting unit, 9 is a receiving unit, 7 is a non-volatile memory, and 5-1 to 5-3 are A / D converters.

In this embodiment, the slots are 3-1 to 3
-3, and a CPU card 1 as a function expansion device 1-
1, screen control card 1-2, SC for hard disk
Three SI cards 1-3 are prepared. (The number of slots is not limited to three, and the type and number of cards used may be arbitrary.) In FIGS. 4 and 6, 10 is a switch control unit.
The terminating impedance includes an arbitrary number of resistors 13 and capacitances 14, which are connected in parallel, and the switch control unit 10 controls ON / OFF of the terminating impedance switch 15 to determine the impedance value.

A waveform value register 11 stores the value of the data waveform converted by the A / D converter 5 at an arbitrary time. Reference numeral 16 is a read instruction line, which is a CPU
Reference numeral 8 is a line for transmitting a waveform value transmission instruction to the waveform value register 11. Reference numeral 17 is a data line for transmitting the value of the termination impedance and the value of the waveform value register 11.

Reference numeral 18 denotes a write instruction line, which is a line for the CPU 6 to transmit a write instruction of the value of the terminating impedance to the switch control unit 10. Reference numeral 19 is an address line, which has termination impedances 2-1 to 2-7 and an A / D converter 5-.
The addresses assigned to 1 to 5-3 are transmitted. 20
Is an address decoder, which is a device for recognizing the address assigned to the termination impedance and waveform value register 11.

Reference numeral 21 is a slot-dedicated line, which connects between the slots. Using FIG. 3, FIG. 4 and FIG.
The process of storing the card connection state in the embodiment of the present invention will be described. It is to be noted that the matters up to storing the card connection state are common to the first and second embodiments. Further, 101 to 113 are 101 in FIG. 7, respectively.
Corresponding to the processing of ~ 113. 101: A CPU card 1 which is one of the add-in cards in one of the slots 3-1 to 3-3
Insert 1. In FIG. 3, it is inserted in the slot 3-3. Then, the remaining add-in cards are inserted and combined into the remaining slots (slot 3-1 and slot 3-2). In FIG. 3, the screen control card 1 is placed in the slot 3-1.
2, the SCSI card 1-2 is inserted into the slot 3-3. (At least only the CPU card 1-1 needs to be inserted into any of the slots, and it is possible to set a state in which there is an empty slot.) 102: The CPU 6 in the CPU card 1-1 determines the data transfer section. , Send a transfer instruction to the corresponding card. 103: Data is transferred between the designated cards. 104: Observe waveforms in the transmitting unit 8 and the receiving unit 9 of the card. At this time, if there is a slot in which the add-in card is not inserted, the waveform in that slot does not have to be observed. 105: Judge whether or not the waveform is matched.
If it is determined that they are not matched, the process of 106 is performed, and if they are matched, the process of 110 is performed. 106: CPU 6 has terminal impedances 2-1 to 2-7
Consider the setting value of. 107: Send the setting information of the termination impedances 2-1 to 2-7 to the termination impedance control unit 4. 108: In the switch control unit 10, the terminating impedance 2-1 is adjusted so that the impedance value set by the CPU 6 is obtained.
The on / off of the switch 15 of 2-7 is controlled. 109: Values are set to the termination impedances 2-1 to 2-7. 110: Process 111 is performed if it is confirmed that the current impedance value is consistent with data transfer in all other regions, and process 102 is performed if there is an unconfirmed region.
I do. 111: The CPU accesses the slots 3-1 to 3-3 and the termination impedance control unit 4, and reads the ID of the mounted card and the values of the termination impedances 2-1 to 2-7. 112: Card ID and termination impedance 2-1 to 2
The value of −7 is stored in the nonvolatile memory 7.

As shown in FIG. 10, the nonvolatile memory 7 stores the types of cards stored in the slots 3-1 to 3-3 and the values of the termination impedances 2-1 to 2-7 in a corresponding format. . 113: Completed after searching for matching terminating impedance values for all combinations of card and insertion destination slot. If there are unsearched combinations, the process returns to step 101.

As described above, the impedance value that can be matched for each combination of the cards connected to the slots is stored. Next, a first embodiment of the present invention will be described with reference to FIGS. 3, 4, and 8. 201 to 229 respectively correspond to the processing of 201 to 229 in FIG. 201: When the power is turned on, C according to the software instruction
The CPU 8 of the PU card 1-1 uses the slot-dedicated line 21 to access 3-1 to 3-3 and issues a command to send out the ID of the installed card. 202: By sending the ID from each card to the CPU 8, the CPU 8 can detect the type and connection position of the card inserted in the slots 3-1 to 3-3. 203: The nonvolatile memory 7 on the CPU card 1-1 is referred to, and it is confirmed whether the values of the termination impedances 2-1 to 2-7 corresponding to the combination of the read slot and the ID of the card are stored. 204: If it is stored, the process 205 is performed, and if not stored, the process 209 is performed. 205: Read the values of the termination impedances 2-1 to 2-7 from the nonvolatile memory 7. 206: Send the read value to the termination impedance control unit 4. 207: The switch control unit 10 performs on / off control of the switch 15 so that the values of the termination impedances 2-1 to 2-7 become the sent values. 208: The values of the terminating impedances 2-1 to 2-7 are set and the state becomes usable. 209: The CPU in the CPU card 1-1 determines the data transfer section and sends a transfer instruction to the corresponding card. 210: Perform data transfer between designated cards. 211: Sends the transmission data in the transmission unit 8 of the transmission side slot and the reception data in the reception unit 9 of the reception side slot to the CPU 6. 212: The CPU 6 performs a compare process of two data. 213: Process 2 when a data compare error occurs
14 is performed, and if not generated, processing 221 is performed. 214: When a compare error occurs, the CPU 6 needs to change the values of the termination impedances 2-1 to 2-7, and considers the set values. 215: The set value has an allowable range, and it is checked whether the set value examined in the process 214 is within the allowable range. If it is within the allowable range, the process 216 is performed. If it is outside the allowable range, the process 219 is performed. To do. 216: CPU 6 has terminal impedances 2-1 to 2-7
The setting information of the value of is sent to the termination impedance control unit 4. 217: The switch control unit 9 in the terminating impedance control unit 4 controls on / off of the switches 15 in the terminating impedances 2-1 to 2-7 so that the value is set by the CPU 8. 218: The values of the termination impedances 2-1 to 2-7 are set, and the process returns to 209. 219: When the CPU 8 in the process 215 determines that there is no appropriate set value within the allowable range, it gives an instruction to the card to reduce the transfer speed. 220: The transfer speed slows down, and the process returns to the process 209. 221: If it is confirmed that the currently set impedance value does not cause a compare error even during data transfer in another section, the processing goes to processing 222, and if there is an unconfirmed area, processing 209 is performed. 222: The values of the termination impedances 2-1 to 2-7 and the IDs of the cards mounted in the slots 3-1 to 3-3 are read. 223: Store the read data and transfer rate in the non-volatile memory 7. 224: Process 2 when transfer speed is restricted in the setting information
25, and if not, the setting is completed. 225: A message for requesting a change in the slot information in which the transfer speed is restricted in the setting information and the position of the slot into which the card is inserted is displayed. 226: Inquire whether the processing is completed or continued. Process 2 if continued
27, and in the case of termination, processing 228 is performed. 227: The slot information and the warning are displayed on the CRT 21, and the usable state 229 is set. 228: The slot information and the maximum transfer rate are displayed on the CRT 21, and the subsequent processing is stopped.

Finally, a second embodiment of the present invention will be described with reference to FIGS. 5, 6, and 9. The procedures of 301 to 329 correspond to the processing of 301 to 329 in FIG. 9, respectively. 301: After the power is turned on, the CPU 6 of the CPU card 1-1 accesses the slots 3-1 to 3-3 using the slot dedicated line and issues a command to send the ID of the inserted card. 302: By sending an ID from each card to the CPU 8, the CPU 8 can detect the type and connection position of the card inserted in the slots 3-1 to 3-3. 303: The non-volatile memory 7 on the CPU card 1-1 is referred to, and it is confirmed whether the values of the termination impedances 2-1 to 2-7 corresponding to the combination of the read slot and the card ID are stored. 304: If it is stored, process 305 is performed, and if not stored, process 309 is performed. 305: Read the values of the termination impedances 2-1 to 2-7 from the nonvolatile memory 7. 306: Send the read value to the termination impedance control unit 4. 307: The switch control unit 10 performs on / off control of each switch so that the values of the termination impedances 2-1 to 2-7 become the sent values. 308: The values of the termination impedances 2-1 to 2-7 are set and the state becomes usable. 309: C if not stored in the process 304
The PU 6 determines the data transfer section and sends a transfer instruction to the corresponding card. 310: Perform data transfer between designated cards. 311: The transmission data in the transmission unit 8 of the transmission side slot and the reception data in the reception unit 9 of the reception side slot are converted by the A / D converter. 312: The value of the converted data waveform at a certain time is stored in the waveform value register 13. 313: CPU 6 accesses the waveform value register 13,
The value stored in step 312 is read. 314: Check whether the read value is within the preset allowable range. 315: If it is out of the allowable range, it is determined that the matching is not achieved due to waveform distortion, overshoot / undershoot, etc., and the process proceeds to step 316.
Do 1. 316: Since it is necessary to change the values of the termination impedances 2-1 to 2-7, the CPU considers the set values. 317: As a result of the examination, if it is determined that there is no possibility of achieving consistency even if the setting value is changed, the process of step 321 is performed. When it is determined that there is a possibility, the process of step 318 is performed. 318: The CPU 6 sends the studied set value to the terminating impedance / A / D converter control unit 4 ′. 319: Termination impedance: In the switch control unit 10 in the A / D converter 4 ′, the termination impedances 2-1 to 2− are set so that the set value sent from the CPU 6 is reached.
The on / off of the switch 15 in 7 is controlled. 320: The values of the termination impedances 2-1 to 2-7 are set, and the process returns to step 309. 321: If it is confirmed whether or not the impedance value that is currently set can be matched even during data transfer in another section, go to step 320, and if there is an unconfirmed section, go to step 303. 322: Access to the slots 3-1 to 3-3 and the termination impedance / A / D converter control unit 4 ′, and the ID of the installed card and the termination impedances 2-1 to 2-
Read the value of 7. 323: Store the read data in the nonvolatile memory 7. 324: If there is a section in which the waveform of the transmitted / received data is abnormal, process 325 is performed. If not, the setting is completed. 325: Display information between slots in which an abnormality occurs in the transmission / reception waveform and a message requesting change of the position of the slot into which the card is inserted 326: Inquire whether the processing is completed or continued. In case of continuation, process 3
27, and if completed, process 328 is performed. 327: The slot information and the warning are displayed on the CRT 21, and the available state 329 is set. 328: The slot information and the waveform information are displayed on the CRT 21 and the subsequent processing is stopped.

[0019]

[Effect of the Invention] Even if there is a load fluctuation of the function expansion device
Since matching is achieved in the form of a variable termination from the outside, the influence of signal reflection can be minimized even when a plurality of function expansion devices are connected, and a signal without distortion can be obtained. Further, it is possible to suppress waveform distortion, crosstalk, garbled data, leaked radio waves, etc. during high-speed data transfer.

[Brief description of drawings]

FIG. 1 is a diagram showing a principle flowchart of the present invention.

FIG. 2 is a diagram showing a principle configuration of the present invention.

FIG. 3 is a diagram showing a first embodiment of the present invention.

FIG. 4 is a diagram showing a configuration of a terminating impedance and a terminating impedance control unit.

FIG. 5 is a diagram showing a second embodiment of the present invention.

[Fig. 6] Termination impedance and termination impedance A
It is a figure which shows the structure of a / D converter control part.

FIG. 7 is a flowchart for storing a card connection state according to the embodiment of the present invention.

FIG. 8 is a flowchart of the first embodiment of the present invention.

FIG. 9 is a flowchart of a second embodiment of the present invention.

FIG. 10 is a diagram showing a memory map in a nonvolatile memory.

[Explanation of symbols]

 1 ... Function expansion device 2 ... Termination impedance. 3 ... Slot 4, 4 '... Termination impedance control unit 5 ... A / D converter 6 ... CPU 7 ... Non-volatile memory 8 ... Transmission unit 9 ... Reception unit 10. ..Switch control unit 11 ... Waveform value register 12 ... Display 13 ... Resistance 14 ... Capacitor 15 ... Switch 16 ... Read line 17 ... Data line 18 ... Write line 19 ... Address line 20 ... Address decoder 21 ... Slot dedicated line

Claims (4)

[Claims] 1. A bus matching method to which a plurality of function expansion devices can be connected, wherein impedance values on the bus at the time of matching are stored in advance for each connection state of the function expansion devices, and the function expansion devices are connected to the bus. The connection state of the function expansion device is detected, and if the detected connection state of the function expansion device is stored in advance, the electrical impedance value on the bus is set based on the stored impedance value. Bus matching method. 2. If the detected connection state of the function expanding device is not stored in advance in claim 1, data transfer is performed between the function expanding devices and the transmitted data and the received data are compared to verify the validity of the data. A bus matching method characterized in that a matching impedance value is searched for by verification, and an electric impedance value on the matched bus is set based on the searched result. 3. The bus matching method according to claim 2, wherein when verifying the legitimacy of the transmission data and the reception data, verification is performed from the waveform of the data. 4. A bus matching device for matching a bus to which a plurality of function expansion devices are connected, wherein each function expansion device (1) connected to the bus has a connection state.
A storage device (7) for storing the value of the impedance (2) on the matched bus, a means (6) for detecting the connection state of the function expansion device (1) connected to the bus, and the detected function expansion. If the connection state of the device (1) is stored in the storage device (7), means for setting the value of the electrical impedance (2) on the bus based on the stored value of the impedance (2) ( 4) A bus matching device comprising: